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Patent # Description
US-7,436,290 Sensor discrimination apparatus, system, and method
A first and second node configured to couple to a load. A current source is adapted to drive a first current to the load through at least one of the first and...
US-7,436,249 Circuit and method for filtering a radio frequency signal
A circuit for filtering a radio frequency signal at a given frequency comprises an input terminal, a filter device, and an active AC shunt circuit having first...
US-7,436,236 Analog DC compensation
Arrangement for analog compensation of a DC component in an AC signal having an estimator for producing an estimate corresponding to the DC component, a...
US-7,436,195 Test apparatus for semiconductor elements on a semiconductor wafer, and a test method using the test apparatus
A test apparatus for semiconductor elements on a semiconductor wafer has test probes in a test area, which are held by a needle card. The needle card is held by...
US-7,436,072 Protected chip stack
A protected chip stack having a first chip and a second chip on the first chip. A functional layer in at least the first chip or the second chip. On the first...
US-7,436,023 High blocking semiconductor component comprising a drift section
A semiconductor component having a drift path (2) which is formed in a semiconductor body (1), is composed of a semiconductor material of first conductance type....
US-7,436,016 MIM capacitor with a cap layer over the conductive plates
A method for forming a MIM capacitor and a MIM capacitor device formed by same. A preferred embodiment comprises selectively forming a first cap layer over a...
US-7,434,740 Method and apparatus for position detection
The invention relates to a method and an apparatus (4) for detecting the position of a sequence of markings (2) on a carrier (1) in relation to a detector (3)...
US-7,434,222 Task context switching RTOS
A task switch from a first data processing task to a second data processing task can be accomplished by the first task calling a function which saves the first...
US-7,434,143 Method and arrangement for detecting a collision in a communication network
A method and an arrangement for detecting a collision in a communication network, such as a WLAN, on which data are sent in frames of variable lengths separated...
US-7,434,125 Integrated circuit, test system and method for reading out an error datum from the integrated circuit
An integrated circuit is provided, the integrated circuit having a test circuit for reading out an error datum from the integrated circuit in accordance with a...
US-7,434,121 Integrated memory device and method for its testing and manufacture
An integrated memory device includes an array of memory cells for storing data, a memory cell selector operationally connected to the array for selecting at...
US-7,434,038 Microprocessor arrangement for updating flag bits for security purposes and method for operating the same
Microprocessor arrangement and a method for operating a microprocessor arrangement, where the microprocessor arrangement has an execution unit for controlling a...
US-7,434,018 Memory system
A device or method for activating a memory, which includes receiving a select signal at the memory, receiving a plurality of address bits at the memory,...
US-7,433,667 Signal conditioning circuit
A signal conditioning circuit contains an oscillator which is connected to the inputs of two mixers. The output of one mixer is coupled, so as to form a feedback...
US-7,433,436 Timing control configuration and method for mobile communications systems
A configuration for time control of a transmitting/receiving device in a mobile station has a system clock generator for producing a standard system clock for...
US-7,433,394 Transmitting/receiving arrangement, and a method for bidirectional transmission of data via a digital interface...
A transmitting/receiving arrangement comprises a baseband module (1) and a radio-frequency module (3), which are connected to one another via a bidirectional...
US-7,433,261 Directed auto-refresh for a dynamic random access memory
A memory includes a row address latch. The row address latch includes a first stage configured to latch a row address for a memory read or write operation, and a...
US-7,433,232 Memory transistor and memory unit with asymmetrical pocket doping region
An integrated memory transistor and a memory unit including a plurality of integrated memory transistors is disclosed. Generally, the integrated memory...
US-7,432,840 Multi-bit sigma/delta converter
A multi-bit sigma/delta converter for converting an analog input signal into a digital output signal comprises a filter device for filtering the analog input...
US-7,432,839 ADC with logarithmic response and methods for controlling RF power levels
Embodiments of an analog-to-digital converter (ADC) and methods for controlling RF power levels are generally described herein. Other embodiments may be...
US-7,432,736 Logic basic cell
A logic basic cell contains a first logic function block and a second logic function block for the logic combination of a first input signal and a second input...
US-7,432,584 Leadframe for use in a semiconductor package
A leadframe comprises a die mounting area, a plurality of lead fingers and a metal deposit having a negative electrochemical potential with respect to a standard...
US-7,432,126 Substrate with semiconductor layer, electronic component, electronic circuit, printable composition and method...
A substrate comprises at least one semiconductor layer applied to a substrate material, whereby the semiconductor layer comprises an inert matrix material, in...
US-7,430,908 Excitation in micromechanical devices
A resonant structure for a micromechanical device includes a beam and at least one mass attached to the beam. The resonant structure is arranged to have a...
US-7,430,293 Cryptographic device employing parallel processing
A cryptography processor includes a central processing unit and a co-processor, the co-processor comprising a plurality of calculating subunits as well as a...
US-7,430,265 Circuit arrangement provided with a phase-locked loop and transmitter-receiver with said circuit arrangement
The invention specifies a circuit arrangement with a phase locked loop (1), which can be used as a mobile radio transmitter, in particular. The reference...
US-7,429,946 Capacitor averaging converter
A capacitor-averaging pipeline analog-to-digital converter has a plurality of stages. Each of the plurality of stages has a first switched capacitor circuit and...
US-7,429,941 Stabilization of sigma-delta converters
This disclosure relates to monitoring the output of one or more amplifying structures and providing an auxiliary input signal under certain conditions.
US-7,429,879 Clock receiver circuit device, in particular for semi-conductor components
A semi-conductor component with a receiver, in particular a clock receiver circuit device, as well as a receiver, in particular a clock receiver circuit device...
US-7,429,782 Semiconductor stack block comprising semiconductor chips and methods for producing the same
A semiconductor stack block contains either stacked semiconductor chip size semiconductor devices or semiconductor devices with semiconductor chips in a plastic...
US-7,429,498 Integrated circuitry and method for manufacturing the same
The integrated circuitry on a semiconductor substrate includes an integrated circuit arranged in a circuit area of the semiconductor substrate and a...
US-7,429,001 Label identification system and coding method suited therefor
The invention relates to a label identification system comprised of a transmitting-receiving unit and of identification labels on which the identification...
US-7,428,689 Data memory system and method for transferring data into a data memory
A method for transferring data into a data memory using a data protocol is presented. The data memory is an error correction code (ECC) memory or a non-error...
US-7,428,673 Test method for determining the wire configuration for circuit carriers with components arranged thereon
The invention relates to a test method for determining a wire configuration for a circuit carrier having at least one component arranged thereon, where internal...
US-7,428,662 Testing a data store using an external test unit for generating test sequence and receiving compressed test results
Disclosed is a test method for testing a data store having an integrated test data compression circuit where the data store has a memory cell array with a...
US-7,428,651 Electronic circuit with asynchronous clocking of peripheral units
An inventive electronic circuit includes central processing means having a clock connection and a data connection, as well as a peripheral unit having a clock...
US-7,428,643 Device and method for performing operations at a variable speed
A processor comprises a computation unit for performing an operation at a speed and a state unit, which has a state which changes in response to execution of an...
US-7,428,407 Amplitude modulator, in particular for mobile radio, and a method for modulation of a signal
An amplitude modulator is provided, which has a first supply connection for supplying a supply potential and a second supply connection for supplying a ground...
US-7,428,287 Method and device for synchronizing data transmission between two circuits
For synchronising the data transmission between a CMOS circuit (1) and a bipolar circuit (2) a DLL (delayed lock loop) is provided which sets a phase deviation...
US-7,428,163 Method and memory circuit for operating a resistive memory cell
The invention relates to a method for reading a memory datum from a resistive memory cell comprising a selection transistor which is addressable via a control...
US-7,427,937 Multi-channel digital/analog converter arrangement
A multi-channel digital/analog converter arrangement comprises at least two data channels for receiving and forwarding a corresponding number of digital data...
US-7,427,903 Polar modulator and a use thereof
A polar modulator has a low AM-AM and AM-PM distortion comprises a phase locked loop. The phase locked loop is designed for outputting a high-frequency signal...
US-7,427,882 Method and apparatus for switching on a voltage supply of a semiconductor circuit and corresponding...
A method and an apparatus for switching on a voltage supply of a voltage domain of a semiconductor circuit is disclosed. A voltage supply is connected to a...
US-7,427,870 Test system for testing integrated circuits and a method for configuring a test system
The invention relates to a test system for testing connectable integrated circuits. A particular test system may have switching devices via which a respective...
US-7,427,792 Power transistor including a leadframe and a semiconductor chip arranged on the leadframe
A power transistor includes a leadframe and a semiconductor chip arranged on the leadframe. The top side of the semiconductor chip has a drain contact-making...
US-7,427,774 Targets for measurements in semiconductor devices
Targets or test structures used for measurements in semiconductor devices having long lines exceeding design rule limitations are divided into segments. In one...
US-7,427,548 Method for producing charge-trapping memory cell arrays
A memory layer sequence comprising a lower confinement layer (2), a charge-trapping layer (3), and an upper confinement layer (4) is applied on the main surface...
US-7,427,202 Means of mounting for electronic components, arrangement and procedure
A means of attachment for electrically contacting electronic components is disclosed. The means of attachment includes a carrier element and a number of...
US-7,426,669 Circuit arrangement and method for driving electronic chips
The invention provides a method for testing circuit units to be tested in a test apparatus, different identification units being assigned to the circuit units to...
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