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Clock system for controlling autonomous transfer of data
A system that controls the application of a clock signal used to autonomously transfer data from a remote device to a host device. The clock signal can be...
A transmission arrangement is disclosed in which two different signal paths are provided for two operating modes, in order to couple a baseband signal processing...
Method for performing a burn-in test
A DDR DRAM having a test mode and an operational mode and a method for testing the DDR DRAM. The method includes in the order recited: (a) placing the DDR DRAM...
Resonant circuit and oscillator having a resonant circuit
The invention is directed to a resonant circuit having a frequency-determining element which has at least one switchable frequency-changing element connected in...
Device for generating a periodic clock signal
A device for generating a periodic clock signal according to the invention comprises a bandpass filter is disclosed. In one embodiment, the bandpass filter...
Integrated circuit and method for generating a ready signal
An integrated circuit comprises an input for receiving a supply voltage, a field-effect transistor with a gate which is connected to the input in such a manner...
Semiconductor component comprising flip chip contacts with polymer cores
and method of producing the same
A semiconductor component includes flip-chip contacts arranged on a wiring structure of a semiconductor chip. The wiring structure includes at least one...
Microelectromechanical component and method for the production thereof
A microelectromechanical component and to a method for the production thereof is disclosed. In one embodiment, the microelectromechanical component has a...
Field effect transistor
A field effect transistor is provided. The field effect transistor includes a channel region, electrically conductive channel connection regions, and a control...
Semiconductor component and method for contracting said semiconductor
The semiconductor component has several regularly arranged active cells (1), each comprising at least one main defining line (8). A bonding wire (18, 20) is...
Methods of manufacturing multiple gate CMOS transistors having different
gate dielectric materials
Semiconductor devices with transistors having different gate dielectric materials and methods of manufacture thereof are disclosed. One embodiment includes a...
Biocompatible microchip and a method for producing the same
The invention relates to a process for the production of biocompatible structures. For this purpose, a chemically amplified photoresist is applied to a substrate...
Method for producing a phase mask
A first and a second phase-shifting, semitransparent layer are formed on a substrate. The layers are patterned lithographically to form first elevated structure...
Parallel processing for decoding and cyclic redundancy checking for the
reception of mobile radio signals
Depending on the sequence of the decoded payload signal bits (a.sub.m1, . . . , a.sub.mA) and redundancy checking bits (p.sub.m1, . . . , p.sub.mL) which are...
Method for testing semiconductor chips by means of bit masks
A method for testing semiconductor chips is disclosed. In one embodiment, a chip to be tested which has a test logic, at least one test mode is set, the test...
Data handover unit for transferring data between different clock domains
by parallelly reading out data bits...
The invention provides a data handover unit for transferring data from a furst clock domain to a second clock domain, comprising: a first clock unit operable to...
Arithmetic logic unit with merged circuitry for comparison,
minimum/maximum selection and saturation for signed...
A saturation-capable arithmetic logic unit (ALU) includes a general-purpose comparator coupled to receive a data value and a saturation threshold value during a...
Circuit arrangement and method for compensating for abrupt signal level
changes in amplification devices
A circuit arrangement includes two adjustable amplification devices where the signal output of the first amplification device is connected to the signal input of...
Device for stabilizing a workpiece during processing
A device that stabilizes a workpiece during processing includes a first workpiece carrier part, a second work piece carrier part, and a fixing unit that mutually...
In a method and apparatus for detecting a message in a signal the message begins with a preamble consisting of a fixed sequence of symbols, each having a symbol...
Phase change memory having temperature budget sensor
A semiconductor device includes a plurality of memory cells, a temperature budget sensor, and a circuit. The circuit periodically compares a signal from the...
Memory circuit arrangement with a cell array substrate and a logic circuit
substrate and method for the...
In a memory circuit arrangement and fabrication method, the parts of the memory circuit arrangement are situated on two different substrates. An integrated...
Sigma-delta modulators and a method of modulating are disclosed in which a first sigma-delta modulator having a first quantizer is provided, and a second...
Dissociated fabrication of packages and chips of integrated circuits
A method of fabricating a semiconductor component includes providing a prefabricated frame that includes metal traces and lead-through contacts. A semiconductor...
Method for fabricating a semiconductor component
The fabrication of a semiconductor component having a semiconductor body in which is arranged a very thin dielectric layer having sections which run in the...
Method for generating fill and cheese structures
A multi-pass method for designing at least a portion of a circuit layout on a substrate is provided which includes receiving or generating a first level frame...
Processor having electronic fuses for storing secret data
A processor includes a calculator, a plurality of electronic fuses for storing secret data and reader for reading out the plurality of electronic fuses to...
Finding a data pattern in a memory
A memory includes a plurality of first-in-first-out (FIFO) cells, an output pointer counter, a write training block and a multiplexer. The output pointer counter...
Circuit and method for transmitting a signal
A circuit for transmitting a signal has a first signal line and a second signal line, wherein the second signal line is arranged adjacent to the first signal...
Delay locked loop
A delay locked loop includes a first delay device for obtaining a fine setting and a downstream-connected second delay device for obtaining a coarse setting of...
Clock and data recovery unit
A clock and data recovery unit for recovering a received serial data bit stream having: phase adjustment means for adjustment of a sampling time in the center of...
Receiver circuit for a push-pull transmission method and method for
receiver-end signal processing in push-pull...
A receiver circuit contains first and second inputs for feeding in first and second input signals, and an output generating an output signal dependent on the...
Circuit arrangement having a transmitter and a receiver
Circuit arrangement having a transmitter and a receiver coupled to the transmitter via N signal lines, wherein a useful information signal is exchanged between...
Circuit and a method for forwarding data packets in a network
In a method for forwarding data packets in a network a circuit comprises a data storage and a control device. Each data packet has a destination address and the...
Random access memory including circuit to compress comparison results
A random access memory including an array of memory cells configured to store memory cell data, a first circuit, and a second circuit. The first circuit is...
Semiconductor memory and method for adapting the phase relationship
between a clock signal and strobe signal...
A method is provided for adapting the phase relationship between a clock signal and a strobe signal for accepting write data to be transmitted into a memory...
Memory device that provides test results to multiple output pads
A memory device including at least two output pads and at least two memory die. Each of the at least two memory die is configured to provide an output signal...
Write/delete process for resistive switching memory components
The invention relates to a system, a memory component and a process for operating a memory cell, which includes an active material, which can be changed into a...
Memory device with shared reference and method
A memory device has a first core memory array, a second core memory array, a third core memory array and a fourth core memory array, and a first common reference...
Self-calibrated constant-gain tunable oscillator
The present invention provides a tunable oscillator. A voltage-to-current converter receives as input a voltage from a phase-locked loop and outputs a first...
Regulation of an amplification apparatus
An amplification apparatus includes an amplifier. The amplification apparatus includes a bias voltage circuitry coupled to the amplifier to provide a bias...
Amplifier circuit with reduced temperature dependence of the gain
An amplifier circuit includes an amplifier input, an amplifier output, a control terminal for adjusting a gain of the amplifier circuit, and a feedback path...
Integrated circuit chip and integrated device
Embodiments provide for integrated circuit chip and device having such an integrated circuit, in which different types of pads are arranged in separate rows. In...
Semiconductor module with a semiconductor stack, and methods for its
An electronic semiconductor module component with a semiconductor stack includes semiconductor components arranged in a vertically stacked relationship. A basic...
Stacked capacitor array and fabrication method for a stacked capacitor
The present invention relates to a stacked capacitor array and a fabrication method for a stacked capacitor array having a multiplicity of stacked capacitors, an...
Semiconductor device and method of manufacturing the same
A semiconductor device according to the present invention comprises a semiconductor substrate, a capacitor including a lower electrode disposed above the...
A semiconductor device comprises a semiconductor substrate, an insulating layer on top of the substrate, a lateral field effect transistor comprising a drain...
Semiconductor having structure with openings
A process for producing an insulation structure with openings of a low aspect ratio is disclosed. In one embodiment, a dopant is introduced into the insulation...
Method in the fabrication of an integrated injection logic circuit
A method in the fabrication of an I.sup.2L circuit comprises (i) forming a common base of a lateral bipolar transistor and emitter of a vertical bipolar...
Charge transfer complexes including an electron donor and an electron
acceptor as basis of resistive memories
Materials are described for producing memory cells which have a size in the nanometer range and include a CT complex located between two electrodes. The CT...