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Patent # Description
US-7,625,781 Semiconductor device having a plastic housing and external connections and method for producing the same
A semiconductor device having a plastic housing and external connections, and to a method for producing the same is disclosed. In one embodiment, the plastic...
US-7,624,315 Adapter card for connection to a data bus in a data processing unit and method for operating a DDR memory module
One embodiment of the invention provides an adapter card for connection to a data bus in a data processing unit. The adapter includes a DDR interface for...
US-7,623,598 Demodulation of a frequency-modulated received signal by means of a Viterbi algorithm
Apparatus for demodulation of a signal which is frequency-modulated with a data symbol sequence {d.sub.k}, having a zero crossing detector (1), a generator (2)...
US-7,623,564 CDMA wireless system
Information symbols are transmitted simultaneously on independent streams using the same spreading code but from different transmit antennas at the transmitter....
US-7,622,938 Contact unit for a device to place a part into operation, testing device, and method for placing into operation...
A contact unit is provided. The contact unit is adjusted in order to create an electric contact in a test device and comprises an arrangement for contact guides...
US-7,622,802 Electronic device with semiconductor chip including a radiofrequency power module
An electronic device, including a radiofrequency power module, includes a cavity housing including a housing frame with plastic walls and with a metal frame...
US-7,622,790 Transistor assembly and method for manufacturing same
A transistor assembly having a transistor includes a plurality of transistor regions, each of which has a vertical transistor structure having a collector...
US-7,622,789 Polymer transistor arrangement, integrated circuit arrangement and method for producing a polymer transistor...
The invention relates to a polymer transistor arrangement, an integrated circuit arrangement and a method for producing a polymer transistor arrangement. The...
US-7,622,733 Semiconductor structure with a plastic housing and separable carrier plate
A semiconductor structure includes: a carrier plate; a thermosensitive adhesive coupled to a top surface of the carrier plate, which is removable from the...
US-7,622,374 Method of fabricating an integrated circuit
Methods of fabricating an integrated circuit, in particular a dynamic random access memory are described. After forming memory cells on a semiconductor substrate...
US-7,621,671 Method and apparatus for thermal protection in an integrated circuit
Some embodiments discussed relate to an apparatus comprising a temperature sensor disposed in an integrated circuit, the temperature sensor including a bipolar...
US-7,620,884 Memory checking device and method for checking a memory
A memory checking device for cells arranged in memory rows and columns, wherein, in a state of integrity, the memory has parity values for two memory rows or two...
US-7,620,857 Controllable delay device
Two delay chains having in each case n series-connected unidirectional delay elements are provided for controllably delaying electrical signals between a circuit...
US-7,620,835 Voltage supply control device and method
One embodiment of the invention provides a voltage supply control device, as well as a process for the control of the voltage supply of a semiconductor...
US-7,620,745 Transferring data between a memory and peripheral units employing direct memory access control
A method transfers data between a memory and peripheral units. The method includes assigning priorities to the data to be transferred, and transferring the data...
US-7,620,136 Clock and data recovery circuit having gain control
A clock and data recovery circuit includes a phase detector configured to compare a phase of a data signal to a phase of a sampling clock to provide a phase...
US-7,620,100 Method and apparatus for equalization of a signal which is transmitted via a user channel using the DF method,...
In a method for equalization of a signal that is transmitted via a user channel using the DF method, an interference channel is taken into account by the DF...
US-7,619,980 System operable to transmit and receive messages
A system, minimising transmission delays and avoiding loss of synchronisation, using a contention based multiple access protocol comprises n transceivers each...
US-7,619,924 Device and method for reading out memory information
A device for reading out memory information storable in a memory has an integrator and a comparator. The memory provides, in a hold phase, a leakage current, and...
US-7,619,487 Polar modulation without analog filtering
This disclosure relates to systems and methods for polar modulation without analog filters. Digitals filters, a second order hold interpolator and a...
US-7,619,310 Semiconductor interconnect and method of making same
An integrated circuit interconnect structure includes a conductive line, a first barrier layer disposed on a bottom surface of conductive line, a second barrier...
US-7,619,309 Integrated connection arrangements
A connection arrangement having an outer conductive structure arranged at least partly or completely in a cutout of an electrical insulation layer is provided....
US-7,619,304 Panel and semiconductor component having a composite board with semiconductor chips and plastic package molding...
A panel and a semiconductor component including a composite board with semiconductor chips and plastic package molding compound and a method for the production...
US-7,618,867 Method of forming a doped portion of a semiconductor and method of forming a transistor
A method of forming a doped portion of a semiconductor substrate includes: defining a plurality of protruding portions on the substrate surface, the protruding...
US-7,618,865 Method in the fabrication of a monolithically integrated vertical device on an SOI substrate
A method in the fabrication of a monolithically integrated vertical device on an SOI substrate comprises the steps of providing an SOI substrate including, from...
US-7,618,845 Fabrication of an integrated circuit package
A QFN integrated circuit is mounted on a leadframe having multiple lead lands and resin material encapsulates the integrated circuit leaving the lead lands...
US-7,618,492 Methods of forming nanocrystals
Methods of selectively forming nanocrystals on semiconductor devices are disclosed. Regions of a workpiece are masked with a masking material, and the...
US-7,617,067 Multichip package with clock frequency adjustment
One embodiment of the present invention provides a multi-chip package including a logic device providing a clock signal having a frequency and a memory device....
US-7,616,714 Process and device for the prediction of noise contained in a received signal
A device and method for predicting noise in a signal that is received by a digital receiver is provided. The device includes an autocorrelation function...
US-7,616,680 Method for processing data in a spread spectrum system
A method for processing data in a spread spectrum system, including decimating a data rate of received spread spectrum data by a decimation factor to a decimated...
US-7,616,662 Parser for parsing data packets
A parser system is arranged to receive a data stream (1) having interleaved sections derived from a plurality of different packets, and to extract data from each...
US-7,616,059 Temperature compensation of small signal gain of an amplifier stage
The invention relates to an differential amplifier circuit comprising an amplifier stage comprising a first and a second transistor, the gates of which are...
US-7,615,852 Semiconductor component in a housing with mechanically inforcing flat conductor webs
The standard housing (27) of a semiconductor component (21), preferably a power semiconductor component features a plurality of external leads (1-5). Between...
US-7,615,847 Method for producing a semiconductor component
A semiconductor component having a semiconductor body having first and second semiconductor regions of a first conduction type, and a third semiconductor region...
US-7,615,845 Active shielding of conductors in MEMS devices
An apparatus that reduces parasitic capacitance in a MEMS device includes a dielectric layer on the surface of a silicon-on-insulator (SOI) substrate, a...
US-7,615,840 Device performance improvement using flowfill as material for isolation structures
A trench is formed in the surface of a provided semiconductor body. An oxide is deposited in the trench and a cap is deposited on the oxide, wherein the...
US-7,615,807 Field-effect transistor structures with gate electrodes with a metal layer
Provided is an integrated circuit including a transistor with a gate electrode. The gate electrode includes a polysilicon layer in contact with a gate dielectric...
US-7,615,770 Integrated circuit having an insulated memory
A memory cell includes a first electrode, a second electrode, and phase-change material between the first electrode and the second electrode. The phase-change...
US-7,615,499 Method for oxidizing a layer, and associated holding devices for a substrate
A method is presented in which a layer which is to be oxidized is processed, in a single-substrate process. The process temperature during the processing is...
US-7,615,484 Integrated circuit manufacturing method using hard mask
An integrated circuit hard mask processing system is provided including providing a substrate having an integrated circuit; forming an interconnect layer over...
US-7,615,440 Capacitor and method of manufacturing a capacitor
In a method of fabricating a semiconductor device, a level of metal is formed within an interval dielectric. The level of metal includes a first metal line...
US-7,615,410 Chip-sized flip-chip semiconductor package and method for making the same
A semiconductor package (10; 14) comprises a semiconductor die (2; 2') with a plurality of contact areas (4) on its active surface and an electrically conductive...
US-7,614,023 System for estimating a terminal capacitance and for characterizing a circuit
A method for estimating a terminal capacitance associated with a terminal of a cell of a digital circuit includes providing first and second capacitance values...
US-7,613,763 Apparatus and method for converting, and adder circuit
An apparatus and method for converting a dual-rail input. The apparatus combines two useful operand bits and two auxiliary operand bits so that, in a data mode,...
US-7,613,224 Qualification and selection of the frequency channels for an adaptive frequency hopping method by means of...
In a method for qualification of the transmission quality of a frequency channel in a wire-free communication system that has two or more frequency channels,...
US-7,613,028 Solid electrolyte switching element
A switching element for reversible switching between an electrically insulating OFF state and an electrically conductive ON state, having two electrodes, namely...
US-7,612,627 Integrated binary phase shift keying with silicon MEMS resonators
A modulator includes a micro-electromechanical resonator device configured to receive an input signal and generate two output signals in response thereto,...
US-7,612,457 Semiconductor device including a stress buffer
An integrated circuit includes a first surface configured for mounting to a carrier, an active area of the integrated circuit spaced from the first surface, a...
US-7,612,430 Silicon bipolar transistor, circuit arrangement and method for producing a silicon bipolar transistor
The silicon bipolar transistor (100) comprises a base, with a first highly-doped base layer (105) and a second poorly-doped base layer (106) which together form...
US-7,612,408 MOS transistor device
The invention relates to a MOS transistor device of the trench type, in which, in a semiconductor region of a first conductivity type, within a deep gate trench...
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