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Patent # Description
US-7,554,157 Lateral SOI component having a reduced on resistance
An SOI semiconductor component comprises a semiconductor substrate having a basic doping, a dielectric layer arranged on the semiconductor substrate, and a...
US-7,554,137 Power semiconductor component with charge compensation structure and method for the fabrication thereof
A semiconductor component (1) with charge compensation structure (3) has a semiconductor body (4) having a drift path (5) between two electrodes (6, 7). The...
US-7,553,745 Integrated circuit package, panel and methods of manufacturing the same
A method of manufacturing an integrated circuit package includes: assembling a composite wafer including alternating rows or columns of first and second strips...
US-7,553,703 Methods of forming an interconnect structure
Semiconductor devices having conductive lines with extended ends and methods of extending conductive line ends by a variable distance are disclosed. An end of a...
US-7,552,273 Memory circuit and method for writing into a target memory area
A memory circuit having a plurality of memory areas, whose order depends on respectively associated logical addresses, and which each have an associated control...
US-7,552,257 Data transmission device with a data transmission channel for the transmission of data between data processing...
The present invention provides a data processing apparatus having at least one dedicated data processing device (10) of a first type, a central data processing...
US-7,551,890 Method for reducing the radiation load by a mobile radio terminal with directional emission, and a mobile radio...
In a method for alignment of an antenna (1) with an adjustable directional characteristic in a mobile station in a mobile radio system, the alignment process is...
US-7,551,695 Verification of the antenna weights of the base station in a UMTS mobile radio receiver by use of the Viterbi...
A mobile station sends to the base stations a bit vector which contains weighting factors (w1, w2) for the amplitudes and/or the phases of the signals to be...
US-7,551,591 Method for data transmission within a wireless local area network
Method for data transmission within a wireless local area network (WLAN) which is operable simultaneously with other wireless local area networks (WLANs) in the...
US-7,551,558 Method and system for controlling bandwidth allocation
A Ethernet switch 1 includes a monitoring unit 9 for policing the amount of traffic on each of a plurality of flows or groups of flows. The monitoring unit has a...
US-7,551,034 Saturation handling
Saturation handling for preventing a power amplifier from going into a saturation condition is disclosed.
US-7,550,986 Semiconductor wafer having a dielectric reliability test structure, integrated circuit product and test method
A semiconductor wafer includes a dielectric test structure including a voltage line, a control line, and a plurality of test devices connected in parallel to the...
US-7,550,854 Integrated interconnect arrangement
An explanation is given of an integrated interconnect arrangement having a plurality of interconnects that cross over one another at two crossover sections. By...
US-7,549,093 Method for changing a depth of an interleaver device or de-interleaver device and corresponding interleaver...
Methods for changing a depth of interleaver devices and de-interleaver devices are provided, whereby a change in the depth is possible while transmitting or...
US-7,549,068 Data processing apparatus and method for operating a dual rail circuit component in a security mode and power...
A data processing apparatus having a dual rail circuit component and a control unit for production of drive signals for the dual rail circuit component. The...
US-7,549,001 Digital RAM memory circuit with an expanded command structure
Methods, systems, and articles of manufacture for transferring control commands to a memory device. In one embodiment, the memory device comprises at least one...
US-7,548,825 Method and apparatus for current and temperature measurement in an electronic power circuit
A current/temperature measurement method using parasitic components in an electronic power circuit is disclosed. The measured values derived from these parasitic...
US-7,548,732 Power amplifier arrangement having two or more antenna coupling respective amplifiers to a supply potential
A power amplifier arrangement having a distributed antenna is disclosed. The power amplifier arrangement has two or more signal paths which are coupled to a...
US-7,548,616 Termination device for a telephone line
A termination device for a telephone line of a wire based telephone system, said termination device (30) comprising: a high pass filter (39) for separating...
US-7,548,590 Method for determining an offset value for a gain of a transmission path, transmission path with adjustable...
In a transmission path having two discrete-value adjustable amplifiers, a first amplifier is set with a first gain factor and a second amplifier is set with a...
US-7,548,477 Method and apparatus for adapting circuit components of a memory module to changing operating conditions
A method adapts circuit components of a memory module to changing operating conditions within a predefined range. According to one embodiment, a memory module...
US-7,548,474 Device for reading out a memory cell including a regulating circuit with parallel switching elements, and method
A method for reading out a memory cell, and a device to be used for reading out a memory cell. In one embodiment, the device includes a first circuit and a...
US-7,548,448 Integrated circuit having a switch
A reprogrammable switch includes a first phase-change element, a first reference element, and a second reference element. The switch includes a sense amplifier...
US-7,547,646 Trench capacitor structure and process for applying a covering layer and a mask for trench etching processes in...
A stress relief layer between a single-crystal semiconductor substrate and a deposited silicon nitride layer or pad nitride is formed from thermally produced...
US-7,547,645 Method for coating a structure comprising semiconductor chips
A method for coating a structure that includes at least one semiconductor chip involves electrostatically depositing coating particles on the areas of the...
US-7,547,505 Methods of forming capping layers on reflective materials
A reflective material is heated to reduce internal stress, and then a capping layer is formed over the reflective material. Heating the reflective material...
US-7,545,933 Decryption circuit, encryption circuit, logic cell, and method of performing a dual-rail logic operation in...
A decryption circuit for generating a decrypted data signal and a complementary decrypted data signal from a key. In addition, a means for performing a linkage...
US-7,545,892 Method and circuit for controlling the input signal for a contactless transponder
Method for controlling an input signal for a contactless transponder, in which a signal strength of an amplitude-modulated input signal is controlled to a...
US-7,545,885 Compensation for the carrier frequency offset in a receiving apparatus, which is designed for a plurality of...
The present invention relates to a receiving apparatus for a mobile communications system which can be modulated using different modulation types at the...
US-7,545,232 Polar modulator arrangement and polar modulation method
A polar modulator arrangement has a first and a second node to receive a digital signal with a first and a second component corresponding to a digital amplitude...
US-7,545,192 Clock stop detector
A clock stop detector for a memory comprises a first switch that closes in response to a first logic level of a clock signal to charge a capacitor, a second...
US-7,545,149 Driver and receiver circuit for a remotely arranged circuit and corresponding method
A driver and receiver circuit includes at least one output terminal for connecting a line connection. The circuit further includes a voltage supply arrangement...
US-7,545,048 Stacked die package
A stacked die package includes a substrate or interposer board that includes a contact area on a top surface and landing pads surrounding the contact area....
US-7,545,047 Semiconductor device with a wiring substrate and method for producing the same
A semiconductor device with a wiring substrate as a stacking element for a semiconductor device stack is described herein. The wiring substrate includes a...
US-7,545,016 Integrated layer stack arrangement, optical sensor and method for producing an integrated layer stack arrangement
An integrated layer stack arrangement, an optical sensor and a method for producing an integrated layer stack arrangement is disclosed. Generally, an integrated...
US-7,544,553 Integration scheme for fully silicided gate
To form a semiconductor device, a silicon (e.g., polysilicon) gate layer is formed over a gate dielectric and a sacrificial layer (preferably titanium nitride)...
US-7,544,270 Apparatus for processing a substrate
An apparatus includes a plasma process chamber and a support element capable of supporting a substrate inside the plasma process chamber. At least one plasma...
US-7,543,491 Capacitive measurement of tire deformation
The invention relates to systems and methods for detecting and monitoring tire deformation. In one embodiment, a tire deformation detection system comprises a...
US-7,543,249 Embedded switchable power ring
An integrated circuit comprises an embedded switchable power ring for supplying power to circuit modules (15.1, . . . , 15.5) arranged within the switchable...
US-7,542,726 Methods and apparatuses for detecting the TX diversity mode for mobile radio receivers
In a method and an apparatus (1) for transmission diversity mode detection in a mobile radio receiver using a decision function, the decision function which is...
US-7,542,254 Method for producing a protective assembly for protecting an electronic component from electrostatic discharge,...
An electronic component includes a first circuit portion having a first supply voltage terminal and a second circuit portion having a second supply voltage...
US-7,541,876 Amplifier and method for operating the same
An amplifier includes an input terminal, an output terminal, a cascode circuit with a first and a second transistor serially coupled between an output terminal...
US-7,541,802 Method and apparatus for evaluating a sensor signal associated with a rotating object
A method for evaluating a sensor signal provided by a magnetic field sensor which is arranged at a distance from an object which is rotatable about an axis of...
US-7,541,681 Interconnection structure, electronic component and method of manufacturing the same
An interconnection structure includes an electrically conductive bump, wherein the electrically conductive bump has a metal body having a distal end. The metal...
US-7,541,660 Power semiconductor device
A The semiconductor device has a heavily doped substrate and an upper layer with doped silicon of a first conductivity type disposed on the substrate, the upper...
US-7,541,637 Non-volatile semiconductor memory element and corresponding production and operation method
The invention relates to a nonvolatile semiconductor storage element and an associated production and control method, the storage element includes a...
US-7,541,290 Methods of forming mask patterns on semiconductor wafers that compensate for nonuniform center-to-edge etch...
Methods of forming integrated circuit devices include steps to selectively widen portions of a mask pattern extending adjacent an outer edge of a semiconductor...
US-7,541,288 Methods of forming integrated circuit structures using insulator deposition and insulator gap filling techniques
Methods of forming integrated circuit devices include depositing an electrically insulating layer onto an integrated circuit substrate having integrated circuit...
US-7,541,260 Trench diffusion isolation in semiconductor devices
A semiconductor structure is formed comprising a plurality of columns doped with alternating dopants. The columns are separated by trenches, and the dopant is...
US-7,541,234 Methods of fabricating integrated circuit transistors by simultaneously removing a photoresist layer and a...
Integrated circuit transistors may be fabricated by simultaneously removing a photoresist layer on a first active area of an integrated circuit substrate and a...
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