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Patent # Description
US-7,643,341 Integrated circuit having a memory arrangement
An integrated circuit having a memory arrangement is disclosed. In one embodiment, the memory arrangement includes a plurality of memory cells, a delete line for...
US-7,643,332 MRAM cell using multiple axes magnetization and method of operation
A magnetic random access memory cell includes a free layer structure and a reference layer structure including an anti-ferromagnetic layer structure pinning the...
US-7,642,877 Self-oscillating modulator and method for adjusting a self-oscillating modulator
A self-oscillating pulse-width modulator comprises an input, an output and a control loop. The control loop comprises a forward branch and a feedback loop. The...
US-7,642,861 Locked loop system
This disclosure relates to a phase locked loop and a frequency locked loop.
US-7,642,854 Amplifier circuit having an output transistor for driving a complex load
An amplifier circuit is disclosed having an output transistor for driving a complex load over a drive frequency range, wherein in the lower part of the range an...
US-7,642,821 Method for synchronizing a clock signal with a reference signal, and phase locked loop
A method for synchronizing a clock signal with a reference signal is disclosed. One embodiment has a first synchronization part which has a bit pattern having a...
US-7,642,817 Driver circuit for a semiconductor power switching element
An apparatus and method for driving a semiconductor switching element. The apparatus is configured to monitor at least one state variable of the semiconductor...
US-7,642,752 Method of determining a frequency interval containing a resonance frequency of a rechargeable battery
Disclosed is a method of determining a resonance frequency interval containing the resonance frequency of a rechargeable battery. The method comprises applying...
US-7,642,641 Integrated circuit component with passivation layer
A semiconductor component includes a semiconductor chip provided with a passivation layer that covers the topmost interconnect structure of the semiconductor...
US-7,642,544 Production method for semiconductor component with stress-carrying semiconductor layer
The invention relates to a semiconductor component with stress-absorbing semiconductor layer (SA) and an associated fabrication method, a crystalline stress...
US-7,642,158 Semiconductor memory device and method of production
The bit lines are produced by an implantation of a dopant by means of a sacrificial hard mask layer, which is later replaced with the gate electrodes formed of...
US-7,642,104 Method for contacting semiconductor components with a test contact
A method for contacting an external contact area with a test contact is provided. The external contact area has a galvanically applied coating of a metal or a...
US-7,640,469 Electronic element comprising an electronic circuit which is to be tested and test system arrangement which is...
An electronic element, test system and method of testing an electronic circuit are provided. The electronic circuit has input and output terminals. The input...
US-7,640,002 RF amplifier
An RF amplifier for amplifying a composite RF signal includes a first RF signal and a second RF signal. The amplifier includes a first amplifying stage for...
US-7,639,744 Programmable digital bandpass filter for a codec circuit
A codec circuit having a programmable digital bandpass filter is disclosed. According to one aspect, a bandpass filter matches the filter characteristics of the...
US-7,639,684 Modified ethernet switch
There is provided a modified Ethernet switch for directing data packets to and from a plurality of Ethernet ports. The switch is arranged to forward each data...
US-7,639,182 Distance measurement in a radio communication device
A radio communication arrangement including a plurality of transceivers and a distance measurement managing circuit. The distance measurement managing circuit is...
US-7,639,102 Reconfigurable duplexing couplers
A multi-port reconfigurable coupler includes a coupler and a switching system configured to selectively reconfigure multiple ports of the coupler for increased...
US-7,638,434 Method for filling a trench in a semiconductor product
Method for filling a trench in a semiconductor product is disclosed. A first material is deposited onto a semiconductor product having a surface in which at...
US-7,638,418 Wiring substrate of a semiconductor component comprising rubber-elastic pads embedded in said wiring substrate...
A wiring substrate of a semiconductor component includes: an underside with a wiring structure; a top side with cutouts; a rubber-elastic material arranged in...
US-7,638,370 Method for producing multi-gate field-effect transistor with fin structure having drain-extended MOS...
In a method for producing an electronic component, a first doped connection region and a second doped connection region are formed on or above a substrate; a...
US-7,637,158 Excitation in micromechanical devices
A resonant structure for a micromechanical device includes a crystalline silicon beam and at least one mass attached to the beam. An excitation plane of the...
US-7,636,903 Device and method for testing an electric circuit
A method and device for testing an electric circuit, wherein exhaustive electric circuit modulation is not required yet circuit errors can be recognized in a...
US-7,636,806 Electronic system and method for sending or receiving a signal
A method operating an electronic system including sending or receiving a signal is disclosed. One embodiment includes changing a parameter of a signal from a...
US-7,636,374 Hardware apparatus for conditioning pilot symbols for channel estimation using adaptive low-pass filtering
A hardware apparatus (10) for conditioning pilot symbols for channel estimation in a mobile radio comprises a time-division multiplexed low-pass filter unit for...
US-7,636,249 Rectifier circuit
Disclosed is a method for operating a transistor as a rectifier element, and a circuit arrangement including a control circuit and a transistor.
US-7,636,013 Method and integrated circuit including an amplifier calibration circuit
An integrated circuit including a circuit for calibration and offset compensation of an amplifier method is disclosed. In one embodiment, the method includes...
US-7,635,911 Chip carrier and system including a chip carrier and semiconductor chips
A chip carrier includes a first surface and a second surface that opposes the first surface. The chip carrier acts as a heat sink for semiconductor chips...
US-7,635,910 Semiconductor package and method
A semiconductor package is disclosed. In one embodiment, the semiconductor package includes a leadframe including a chip position and a plurality of leadfingers....
US-7,635,909 Semiconductor diode and IGBT
A semiconductor diode has an anode, a cathode and a semiconductor volume provided between anode and cathode. A plurality of semiconductor zones are formed in the...
US-7,635,908 Corresponding capacitor arrangement and method for making the same
The invention relates to a method for producing a capacitor arrangement, and to a corresponding capacitor arrangement, wherein the first insulating layer is...
US-7,635,893 Transistor, memory cell array and method of manufacturing a transistor
A transistor, memory cell array and method of manufacturing a transistor are disclosed. In one embodiment, the invention refers to a transistor, which is formed...
US-7,635,887 Integrated circuit arrangement with capacitor in an interconnect layer and method
An integrated circuit arrangement includes an undulating capacitor in a conductive structure layer. The surface area of the capacitor is enlarged in comparison...
US-7,635,867 Nanotube array and method for producing a nanotube array
A nanotube array and a method for producing a nanotube array. The nanotube array has a substrate, a catalyst layer, which includes one or more subregions, on the...
US-7,635,642 Integrated circuit package and method for producing it
An integrated circuit includes a first integrated circuit flip chip (105, 205, 305) is bonded to first electric contacts (102, 202, 302) which are an inner part...
US-7,635,634 Dielectric apparatus and associated methods
In an embodiment of the invention, an amorphous phase dielectric material is selectively formed over a substrate. The amorphous phase dielectric material is then...
US-7,635,612 Method and use of a device for applying coatings to band-like structures during the production of semiconductor...
In a device (35) and a method a thin organic or inorganic layer is applied to individual component positions of band-like structures (1). The layer can effect...
US-7,634,700 Semiconductor device with test interface
A semiconductor device with test interface, as well as to a method for operating a semiconductor device is disclosed. In one embodiment, in a test operating...
US-7,634,640 Data processing apparatus having program counter sensor
Data processing apparatus having an execution unit, a flow controller having a program counter, and a program counter sensor, which is connected to a data bus...
US-7,634,245 Receiver, in particular for mobile radio
A receiver, in particular for mobile radio, includes a receiver branch with a mixer, downstream of an analog/digital converter. A reference generator generates a...
US-7,634,013 DC offset estimation and compensation of OFDM radio receivers by weighted averaging over a section of the...
Each burst of an OFDM signal which is transmitted, for example, on the basis of the IEEE 802.11a/g WLAN Standard contains a preamble with a sequence of ten short...
US-7,634,009 Method and device for picture compression using a plurality of sampling patterns
In order to realize effective picture compression without significantly impairing the resolution, it is proposed that the picture to be compressed be subdivided...
US-7,633,787 ROM memory component featuring reduced leakage current, and method for writing the same
The invention relates to a ROM memory cell comprising a first terminal connected to a word line, comprising a second terminal and comprising a third terminal,...
US-7,633,561 Integrated circuit television receiver arrangement
According to one or more aspects of the present invention, a receiver arrangement is disclosed that is configured to receive digital television signals. The...
US-7,633,419 Signal conversion using finite impulse response feedback
Techniques for converting signals using finite impulse response (FIR) feedback are described herein.
US-7,633,333 Systems, apparatus and methods relating to bandgap circuits
A system includes a bandgap reference voltage circuit, a plurality of trimming resistors, a plurality of trimming switches to connect the bandgap reference...
US-7,633,321 Driver circuit; electronic circuit having driver circuit and corresponding method
A driver circuit includes an output, at least one transistor including a load section coupled between the output and a supply voltage, and a circuit coupled to a...
US-7,633,313 Differential line compensation apparatus, method and system
A differential line compensation apparatus, semiconductor chip and system are disclosed.
US-7,633,276 Switching control in DC-DC-converters
A switching control circuit for a DC-DC converter comprises an input terminal to receive input signals and an output terminal to couple the switching control...
US-7,633,275 Cyclical DC voltage converter for suppressing voltage spikes and oscillations
A DC voltage converter is provided that cyclically converts an input-side supply voltage into an output voltage. The converter includes an inductive storage...
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