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Apparatus and method for regulating the output power of an amplifier stage
The present invention relates to a device and a method for regulating the output power of an amplifier stage, e.g. an amplifier stage in a mobile data...
Desaturation circuit for an IGBT
A desaturation circuit for an IGBT is disclosed. In one embodiment, flooding of the component with charge carriers is reduced before the IGBT is turned off.
Circuit arrangement having a transistor component and a freewheeling
A circuit arrangement configured to drive a load is disclosed herein. The circuit arrangement comprises a first and a second supply potential terminal for...
Circuit arrangement comprising a sample-and-hold device and method for
signal processing in a sample-and-hold...
In a circuit arrangement including a sample-and-hold device, the sample-and-hold device includes a first, a second, a third and a fourth charge store, and also a...
Method and device for programmable power supply with configurable
The invention involves a programmable power supply device with configurable restrictions to the programmability of the power supply device, wherein the...
Test switching circuit for a high speed data interface
A test switching circuit for a high speed data interface is disclosed. Test switching circuit for a high speed data interface of an integrated circuit including...
Step-up converter having an improved dynamic response
A step-up converter includes input and output terminals, step-up conversion circuitry, a first feedback path and a drive circuit. The input terminals are...
Semiconductor devices and methods of manufacture thereof
Semiconductor devices and methods of manufacture thereof are disclosed. In a preferred embodiment, a semiconductor device includes a workpiece and a trench...
Trench structure semiconductor device and method for producing it
A trench structure semiconductor device is disclosed. In one embodiment, field electrode devices are arranged in a trench structure, in direct spatial proximity...
Semiconductor device and method for making same
One or more embodiments, relate to a field effect transistor, comprising: a substrate; a gate stack disposed over the substrate, the gate stack comprising a gate...
System and method including a prealigner
A system and method for prealigning a substrate. One embodiment provides a rotor configured to rotate a carrier around a rotation axis in response to a rotation...
Method of forming component package
There is provided a method of forming a component package. The method includes the steps of providing the die pad or heat sink, forming an isolation layer on the...
Method for producing and cleaning surface-mountable bases with external
In a method for producing bases with external contacts for surface mounting on circuit mounts, bases with external contacts are electrodeposited on semiconductor...
Designated MOSFET and driver design to achieve lowest parasitics in
Apparatus are described for a pair of MOSFET power transistors, a MOSFET driver, and an idealized circuit layout utilized in a power stage such as that of a...
Device and method for determining a position of a bit error in a bit
In a device for determining a position of a bit error in a bit sequence, a check matrix is used which has a predefined number of rows and a predefined number of...
Method and apparatus for post-processing a raw bit sequence of a noise
An apparatus for post processing a raw bit sequence generated by a noise source, comprises a derivation unit for deriving a random word from each bit sequence...
Random number generator and method for generating random numbers
Random number generator including a first signal source outputting a first signal having a first frequency, a second signal source outputting a second signal...
Method and apparatus for adapting threshold values in electronic signal
A method for adapting threshold values in an electronic signal processing device, involving a plurality of different threshold values being calculated and being...
Test apparatus for digitized test responses, method for testing
semiconductor devices and diagnosis method for...
A test apparatus for testing digitized test responses has a generator and a signal extractor. The generator uses direct digital synthesis to generate a set of n...
Method for setting a reference potential of a current sensor and
arrangement for determining the reference...
A method for setting a reference potential of a current sensor in a power semiconductor device is disclosed. On the basis of a specific geometry and a typical...
Semiconductor device with surface-mountable external contacts and method
for manufacturing the same
A semiconductor device includes surface-mountable external contacts on an underside of the semiconductor device, wherein the external contacts are arranged on...
High-frequency bipolar transistor
A high-frequency bipolar transistor includes an emitter contact adjoining an emitter connection region, a base contact adjoining a base connection region, and a...
Fin field effect transistor arrangement and method for producing a fin
field effect transistor arrangement
A fin field effect transistor arrangement comprises a substrate and a first fin field effect transistor on and/or in the substrate. The first fin field effect...
Integrated circuit ESD protection
A protective device in a semiconductor may comprise a substrate of a first conductivity type, an epitaxial layer formed on top of the substrate, a body area...
Method of forming a semiconductor structure comprising insulating layers
with different thicknesses
The method of forming a semiconductor structure in a substrate comprises, forming a first trench with a first width W.sub.e and a second trench with a second...
Method of degasification in semiconductor cleaning
A method of improving the effectiveness of semiconductor cleaning solvents is provided. Insoluble gas bubbles, typically air, hinder wet chemical cleaning...
Circuit for compression and storage of circuit diagnosis data
A compactor includes test data inputs that are connectable to circuit outputs of an electrical circuit, test comparison inputs, and test data outputs. The...
A carry-ripple adder has four summing inputs for receiving four input bits having the significance w that are to be summed, three carry inputs for receiving...
Automatic selection of the transmission standard in mobile television
In a radio system for transmitting information channels A1, A2, A3 to radio receivers, the information channels A1, A2, A3 are transmitted in parallel over a...
Monitoring a load driven by a power semiconductor switch
A method and an apparatus for monitoring a load driven by a power semiconductor switch. The method may comprise, for example: driving a control electrode of the...
Phase alignment circuit for a TDC in a DPLL
The present disclosure relates to circuits and methods for accelerating a new frequency lock-in process of a digital phase-locked loop.
Bias circuit with a feedback path and a method for providing a biasing
Embodiments of the invention show a bias circuit for providing a biasing signal at a bias connection. The bias circuit includes a bias transistor and a feedback...
Voltage regulator arrangement
A voltage regulator arrangement having a first voltage regulator, whose input connection is connected to the supply potential connection and whose output...
Chip module and method for producing a chip module
A chip module comprises a substrate, a chip arranged on one side of the substrate and conductor structures arranged on at least one side of the substrate and...
Semiconductor chip arrangement
A patterned connection plane between two semiconductor chips which are connected using face-to-face technology is patterned into first pads, second pads, and...
Electronic module with a semiconductor chip and a component housing and
methods for producing the same
An electronic module includes a component housing and at least one semiconductor chip. The semiconductor chip is arranged on a circuit carrier in the component...
Electronic circuit in a package-in-package configuration and production
An electronic circuit in a package-in-package configuration and a production method is disclosed. One embodiment provides an arrangement enveloped by an...
Semiconductor component with Schottky zones in a drift zone
A description is given of a semiconductor component comprising a drift zone of a first conduction type and at least one Schottky metal zone arranged in the drift...
Semiconductor devices and methods of manufacture thereof
Semiconductor devices and methods of manufacture thereof are disclosed. A preferred embodiment comprises a method of forming a barrier layer. The method of...
Small feature integrated circuit fabrication
A method for controlling etching during photolithography in the fabrication of an integrated circuit in connection with first and second features that are formed...
Method for fabricating a layer arrangement, layer arrangement and memory
The disclosed embodiments relate to a method for the production of a layer arrangement, a layer arrangement and a memory arrangement. According to one aspect at...
Panel and semiconductor device having a composite plate with semiconductor
The invention relates to a panel and a semiconductor device including a composite plate with semiconductor chips and a plastic packaging compound, and to...
Test circuit arrangement
A test circuit arrangement for testing latch units is provided which includes a) a voltage generator configured to adjust a voltage potential difference between...
Transmitting and receiving arrangement with a channel-oriented link
A transmitting and receiving arrangement as well as a method for transmission of monitoring and/or payload data in a transmitting and receiving arrangement for a...
There is provided an apparatus and method for ATM bonding. The apparatus comprises a first unit having a first xDSL line connected thereto, a second unit having...
Medium access control unit
A check is carried out for those stored transport formats which have been declared as being temporarily permissible by a mobile radio base station to determine...
Circuitry and method for an at-speed scan test
An integrated circuit has a plurality of clock domains and a plurality of memory cells being configurable as operational memory cells or as scan test memory...
Drive circuit for a firing element of an occupant protection system
A drive circuit for a firing element of an occupant protection system comprises first and second supply potential terminals and first and second firing element...
System including an inter-chip communication system
A system including an inter-chip communication system is disclosed. One embodiment includes a base chip including a base chip transceiver network. At least one...
Integrated circuit with auto-zeroing comparator stages that provide a
An integrated circuit includes first and second inputs configured to receive an input signal. A plurality of comparator stages is coupled in parallel to the...