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Patent # Description
US-7,943,973 Method for producing a field-effect transistor, field-effect transistor and integrated circuit arrangement
A method for producing a tunnel field-effect transistor is disclosed. Connection regions of different doping types are produced by means of self-aligning...
US-7,943,960 Integrated circuit arrangement including a protective structure
An integrated circuit arrangement. In one embodiment, the arrangement includes at least one first semiconductor zone of a first conduction type which is doped...
US-7,943,955 Monolithic semiconductor switches and method for manufacturing
One aspect is monolithic semiconductor switches and method for manufacturing. One embodiment provides one semiconductor die with a first and a second FET. One...
US-7,943,928 ESD protection structures for semiconductor components
An ESD protection structure includes a structure to be protected disposed in a semiconductor body. A region of a first conductivity type is disposed within the...
US-7,943,449 Semiconductor component structure with vertical dielectric layers
A method for producing a semiconductor structure and a semiconductor component are described.
US-7,943,423 Reconfigured wafer alignment
A method of manufacturing semiconductor device comprises placing multiple chips onto a carrier. An encapsulation material is applied to the multiple chips and...
US-7,941,676 Processor array having a multiplicity of processor elements and method of transmitting electricity between...
Disclosed is a processor element including a plurality of power supply interfaces, a plurality of power supply switches, and a fault-testing unit for testing...
US-7,941,604 Distributed memory usage for a system having multiple integrated circuits each including processors
A plurality of integrated circuits in a system, each having a program memory loaded with different sections of a program, and a second memory. The integrated...
US-7,940,848 System having an OFDM channel estimator
A method for an operating system including a channel estimation for OFDM systems in a receiver is disclosed. One embodiment provides information indicative of...
US-7,940,830 Fast hopping frequency synthesizer
Apparatus and systems for synthesizing frequencies for use in a fast hopping wireless communications system. A frequency synthesizer comprises a plurality of...
US-7,940,503 Power semiconductor arrangement including conditional active clamping
A power semiconductor arrangement including conditional active clamping (CAC). One embodiment includes a power semiconductor arrangement. A controllable power...
US-7,940,034 Apparatus for detecting a state of operation of a power semiconductor device
An embodiment of the invention relates to an apparatus including a power semiconductor device and a processor coupled thereto. The processor is configured to...
US-7,939,946 Chip with a vertical contact structure
A chip with a chip plane includes a functional area, a contact structure vertical with respect to the chip plane for connecting the functional area, which...
US-7,939,942 Semiconductor devices and methods of manufacturing thereof
Semiconductor devices, methods of manufacturing thereof, lithography masks, and methods of designing lithography masks are disclosed. In one embodiment, a...
US-7,939,885 Semiconductor device and method of manufacturing a semiconductor device
A semiconductor device has a substrate having a plurality of neighboring trenches, and a contact area, one mesa stripe each being formed between two neighboring...
US-7,939,850 Semiconductor device and method for producing a semiconductor device
A semiconductor device has a semiconductor body with a semiconductor device structure including at least a first electrode and a second electrode. Between the...
US-7,939,381 Method of semiconductor packaging and/or a semiconductor package
The method includes forming a leadframe. The leadframe is directly bonded to the semiconductor chip. The leadframe is flexed and/or compressed in a mold cavity....
US-7,937,678 System and method for integrated circuit planar netlist interpretation
Systems and methods for integrated circuit planar netlist interpretation are disclosed. In one embodiment, higher abstraction level descriptions of an...
US-7,937,639 Device and method for reading out a data word and device and method for storing a data block
A device for reading out a predetermined data word from a memory in which a data block is divided into a plurality of data words including the predetermined...
US-7,937,594 Apparatus and method for a programmable security processor
A digital logic circuit comprises a programmable logic device and a programmable security circuit. The programmable security circuit stores a set of authorized...
US-7,936,575 Synchronous rectifier control using load condition determination
In accordance with an embodiment of the present invention, a method of operating a switched power supply is disclosed. The method comprises determining a...
US-7,936,052 On-chip RF shields with backside redistribution lines
Structures of a system on chip and methods of forming a system on chip are disclosed. In one embodiment, a method of fabricating the system on chip includes...
US-7,936,048 Power transistor and power semiconductor device
In a power semiconductor device, the vertically conducting power transistor has at its front side (11) a source zone (14) and a control input (16). A...
US-7,936,045 Integrated circuit with multi-stage matching circuit
An integrated circuit with a multi-stage matching circuit with an inductive conductive structure with a first end and a second end in the integrated circuit and...
US-7,936,010 Power semiconductor having a lightly doped drift and buffer layer
A power semiconductor element having a lightly doped drift and buffer layer is disclosed. One embodiment has, underneath and between deep well regions of a...
US-7,935,622 Support with solder ball elements and a method for populating substrates with solder balls
A support with solder ball elements for loading substrates with ball contacts is disclosed. One embodiment provides a system for loading substrates with ball...
US-7,935,593 Stress optimization in dual embedded epitaxially grown semiconductor processing
Embodiments of the present disclosure provide stress optimization during manufacturing of dual embedded epitaxially grown (EPI) semiconductor structures using...
US-7,934,189 Method of making an integrated circuit including simplifying metal shapes
A method for simplifying metal shapes in an integrated circuit including receiving an incoming wire layout for at least one metal layer of an integrated...
US-7,932,753 Potential converter circuit
Embodiments of a potential converter circuit include a converter for converting a bipolar input signal to a unipolar output signal that only consumes current at...
US-7,932,622 Power switch circuit for driving an airbag squib module
A power switch circuit for driving an airbag squib module has a power transistor, a pre-charge capacitance for storing a charge, a charging circuit and a...
US-7,932,598 Connection between a semiconductor housing and a base plate comprising a passage opening for fastening to a...
A semiconductor module has a housing (2) and a metal base plate (3). A reliable yet easily producible force-transmitting connection between a semiconductor...
US-7,932,587 Singulated semiconductor package
A semiconductor device includes a singulated semiconductor package having a leadframe, a chip electrically coupled to the leadframe, encapsulating material...
US-7,932,583 Reduced free-charge carrier lifetime device
According to one embodiment, a semiconductor device comprises a body of a first conductivity type having a source region and a channel, the body being in...
US-7,932,542 Method of fabricating an integrated circuit with stress enhancement
A method of fabricating an integrated circuit including arranging a plurality of cells to form a desired floor plan of the integrated circuit, wherein each cell...
US-7,932,180 Manufacturing a semiconductor device via etching a semiconductor chip to a first layer
A method of manufacturing a semiconductor device. The method includes providing a semiconductor chip including contact elements on a first face and a first...
US-7,930,660 Measurement structure in a standard cell for controlling process parameters during manufacturing of an...
Implementations are presented herein that relate to a standard cell including a measuring structure for controlling process parameters during manufacture of an...
US-7,929,936 Receiver arrangement with AC coupling
A receiver arrangement with AC coupling is specified in which a filter arrangement (3) is provided in a baseband signal processing chain in a homodyne receiver...
US-7,928,886 Emulation of analog-to-digital converter characteristics
Described herein is a system and method of emulating characteristics of an output signal of a first analog-to-digital converter by a second analog-to-digital...
US-7,928,867 Analog to digital converter with digital filter
Disclosed herein are devices, methods, and techniques including analog to digital converters having at least one digital filter.
US-7,928,800 Programmable compensation network for operational amplifiers
Systems and methods for implementing a programmable network for a multimode conditionally stable operational amplifier are disclosed.
US-7,928,775 High-side switch arrangement
High-side switch arrangement having a switching transistor, the collector of which is connected to a battery connection of the high-side switch arrangement and...
US-7,928,774 Adaptive drive signal adjustment for bridge EMI control
An embodiment of the invention relates to a driver adapted to provide a drive signal with an adjustable waveform for an external bridge to control EMI. The...
US-7,928,743 Measuring bridge arrangement, method of testing a measuring bridge, test arrangement for testing a measuring...
A measuring bridge arrangement has a measuring bridge with a first supply terminal and first and second measuring signal terminals. The measuring bridge...
US-7,928,553 Power electronic device
An electronic device and method is disclosed. In one embodiment, a method includes providing an electrically insulating substrate. A first electrically...
US-7,928,481 Method and layout of semiconductor device with reduced parasitics
An semiconductor device is disclosed. The device includes a semiconductor body, a layer of insulating material disposed over the semiconductor body, and a...
US-7,926,728 Integrated circuit device including a contactless integrated circuit inlay
Embodiments provide an integrated circuit device including a contactless integrated circuit inlay. The device includes a substrate, an integrated circuit...
US-7,926,353 Pressure sensor including switchable sensor elements
A semiconductor device includes a first sensor element in a first branch of a Wheatstone bridge and a second sensor element in a second branch of the Wheatstone...
US-7,925,684 Method and apparatus for distributing random elements
Apparatus for distributing valid random elements, including at least a first module and a second module. The first module is connected to a provider of valid...
US-7,925,230 Diversity receiver with channel estimator
A diversity receiver includes a plurality of antennas to receive radio frequency signals. A plurality of receiver circuits are each coupled to a respective one...
US-7,925,223 Coil pair with carrier suppression
A coil pair having a transmission coil and a reception coil. The transmission coil is configured to transmit a transmission signal having a carrier. The...
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