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Patent # Description
US-7,852,742 Precompensation of crosstalk interference based on feedback error signal
A device has a plurality of output terminals to provide a plurality of signals to a plurality of transmission links; at least one input terminal to receive...
US-7,852,135 Circuit arrangement for signal mixing
A circuit arrangement for signal mixing. One embodiment provides a circuit arrangement for mixing an input signal with at least one carrier signal. The circuit...
US-7,851,927 Semiconductor component comprising a semiconductor chip and semiconductor component carrier with external...
A semiconductor component (1) has a semiconductor chip (5) and a semiconductor component carrier (3) with external connection strips (12, 13, 15). The...
US-7,851,925 Wafer level packaged MEMS integrated circuit
A wafer-level packaged integrated circuit includes a semiconductor substrate including a first silicon layer. A micro-electromechanical system (MEMS) device is...
US-7,851,913 Semiconductor device including a power device with first metal layer and second metal layer laterally spaced apart
A semiconductor device exhibits a first metal layer, made of a first metal, with at least one contiguous subsection. At least one second metal layer, made of a...
US-7,851,910 Diffusion soldered semiconductor device
The invention relates to a process for the multi-stage production of diffusion-soldered joints for power components with semiconductor chips, the melting points...
US-7,851,908 Semiconductor device
A semiconductor device is disclosed. One embodiment provides a module including a first carrier having a first mounting surface and a second mounting surface, a...
US-7,851,899 Multi-chip ball grid array package and method of manufacture
A BGA package is disclosed including a base IC structure having a base substrate, with an opening running length-wise there through. A first semiconductor chip...
US-7,851,875 MEMS devices and methods of manufacture thereof
Micro-electromechanical system (MEMS) devices and methods of manufacture thereof are disclosed. In one embodiment, a MEMS device includes a first semiconductive...
US-7,851,844 Memory device having cross-shaped semiconductor fin structure
In an embodiment, a memory device, including: a semiconductor fin structure, each end portion of the fin structure including a source/drain region; a charge...
US-7,851,829 Semiconductor chip module
One aspect includes a sensor chip module including a sensor chip and a module housing accommodating the sensor chip. The module housing defines a mounting plane...
US-7,851,373 Processing systems and methods for semiconductor devices
Systems and methods for processing semiconductor devices are disclosed. A preferred embodiment comprises a processing method that includes providing a processing...
US-7,851,362 Method for reducing an unevenness of a surface and method for making a semiconductor device
In order to reduce an unevenness of a surface of a body, a sacrificial layer is applied to the surface, a chemical-mechanical polishing of the sacrificial layer...
US-7,851,349 Method for producing a connection electrode for two semiconductor zones arranged one above another
A method for producing a connection electrode for a first semiconductor zone and a second semiconductor zone includes producing a trench extending through the...
US-7,851,334 Apparatus and method for producing semiconductor modules
An apparatus and method for producing semiconductor modules is disclosed. One embodiment provides for bonding at least one semiconductor die onto a carrier...
US-7,851,333 Apparatus comprising a device and method for producing it
An apparatus comprises a device layer structure, a device integrated into the device layer structure, an insulating carrier substrate and an insulating layer...
US-7,851,302 Capacitors and methods of manufacture thereof
Capacitors are formed in metallization layers of semiconductor device in regions where functional conductive features are not formed, more efficiently using real...
US-7,851,267 Power semiconductor module method
A method for assembling a power module includes providing a casing with a plurality of receiving elements. At least one substrate carrying at least one...
US-7,851,261 Semiconductor package and method of assembling the same
An encapsulated semiconductor package includes a substrate including a chip mounting area and inner contact pads on its upper surface and at least two...
US-7,851,237 Semiconductor device test structures and methods
Semiconductor device test structures and methods are disclosed. In a preferred embodiment, a test structure includes a feed line, a stress line disposed...
US-7,848,715 Circuit and method
Implementations related to circuits including an oscillator and a switch-mode DC/DC converter are presented herein.
US-7,848,126 Integrating current regulator and method for regulating current
Current regulators and related method for regulating a current through a load. The current regulator may include, for example, a first circuit configured to...
US-7,847,643 Circuit with multiphase oscillator
In an embodiment, a circuit is provided comprising a multi-phase oscillator configured to output a plurality of output signals having the same frequency and...
US-7,847,642 Frequency tuning circuit, use of the tuning circuit and method for frequency tuning
A frequency tuning circuit includes a connection for coupling to a signal tap of an element which has a resonant frequency. The tuning circuit contains a...
US-7,847,387 Electrical device and method
An electrical device and method is disclosed. One embodiment provides a substrate, a sensor chip disposed completely above a plane section of a surface of the...
US-7,847,375 Electronic device and method of manufacturing same
This application relates to a semiconductor device, the semiconductor device comprising a metal carrier, an insulating foil partially covering the metal carrier,...
US-7,847,325 Method of making discrete trap memory (DTM) mediated by fullerenes
A discrete trap memory, comprising a silicon substrate layer, a bottom oxide layer on the silicon substrate layer, a Fullerene layer on the bottom oxide layer, a...
US-7,846,616 Lithography masks and methods
Lithography masks and methods of lithography for manufacturing semiconductor devices are disclosed. Forbidden pitches are circumvented by dividing a main feature...
US-7,844,936 Method of making an integrated circuit having fill structures
A method for configuring an integrated circuit including configuring a plurality cells to form a cell library, wherein configuring each cell includes routing a...
US-7,843,237 Circuit arrangement for actuating a transistor
One example of the invention relates to a circuit arrangement for actuating a high-side transistor which includes a control terminal and a load terminal. The...
US-7,843,055 Semiconductor device having an adhesion promoting layer and method for producing it
A semiconductor device and a method for producing it is disclosed. In one embodiment, an adhesion-promoting layer having nanoparticles is arranged between a...
US-7,843,035 MIM capacitors with catalytic activation layer
An embodiment of a MIM capacitor includes a first insulating layer formed over a wafer and a first capacitor plate formed over the wafer within the first...
US-7,843,006 Semiconductor component arrangement having a power transistor and a temperature measuring arrangement
A semiconductor component arrangement includes a power transistor and a temperature measurement circuit. The power transistor includes a gate electrode, a source...
US-7,842,592 Channel strain engineering in field-effect-transistor
There is disclosed a method of applying stress to a channel region underneath a gate of a field-effect-transistor, which includes the gate, a source region, and...
US-7,842,590 Method for manufacturing a semiconductor substrate including laser annealing
A method for manufacturing a semiconductor device by laser annealing. One embodiment provides a semiconductor substrate having a first surface and a second...
US-7,842,579 Method for manufacturing a semiconductor device having doped and undoped polysilicon layers
Various illustrative embodiments of methods for manufacturing a semiconductor device are described. These methods may include, for example, forming a first...
US-7,842,439 Calibration of optical line shortening measurements
A system and method of calibrating optical line shortening measurements, and lithography mask for same. The lithography mask comprises a plurality of gratings,...
US-7,840,365 Integrated circuit arrangement for current regulation
An integrated circuit arrangement for current regulation of an electromagnetic load, especially an electric motor, generator, solenoid valve, or the like, with a...
US-7,840,195 Multifunction-RF-circuit
A multifunction RF circuit on a single semiconductor chip. The multifunction RF circuit includes a power amplifier circuit, a mixer circuit forming an integral...
US-7,839,919 Adjusting transmit power spectra of transceiver devices in a communications network
A UPBO is performed based on an attenuation of a first VDSL-cable connecting a first VDSL-CPE and a first VDSL-CO, and also based on an attenuation or electrical...
US-7,839,918 Method and device for estimating a frequency in the acquisition of a spread-spectrum code signal
In a method for estimating a frequency deviation between a received spread-spectrum code signal and a local frequency signal, the received spread-spectrum code...
US-7,839,892 Data link layer protocol unit
Each transport format contains control parameters according to which data are mapped from at least one logical channel onto at least one transport channel by a...
US-7,839,208 Integrated circuit and method for operating
An integrated circuit and a method for operating an integrated circuit is disclosed. One embodiment provides a semi-conductor component, an electronic system,...
US-7,839,185 Method and circuit arrangement configured for driving a field-effect-controlled transistor
A method and circuit arrangement including driving a field effect controlled transistor. One embodiment provides a first load terminal, a second load terminal...
US-7,839,141 Method of biasing a magneto resistive sensor element
A method of biasing a magneto resistive sensor element includes providing at least one magneto resistive sensor element having a magnetic sensitivity along a...
US-7,838,989 Semiconductor component and apparatus for production of a semiconductor component
A semiconductor component for radio-frequency applications has at least one substrate and one chip, and with contact pads is disclosed. In one embodiment,...
US-7,838,978 Semiconductor device
A semiconductor device and method is disclosed. One embodiment provides a substrate and a first semiconductor chip applied over the substrate. A first...
US-7,838,970 Semiconductor component with high concentration doped zone embedded in emitter region
A semiconductor component has a first and a second contact-making region, and a semiconductor volume arranged between the first and the second contact-making...
US-7,838,969 Diode
A diode is disclosed. One embodiment provides a semiconductor body having a front and a back, opposite the front in a vertical direction of the semiconductor...
US-7,838,959 Radio frequency (RF) circuit placement in semiconductor devices
Semiconductor devices, methods of manufacturing thereof, and methods of arranging circuit components of an integrated circuit are disclosed. In one embodiment, a...
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