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Patent # Description
US-7,982,284 Semiconductor component including an isolation structure and a contact to the substrate
A semiconductor component includes a semiconductor body, in which are formed: a substrate of a first conduction type, a buried semiconductor layer of a second...
US-7,982,281 Method of manufacturing a semiconductor device, method of manufacturing a SOI device, semiconductor device, and...
According to one embodiment of the present invention, a SOI device includes a first composite structure including a substrate layer, a substrate isolation layer...
US-7,982,253 Semiconductor device with a dynamic gate-drain capacitance
A semiconductor device with a dynamic gate drain capacitance. One embodiment provides a semiconductor device. The device includes a semiconductor substrate, a...
US-7,981,789 Feature patterning methods and structures thereof
Methods of patterning features, methods of manufacturing semiconductor devices, and semiconductor devices are disclosed. In one embodiment, a method of...
US-7,981,716 Chip module having a protection device
Some embodiments of a chip module comprise a substrate, a semiconductor chip on the substrate, and a first layer between the substrate and the semiconductor...
US-7,980,138 Integrated circuit with stress sensing element
An integrated circuit includes a semiconductor die, and a stress sensing element. The stress sensing element comprises a first lateral resistor and a first...
US-7,980,134 Measuring device and measured quantity sensor having coupled processing and excitation frequencies
A measuring device for determining a measured quantity having an oscillatory structure where an oscillation signal is detectable. The measuring device further...
US-7,979,828 Integrated circuit and method for determining an integrated circuit layout
Various methods for determining a layout of an integrated circuit are described. For example, a method is described comprising determining a layout of an...
US-7,979,783 Error detection device and method for error detection for a command decoder
An error detection device for a command decoder is described, the command decoder reading out an associated sequence of control signal words from a command...
US-7,979,482 Random number generator configured to combine states of memory cells
A random number generator includes a plurality of memory cells arranged in a series, a feedback processor for generating a feedback signal and for feeding the...
US-7,978,504 Floating gate device with graphite floating gate
One or more embodiments relate to a memory device, comprising: a substrate; a charge storage layer disposed over the substrate; and a control gate disposed over...
US-7,978,451 Circuit arrangement comprising an electronic component and an ESD protection arrangement
A description is given of a circuit arrangement including at least one electronic component having first and second terminals, and comprising an ESD protection...
US-7,977,973 Electronic basic unit for a system on chip
An electronic basic unit for a system on chip comprises a semiconductor substrate and an area on the semiconductor substrate. The area is bounded by a geometric...
US-7,977,798 Integrated circuit having a semiconductor substrate with a barrier layer
An integrated circuit having a semiconductor substrate with a barrier layer is disclosed. The arrangement includes a semiconductor substrate and a metallic...
US-7,977,768 Semiconductor devices and methods of manufacture thereof
Semiconductor devices and methods of manufacture thereof are disclosed. In one embodiment, a semiconductor device includes a workpiece having a buried layer...
US-7,977,737 Semiconductor device having additional capacitance to inherent gate-drain or inherent drain-source capacitance
A semiconductor device with inherent capacitances and method for its production. The semiconductor device has an inherent feedback capacitance between a control...
US-7,977,709 MOS transistor and semiconductor device
According to one embodiment of the present invention, a MOS transistor includes a semiconductor layer including a source region, a drain region, and a channel...
US-7,977,167 Method of producing a field effect transistor arrangement
A method of producing a field effect transistor arrangement. A substrate having a first crystal surface orientation is provided. A first layer is formed above a...
US-7,977,161 Method of manufacturing a semiconductor package using a carrier
A method of manufacturing a semiconductor package includes providing a carrier, forming a post slot and a terminal slot in the carrier, depositing a post in the...
US-7,975,246 MEEF reduction by elongation of square shapes
A method that purposely relaxes OPC algorithm constraints to allow post OPC mask shapes to elongate along one direction (particularly lowering the 1-dimensional...
US-7,974,120 Spin device
According to an embodiment of the present invention, a spin device includes an intermediate semiconductor region arranged between a first terminal and a second...
US-7,974,114 Memory cell arrangements
In an embodiment, a memory cell arrangement is provided. The memory cell arrangement may include a first memory cell and a second memory cell, a first...
US-7,973,547 Method and apparatus for detecting a crack in a semiconductor wafer, and a wafer chuck
A method for detecting a crack in a semiconductor wafer, which includes an electrical device and a connecting pad electrically coupled with the electrical...
US-7,973,528 Sensor device
A sensor device for detecting a relative movement including a transmitter unit configured to generate a field. The transmitter unit includes first transmitter...
US-7,973,369 Semiconductor devices and methods of manufacture thereof
Methods of forming transistors and structures thereof are disclosed. A preferred embodiment comprises a semiconductor device including a workpiece, a gate...
US-7,973,365 Integrated RF ESD protection for high frequency circuits
The invention relates to a high-frequency integrated circuit requiring ESD protection for a circuit node. One or more metallic layer is deposited within the...
US-7,973,362 Semiconductor component and method for producing it
A semiconductor component includes a semiconductor body having an edge with an edge zone of a first conductivity type. Charge compensation regions of a second...
US-7,973,359 Semiconductor device with a charge carrier compensation structure and process
A semiconductor device with a charge carrier compensation structure. In one embodiment, the semiconductor device has a central cell field with a gate and source...
US-7,973,358 Coupler structure
One or more embodiments relate to a semiconductor device, comprising: a substrate; and a radio frequency coupler including a first coupling element and a second...
US-7,972,954 Porous silicon dielectric
Embodiments of the invention provide a semiconductor device having dielectric material and its method of manufacture. A manufacturing method comprises forming a...
US-7,972,947 Method for fabricating a semiconductor element, and semiconductor element
In a method for fabricating a semiconductor element in a substrate, first implantation ions are implanted into the substrate, whereby micro-cavities are...
US-7,971,794 Actively regulated modulation index for contactless IC devices
A contactless IC device including a detection circuit configured to detect a carrier wave that has been amplitude shift-keying (ASK) modulated with digital data...
US-7,971,076 Circuitry and method for monitoring a supply voltage
A method for monitoring the supply voltage of an electronic device includes the steps of: determining an operating condition of the electronic device, adjusting...
US-7,970,364 Strategy for using the envelope information within a closed loop power control system
A power control system includes a reference path filter used to suppress high frequencies in an input signal and generate a filtered envelope signal, a...
US-7,970,086 System and method for clock drift compensation
A method for processing a signal includes monitoring an over-sampled signal to detect deviations in a number of fill samples, and providing an electronic delay...
US-7,969,763 Detector circuit for detecting an external manipulation of an electrical circuit, circuit arrangement...
A detector circuit for detecting an external manipulation of an electrical circuit. The detector circuit includes a digital circuit which is sensitive to at...
US-7,969,754 Control circuit for a switch unit of a clocked power supply circuit, and resonance converter
A control circuit for a switch unit of a clocked power supply receives an auxiliary signal from a resonant transformer driven by the switch unit and detects...
US-7,969,694 Diode loss detection for low side MOSFET of a synchronous output stage
An embodiment of the invention relates to a switch-mode power converter including an inductor and an external rectifying diode. A series arrangement of a...
US-7,969,208 Control circuit for a power semiconductor assembly and power semiconductor assembly
Disclosed is a control circuit for controlling a controllable power semiconductor switch, and to a power semiconductor module. The control circuit comprises at...
US-7,969,135 Regulation circuit and a method for regulating an input voltage
A regulation circuit comprises an error detector, an integrator, and a voltage regulator. The error detector comprises an input for an input voltage, a further...
US-7,969,041 System where the number of conductors equals the number of sensors and each of the sensors receives voltages...
A system includes a control circuit, supply circuits, and sensors. The control circuit controls the supply circuits to power each of the sensors and obtain data...
US-7,969,018 Stacked semiconductor chips with separate encapsulations
Stacked semiconductor chips. One embodiment provides a device having a first body. A first power semiconductor chip and first external contact elements is...
US-7,968,988 Power semiconductor module having a thermally conductive base plate on which at least four substrates are...
The power semiconductor module (1) has a heat-conducting base plate (11) on which at least three substrates (2, 3, 4, 5, 6, 7) are placed, each substrate...
US-7,968,972 High-frequency bipolar transistor and method for the production thereof
A high-frequency bipolar transistor includes an emitter contact adjoining an emitter connection region, a base contact adjoining a base connection region, and a...
US-7,968,934 Memory device including a gate control layer
An integrated memory device, an integrated memory chip and a method for fabricating an integrated memory device is disclosed. One embodiment provides at least...
US-7,968,919 Integrated circuit including a charge compensation component
A charge compensation component having a drift path between two electrodes, an electrode and a counterelectrode, and methods for producing the same. The drift...
US-7,968,416 Integrated circuit arrangement with NPN and PNP bipolar transistors and corresponding production method
An integrated circuit arrangement and fabrication method is provided. The integrated circuit arrangement contains an NPN transistor and a PNP transistor. The...
US-7,968,378 Electronic device
One embodiment provides a method of manufacturing semiconductor devices. For example, a sawn and expanded wafer is utilized having dielectrical material...
US-7,966,579 Methods of optical proximity correction
Systems and methods of optical proximity correction are disclosed. A preferred embodiment comprises a method of determining optical proximity correction, which...
US-7,966,473 Optimised storage addressing method
The invention concerns a method for read-addressing a site among a plurality of storage units using a coded address derived from an instruction. The method...
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