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Patent # Description
US-7,989,885 Semiconductor device having means for diverting short circuit current arranged in trench and method for...
A semiconductor device has a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type complementary...
US-7,989,294 Vertical field-effect transistor
A method produces a vertical field-effect transistor having a semiconductor layer, in which a doped channel region is arranged along a depression. A "buried"...
US-7,988,794 Semiconductor device and method
A semiconductor device having a topology adjustment and a method for adjusting the topology of a semiconductor device. The semiconductor device includes a...
US-7,988,354 Temperature detection for a semiconductor component
Temperature detection for a semiconductor component is disclosed. One embodiment includes a circuit arrangement for measuring a junction temperature of a...
US-7,987,331 Method and circuit for protection of sensitive data in scan mode
A reset generator for resetting at least one register in a register bank. The register generator comprises a scan mode input terminal configured to input a scan...
US-7,986,222 Tire position identification system and method
A tire position identification system and method include a transmitter that is configured to send an initiation signal. A receiver is configured to receive the...
US-7,986,149 System and method for adaptive load fault detection
In one embodiment, a method for sensing an output fault condition is disclosed. The method includes monitoring an error signal that indicates an output fault...
US-7,986,044 Signal transmission arrangement and method
Data signals are transmitted between a number of semiconductor chips which are connected to one another in a common chip package. For that a signal transmission...
US-7,986,034 Power semiconductor module and method for producing the same
A method for producing a power semiconductor module including forming a contact between a contact region and a contact element as an ultrasonic welding contact...
US-7,986,033 Three-dimensional multichip module
A three-dimensional multichip module includes a first integrated circuit chip having at least one first high-temperature functional area and one first...
US-7,986,024 Fuse sensing scheme
A fuse circuit includes a fuse configured for programming a configuration of an integrated circuit device and a resistive element having a known resistance...
US-7,986,023 Semiconductor device with inductor
One or more embodiments are directed to a semiconductor structure, comprising: a support; a semiconductor chip at least partially embedded within the support;...
US-7,986,009 Integrated circuit arrangements with ESD-resistant capacitor and corresponding method of production
A circuit arrangement including a capacitor in an n-type well is disclosed. A specific polarization of the capacitor ensures that a depletion zone arises in the...
US-7,986,005 Short circuit limiting in power semiconductor devices
A power semiconductor device includes a semiconductor body. The semiconductor body includes a body region of a first conductivity type for forming therein a...
US-7,985,983 Semiconductor ESD device and method of making same
A semiconductor device includes an ESD device region disposed within a semiconductor body of a first semiconductor type, an isolation region surrounding the ESD...
US-7,985,676 Method of making a contact in a semiconductor device
To form a semiconductor device, an insulating layer is formed over a conductive region and a pattern transfer layer is formed over the insulating layer. The...
US-7,985,642 Formation of active area using semiconductor growth process without STI integration
A semiconductor device can be formed without use of an STI process. An insulating layer is formed over a semiconductor body. Portions of the insulating layer...
US-7,984,432 Method for patching a read-only memory and a data processing system comprising a means of patching the...
A method for patching a read-only memory (ROM) includes providing multiple patch contexts in a patch contexts memory, with the ROM providing information for a...
US-7,983,870 Integrated circuit and method for determining the operating range of an integrated circuit
Method for ascertaining an operating range for an integrated circuit which has a plurality of system components, in which a test routine is performed for...
US-7,983,713 Smart card; communication device; method for selecting a communication network to be used by a communication...
Smart cards, a communication device, methods for selecting a communication network to be used by a communication device, and a computer program product.
US-7,983,640 Receiver circuit
A receiver circuit for receiving an analog signal comprises a mixer device, a first integrator device coupled to the mixer device, a second integrator device...
US-7,983,627 Circuit arrangement with improved decoupling
A circuit arrangement includes a component having a closed signal path, that closed signal path connected to a first port, a second port and at least a third...
US-7,983,348 System and method for signal transmission
A system and method for signal transmission, a signal modulation and a signal demodulation device, and a method for signal transmission are disclosed. One...
US-7,983,215 Communication device, method for transmitting an uplink transmission control message, method for receiving an...
In an embodiment, a communication device is provided. The communication device may include a scheduling message generating circuit configured to generate a...
US-7,982,547 Phase locked loop-based tuning adjustable filter
Phase locked loop based frequency tuning of an adjustable filter is disclosed. A resonant circuit includes the adjustable filter, and an oscillator signal...
US-7,982,523 Electro static discharge clamping device
Electrostatic discharge clamp devices are described. In one embodiment, the semiconductor device includes a first transistor, the first transistor including a...
US-7,982,488 Phase-change memory security device
A semiconductor chip having a subcircuit formed in a substrate; and a phase-change memory cell located on the subcircuit, and configured to directly detect an...
US-7,982,483 Circuit and method for component communication
A circuit has a supply voltage terminal for receiving a supply voltage of the circuit, wherein a trigger impulse is superimposed on the supply voltage. Further,...
US-7,982,452 Detection of a load state of a half-bridge
Disclosed is a method for diagnosing a half-bridge having a first and a second switching element. The method includes providing a half-bridge that has a first...
US-7,982,444 Systems and methods for driving a transistor
This disclosure relates to monitoring and controlling a voltage characteristic of a Drain Extended Metal Oxide Semiconductor (DeMOS) transistor.
US-7,982,309 Integrated circuit including gas phase deposited packaging material
An integrated circuit includes a substrate including an active area and a gas phase deposited packaging material encapsulating the active area.
US-7,982,293 Multi-chip package including die paddle with steps
A lead frame assembly includes at least one die paddle. The die paddle includes a first landing area for receiving a first semiconductor chip and a second...
US-7,982,292 Semiconductor device
A semiconductor device includes a carrier, a chip coupled to the carrier, a dielectric layer coupled to the carrier and the chip, and conducting elements...
US-7,982,289 Wafer and a method for manufacturing a wafer
A wafer includes a wafer frontside and a region adjacent to the device surface, wherein the region includes vacancy-oxygen complexes and the wafer frontside...
US-7,982,284 Semiconductor component including an isolation structure and a contact to the substrate
A semiconductor component includes a semiconductor body, in which are formed: a substrate of a first conduction type, a buried semiconductor layer of a second...
US-7,982,281 Method of manufacturing a semiconductor device, method of manufacturing a SOI device, semiconductor device, and...
According to one embodiment of the present invention, a SOI device includes a first composite structure including a substrate layer, a substrate isolation layer...
US-7,982,253 Semiconductor device with a dynamic gate-drain capacitance
A semiconductor device with a dynamic gate drain capacitance. One embodiment provides a semiconductor device. The device includes a semiconductor substrate, a...
US-7,981,789 Feature patterning methods and structures thereof
Methods of patterning features, methods of manufacturing semiconductor devices, and semiconductor devices are disclosed. In one embodiment, a method of...
US-7,981,716 Chip module having a protection device
Some embodiments of a chip module comprise a substrate, a semiconductor chip on the substrate, and a first layer between the substrate and the semiconductor...
US-7,980,138 Integrated circuit with stress sensing element
An integrated circuit includes a semiconductor die, and a stress sensing element. The stress sensing element comprises a first lateral resistor and a first...
US-7,980,134 Measuring device and measured quantity sensor having coupled processing and excitation frequencies
A measuring device for determining a measured quantity having an oscillatory structure where an oscillation signal is detectable. The measuring device further...
US-7,979,828 Integrated circuit and method for determining an integrated circuit layout
Various methods for determining a layout of an integrated circuit are described. For example, a method is described comprising determining a layout of an...
US-7,979,783 Error detection device and method for error detection for a command decoder
An error detection device for a command decoder is described, the command decoder reading out an associated sequence of control signal words from a command...
US-7,979,482 Random number generator configured to combine states of memory cells
A random number generator includes a plurality of memory cells arranged in a series, a feedback processor for generating a feedback signal and for feeding the...
US-7,978,504 Floating gate device with graphite floating gate
One or more embodiments relate to a memory device, comprising: a substrate; a charge storage layer disposed over the substrate; and a control gate disposed over...
US-7,978,451 Circuit arrangement comprising an electronic component and an ESD protection arrangement
A description is given of a circuit arrangement including at least one electronic component having first and second terminals, and comprising an ESD protection...
US-7,977,973 Electronic basic unit for a system on chip
An electronic basic unit for a system on chip comprises a semiconductor substrate and an area on the semiconductor substrate. The area is bounded by a geometric...
US-7,977,798 Integrated circuit having a semiconductor substrate with a barrier layer
An integrated circuit having a semiconductor substrate with a barrier layer is disclosed. The arrangement includes a semiconductor substrate and a metallic...
US-7,977,768 Semiconductor devices and methods of manufacture thereof
Semiconductor devices and methods of manufacture thereof are disclosed. In one embodiment, a semiconductor device includes a workpiece having a buried layer...
US-7,977,737 Semiconductor device having additional capacitance to inherent gate-drain or inherent drain-source capacitance
A semiconductor device with inherent capacitances and method for its production. The semiconductor device has an inherent feedback capacitance between a control...
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