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Integrated circuit arrangements with ESD-resistant capacitor and
corresponding method of production
A circuit arrangement including a capacitor in an n-type well is disclosed. A specific polarization of the capacitor ensures that a depletion zone arises in the...
Short circuit limiting in power semiconductor devices
A power semiconductor device includes a semiconductor body. The semiconductor body includes a body region of a first conductivity type for forming therein a...
Semiconductor ESD device and method of making same
A semiconductor device includes an ESD device region disposed within a semiconductor body of a first semiconductor type, an isolation region surrounding the ESD...
Method of making a contact in a semiconductor device
To form a semiconductor device, an insulating layer is formed over a conductive region and a pattern transfer layer is formed over the insulating layer. The...
Formation of active area using semiconductor growth process without STI
A semiconductor device can be formed without use of an STI process. An insulating layer is formed over a semiconductor body. Portions of the insulating layer...
Method for patching a read-only memory and a data processing system
comprising a means of patching the...
A method for patching a read-only memory (ROM) includes providing multiple patch contexts in a patch contexts memory, with the ROM providing information for a...
Integrated circuit and method for determining the operating range of an
Method for ascertaining an operating range for an integrated circuit which has a plurality of system components, in which a test routine is performed for...
Smart card; communication device; method for selecting a communication
network to be used by a communication...
Smart cards, a communication device, methods for selecting a communication network to be used by a communication device, and a computer program product.
A receiver circuit for receiving an analog signal comprises a mixer device, a first integrator device coupled to the mixer device, a second integrator device...
Circuit arrangement with improved decoupling
A circuit arrangement includes a component having a closed signal path, that closed signal path connected to a first port, a second port and at least a third...
System and method for signal transmission
A system and method for signal transmission, a signal modulation and a signal demodulation device, and a method for signal transmission are disclosed. One...
Communication device, method for transmitting an uplink transmission
control message, method for receiving an...
In an embodiment, a communication device is provided. The communication device may include a scheduling message generating circuit configured to generate a...
Phase locked loop-based tuning adjustable filter
Phase locked loop based frequency tuning of an adjustable filter is disclosed. A resonant circuit includes the adjustable filter, and an oscillator signal...
Electro static discharge clamping device
Electrostatic discharge clamp devices are described. In one embodiment, the semiconductor device includes a first transistor, the first transistor including a...
Phase-change memory security device
A semiconductor chip having a subcircuit formed in a substrate; and a phase-change memory cell located on the subcircuit, and configured to directly detect an...
Circuit and method for component communication
A circuit has a supply voltage terminal for receiving a supply voltage of the circuit, wherein a trigger impulse is superimposed on the supply voltage. Further,...
Detection of a load state of a half-bridge
Disclosed is a method for diagnosing a half-bridge having a first and a second switching element. The method includes providing a half-bridge that has a first...
Systems and methods for driving a transistor
This disclosure relates to monitoring and controlling a voltage characteristic of a Drain Extended Metal Oxide Semiconductor (DeMOS) transistor.
Integrated circuit including gas phase deposited packaging material
An integrated circuit includes a substrate including an active area and a gas phase deposited packaging material encapsulating the active area.
Multi-chip package including die paddle with steps
A lead frame assembly includes at least one die paddle. The die paddle includes a first landing area for receiving a first semiconductor chip and a second...
A semiconductor device includes a carrier, a chip coupled to the carrier, a dielectric layer coupled to the carrier and the chip, and conducting elements...
Wafer and a method for manufacturing a wafer
A wafer includes a wafer frontside and a region adjacent to the device surface, wherein the region includes vacancy-oxygen complexes and the wafer frontside...
Semiconductor component including an isolation structure and a contact to
A semiconductor component includes a semiconductor body, in which are formed: a substrate of a first conduction type, a buried semiconductor layer of a second...
Method of manufacturing a semiconductor device, method of manufacturing a
SOI device, semiconductor device, and...
According to one embodiment of the present invention, a SOI device includes a first composite structure including a substrate layer, a substrate isolation layer...
Semiconductor device with a dynamic gate-drain capacitance
A semiconductor device with a dynamic gate drain capacitance. One embodiment provides a semiconductor device. The device includes a semiconductor substrate, a...
Feature patterning methods and structures thereof
Methods of patterning features, methods of manufacturing semiconductor devices, and semiconductor devices are disclosed. In one embodiment, a method of...
Chip module having a protection device
Some embodiments of a chip module comprise a substrate, a semiconductor chip on the substrate, and a first layer between the substrate and the semiconductor...
Integrated circuit with stress sensing element
An integrated circuit includes a semiconductor die, and a stress sensing element. The stress sensing element comprises a first lateral resistor and a first...
Measuring device and measured quantity sensor having coupled processing
and excitation frequencies
A measuring device for determining a measured quantity having an oscillatory structure where an oscillation signal is detectable. The measuring device further...
Integrated circuit and method for determining an integrated circuit layout
Various methods for determining a layout of an integrated circuit are described. For example, a method is described comprising determining a layout of an...
Error detection device and method for error detection for a command
An error detection device for a command decoder is described, the command decoder reading out an associated sequence of control signal words from a command...
Random number generator configured to combine states of memory cells
A random number generator includes a plurality of memory cells arranged in a series, a feedback processor for generating a feedback signal and for feeding the...
Floating gate device with graphite floating gate
One or more embodiments relate to a memory device, comprising: a substrate; a charge storage layer disposed over the substrate; and a control gate disposed over...
Circuit arrangement comprising an electronic component and an ESD
A description is given of a circuit arrangement including at least one electronic component having first and second terminals, and comprising an ESD protection...
Electronic basic unit for a system on chip
An electronic basic unit for a system on chip comprises a semiconductor substrate and an area on the semiconductor substrate. The area is bounded by a geometric...
Integrated circuit having a semiconductor substrate with a barrier layer
An integrated circuit having a semiconductor substrate with a barrier layer is disclosed. The arrangement includes a semiconductor substrate and a metallic...
Semiconductor devices and methods of manufacture thereof
Semiconductor devices and methods of manufacture thereof are disclosed. In one embodiment, a semiconductor device includes a workpiece having a buried layer...
Semiconductor device having additional capacitance to inherent gate-drain
or inherent drain-source capacitance
A semiconductor device with inherent capacitances and method for its production. The semiconductor device has an inherent feedback capacitance between a control...
MOS transistor and semiconductor device
According to one embodiment of the present invention, a MOS transistor includes a semiconductor layer including a source region, a drain region, and a channel...
Method of producing a field effect transistor arrangement
A method of producing a field effect transistor arrangement. A substrate having a first crystal surface orientation is provided. A first layer is formed above a...
Method of manufacturing a semiconductor package using a carrier
A method of manufacturing a semiconductor package includes providing a carrier, forming a post slot and a terminal slot in the carrier, depositing a post in the...
MEEF reduction by elongation of square shapes
A method that purposely relaxes OPC algorithm constraints to allow post OPC mask shapes to elongate along one direction (particularly lowering the 1-dimensional...
According to an embodiment of the present invention, a spin device includes an intermediate semiconductor region arranged between a first terminal and a second...
Memory cell arrangements
In an embodiment, a memory cell arrangement is provided. The memory cell arrangement may include a first memory cell and a second memory cell, a first...
Method and apparatus for detecting a crack in a semiconductor wafer, and a
A method for detecting a crack in a semiconductor wafer, which includes an electrical device and a connecting pad electrically coupled with the electrical...
A sensor device for detecting a relative movement including a transmitter unit configured to generate a field. The transmitter unit includes first transmitter...
Semiconductor devices and methods of manufacture thereof
Methods of forming transistors and structures thereof are disclosed. A preferred embodiment comprises a semiconductor device including a workpiece, a gate...
Integrated RF ESD protection for high frequency circuits
The invention relates to a high-frequency integrated circuit requiring ESD protection for a circuit node. One or more metallic layer is deposited within the...
Semiconductor component and method for producing it
A semiconductor component includes a semiconductor body having an edge with an edge zone of a first conductivity type. Charge compensation regions of a second...
Semiconductor device with a charge carrier compensation structure and
A semiconductor device with a charge carrier compensation structure. In one embodiment, the semiconductor device has a central cell field with a gate and source...