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Power transistor package with integrated bus bar
According to one embodiment, a power transistor package includes an electrically conductive flange configured to be connected to a source of a power transistor...
Sensor module and method for manufacturing same
A sensor module has a carrier substrate having a bottom side and a top side, a sensor chip arranged on the top side of the carrier substrate and having a...
Magnetically alignable integrated circuit device
An integrated circuit device includes a semiconductor chip having an active surface with a plurality of chip contact pads, a rewiring substrate and an...
Method for producing a module with components stacked one above another
The invention relates to a method in which components (101, 102) are provided, movement elements (104) are in each case applied to surfaces of a number of the...
Method and apparatus for controlling output power in power amplifiers
Some embodiments discussed relate to a method and apparatus, comprising a power amplifier module, a transceiver module coupled to provide a signal to an input...
Method and apparatus for transmitting data in a communication system
An apparatus and method of grouping and assigning a plurality of random access sequences, including assigning each random access sequence to one or a plurality...
Tire localization system
A tire localization system for locating the position of a tire of a vehicle having five or more wheels, includes a number of tire pressure monitoring system...
Circuit and method for pulling a potential at a node towards a feed
Embodiments of the invention concern a circuit for pulling a potential at a node towards a feed potential which is present at a potential feed. The circuit has...
Method for operating a fluorescent lamp that is connected to a series
A method for operating a fluorescent lamp which is connected to a series resonant circuit with a resonant circuit inductance and a resonant circuit capacitance....
A semiconductor package includes a leadframe defining a die pad, a chip electrically coupled to the die pad, encapsulation material covering the chip and the...
Capacitor arrangement and method for making same
One or more embodiments relate to a semiconductor chip including a capacitor arrangement, the capacitor arrangement comprising: a first capacitor; and a second...
Semiconductor device with a field stop zone and process of producing the
Embodiments discussed herein relate to processes of producing a field stop zone within a semiconductor substrate by implanting dopant atoms into the substrate...
Semiconductor device having means for diverting short circuit current
arranged in trench and method for...
A semiconductor device has a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type complementary...
Vertical field-effect transistor
A method produces a vertical field-effect transistor having a semiconductor layer, in which a doped channel region is arranged along a depression. A "buried"...
Semiconductor device and method
A semiconductor device having a topology adjustment and a method for adjusting the topology of a semiconductor device. The semiconductor device includes a...
Temperature detection for a semiconductor component
Temperature detection for a semiconductor component is disclosed. One embodiment includes a circuit arrangement for measuring a junction temperature of a...
Method and circuit for protection of sensitive data in scan mode
A reset generator for resetting at least one register in a register bank. The register generator comprises a scan mode input terminal configured to input a scan...
Tire position identification system and method
A tire position identification system and method include a transmitter that is configured to send an initiation signal. A receiver is configured to receive the...
System and method for adaptive load fault detection
In one embodiment, a method for sensing an output fault condition is disclosed. The method includes monitoring an error signal that indicates an output fault...
Signal transmission arrangement and method
Data signals are transmitted between a number of semiconductor chips which are connected to one another in a common chip package. For that a signal transmission...
Power semiconductor module and method for producing the same
A method for producing a power semiconductor module including forming a contact between a contact region and a contact element as an ultrasonic welding contact...
Three-dimensional multichip module
A three-dimensional multichip module includes a first integrated circuit chip having at least one first high-temperature functional area and one first...
Fuse sensing scheme
A fuse circuit includes a fuse configured for programming a configuration of an integrated circuit device and a resistive element having a known resistance...
Semiconductor device with inductor
One or more embodiments are directed to a semiconductor structure, comprising: a support; a semiconductor chip at least partially embedded within the support;...
Integrated circuit arrangements with ESD-resistant capacitor and
corresponding method of production
A circuit arrangement including a capacitor in an n-type well is disclosed. A specific polarization of the capacitor ensures that a depletion zone arises in the...
Short circuit limiting in power semiconductor devices
A power semiconductor device includes a semiconductor body. The semiconductor body includes a body region of a first conductivity type for forming therein a...
Semiconductor ESD device and method of making same
A semiconductor device includes an ESD device region disposed within a semiconductor body of a first semiconductor type, an isolation region surrounding the ESD...
Method of making a contact in a semiconductor device
To form a semiconductor device, an insulating layer is formed over a conductive region and a pattern transfer layer is formed over the insulating layer. The...
Formation of active area using semiconductor growth process without STI
A semiconductor device can be formed without use of an STI process. An insulating layer is formed over a semiconductor body. Portions of the insulating layer...
Method for patching a read-only memory and a data processing system
comprising a means of patching the...
A method for patching a read-only memory (ROM) includes providing multiple patch contexts in a patch contexts memory, with the ROM providing information for a...
Integrated circuit and method for determining the operating range of an
Method for ascertaining an operating range for an integrated circuit which has a plurality of system components, in which a test routine is performed for...
Smart card; communication device; method for selecting a communication
network to be used by a communication...
Smart cards, a communication device, methods for selecting a communication network to be used by a communication device, and a computer program product.
A receiver circuit for receiving an analog signal comprises a mixer device, a first integrator device coupled to the mixer device, a second integrator device...
Circuit arrangement with improved decoupling
A circuit arrangement includes a component having a closed signal path, that closed signal path connected to a first port, a second port and at least a third...
System and method for signal transmission
A system and method for signal transmission, a signal modulation and a signal demodulation device, and a method for signal transmission are disclosed. One...
Communication device, method for transmitting an uplink transmission
control message, method for receiving an...
In an embodiment, a communication device is provided. The communication device may include a scheduling message generating circuit configured to generate a...
Phase locked loop-based tuning adjustable filter
Phase locked loop based frequency tuning of an adjustable filter is disclosed. A resonant circuit includes the adjustable filter, and an oscillator signal...
Electro static discharge clamping device
Electrostatic discharge clamp devices are described. In one embodiment, the semiconductor device includes a first transistor, the first transistor including a...
Phase-change memory security device
A semiconductor chip having a subcircuit formed in a substrate; and a phase-change memory cell located on the subcircuit, and configured to directly detect an...
Circuit and method for component communication
A circuit has a supply voltage terminal for receiving a supply voltage of the circuit, wherein a trigger impulse is superimposed on the supply voltage. Further,...
Detection of a load state of a half-bridge
Disclosed is a method for diagnosing a half-bridge having a first and a second switching element. The method includes providing a half-bridge that has a first...
Systems and methods for driving a transistor
This disclosure relates to monitoring and controlling a voltage characteristic of a Drain Extended Metal Oxide Semiconductor (DeMOS) transistor.
Integrated circuit including gas phase deposited packaging material
An integrated circuit includes a substrate including an active area and a gas phase deposited packaging material encapsulating the active area.
Multi-chip package including die paddle with steps
A lead frame assembly includes at least one die paddle. The die paddle includes a first landing area for receiving a first semiconductor chip and a second...
A semiconductor device includes a carrier, a chip coupled to the carrier, a dielectric layer coupled to the carrier and the chip, and conducting elements...
Wafer and a method for manufacturing a wafer
A wafer includes a wafer frontside and a region adjacent to the device surface, wherein the region includes vacancy-oxygen complexes and the wafer frontside...
Semiconductor component including an isolation structure and a contact to
A semiconductor component includes a semiconductor body, in which are formed: a substrate of a first conduction type, a buried semiconductor layer of a second...
Method of manufacturing a semiconductor device, method of manufacturing a
SOI device, semiconductor device, and...
According to one embodiment of the present invention, a SOI device includes a first composite structure including a substrate layer, a substrate isolation layer...
Semiconductor device with a dynamic gate-drain capacitance
A semiconductor device with a dynamic gate drain capacitance. One embodiment provides a semiconductor device. The device includes a semiconductor substrate, a...
Feature patterning methods and structures thereof
Methods of patterning features, methods of manufacturing semiconductor devices, and semiconductor devices are disclosed. In one embodiment, a method of...