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Patent # Description
US-9,331,059 Chip, chip package and die
In various embodiments, a chip for a chip package is provided. The chip may include a substrate and an integrated circuit over the substrate. The integrated...
US-9,331,057 Semiconductor device
A semiconductor device is disclosed. One embodiment provides a semiconductor chip. The semiconductor chip includes a first electrode of a capacitor. An...
US-9,331,019 Device comprising a ductile layer and method of making the same
Device comprising a ductile layer, a method for making a component comprising a ductile layer and a method for testing a component are disclosed. An embodiment...
US-9,331,005 Power semiconductor package with multi-section conductive carrier
In one implementation, a power semiconductor package includes a non-contiguous, multi-section conductive carrier. A control transistor with a control transistor...
US-9,330,996 Semiconductor module system, semiconductor module arrangement and method for mounting a semiconductor module on...
A semiconductor module system has a semiconductor module and a protective cover. The semiconductor module has a bottom side with a heat dissipation surface and...
US-9,330,974 Through level vias and methods of formation thereof
In one embodiment, a semiconductor device includes a first metal line disposed in a first metal level above a substrate. A second metal line is disposed in a...
US-9,330,929 Systems and methods for horizontal integration of acceleration sensor structures
Embodiments relate to integrated circuit sensors, and more particularly to sensors integrated in an integrated circuit structure and methods for producing the...
US-9,329,272 3D camera and method of image processing 3D images
A method comprises obtaining first information, the first information including depth information with a first range of unambiguity. A first image processing is...
US-9,326,335 Second stage calibration in DC/DC LED current regulation
A current regulator controller includes a differential amplifier that is arranged to output a current sense signal based on a differential input signal and a...
US-9,326,333 Flyback driver for use in a flyback power converter and related method
According to one embodiment, a flyback power converter comprises a primary circuit including a flyback driver, and an isolated output circuit responsive to the...
US-9,325,267 Diagnosis of over-current conditions in bipolar motor controllers
A circuit for controlling a load current through a coil is connected to an output port of a transistor H-bridge that includes two low side transistors and two...
US-9,325,242 Switching regulator output capacitor current estimation
A switching regulator includes a controller and a power stage for coupling to a load through an inductor and a capacitor. The a controller is operable to...
US-9,324,845 ESD protection structure, integrated circuit and semiconductor device
Implementations are presented herein that include an ESD protection structure. The structure may include a plurality of first doped regions forming first...
US-9,324,829 Method of forming a trench electrode device with wider and narrower regions
A method includes forming a trench extending from a first surface of a semiconductor body into the semiconductor body such that a first trench section and at...
US-9,324,823 Semiconductor device having a tapered gate structure and method
A semiconductor device includes a semiconductor body having a first surface vertically spaced apart from a second surface. A first trench vertically extends...
US-9,324,817 Method for forming a transistor device having a field electrode
A method for forming a transistor device includes forming a field electrode arrangement by forming a trench in a first surface of a semiconductor body, forming...
US-9,324,802 Spacer supported lateral channel FET
A semiconductor device includes a semiconductor material and trenches extending into the semiconductor material from a first main surface of the semiconductor...
US-9,324,783 Soft switching semiconductor device and method for producing thereof
A semiconductor device has a semiconductor body with a first side and a second side that is arranged distant from the first side in a first vertical direction....
US-9,324,707 Integrated circuits and methods of design and manufacture thereof
Integrated circuits and methods of manufacture and design thereof are disclosed. For example, a method of manufacturing includes using a first mask to pattern a...
US-9,324,646 Open source power quad flat no-lead (PQFN) package
According to an exemplary implementation, a power quad flat no-lead (PQFN) leadframe includes U-phase, V-phase, and W-phase power switches situated on the PQFN...
US-9,324,642 Method of electrically isolating shared leads of a lead frame strip
A lead frame strip includes a plurality of connected unit lead frames, each unit lead frame having a die paddle and a plurality of leads connected to a...
US-9,324,638 Compact wirebonded power quad flat no-lead (PQFN) package
Some exemplary embodiments of a multi-chip module (MCM) power quad flat no-lead (PQFN) semiconductor package utilizing a leadframe for electrical ...
US-9,324,625 Gated diode, battery charging assembly and generator assembly
A gated diode may include source zones and a drain zone which are both of a first conductivity type. The source zones directly adjoin a first surface of a...
US-9,324,586 Chip-packaging module for a chip and a method for forming a chip-packaging module
A chip-packaging module for a chip is provided, the chip-packaging module including a chip including a first chip side, wherein the first chip side includes an...
US-9,323,920 Data processing arrangement and method for ensuring the integrity of the execution of a computer program
According to one embodiment, a data processing arrangement is described comprising a processor configured to carry out a computer program including a plurality...
US-9,323,654 Memory access using address bit permutation
An apparatus including a memory having an array of blocks addressable using address bits; and a permutation circuit coupled to the memory and configured to...
US-9,323,604 Signature update by code transformation
Embodiments described herein provide an apparatus, computer readable digital storage medium and method for producing an instruction sequence for a computation...
US-9,322,885 Circuit and method for evaluating cells in a battery
In various embodiments, a method for evaluating a cell of a battery is provided. The method may include: balancing a voltage of at least one cell of the battery...
US-9,322,858 System and method for a phase detector
In accordance with an embodiment, a method of detecting a phase difference between a first signal and a second signal include latching a state of the first...
US-9,322,840 Resistive element
A resistive element includes a resistive region in a semiconductor substrate, a first contact structure and a second contact structure. The semiconductor...
US-9,319,779 System and method for transducer biasing and shock protection
In accordance with an embodiment, an interface circuit includes an amplifier configured to be coupled to a transducer, a first bypass circuit coupled to a first...
US-9,319,006 System and method for a radio frequency coupler
In accordance with an embodiment, a directional coupler includes a coupler circuit and at least one amplifier coupled between a coupler circuit isolated port...
US-9,318,978 Voltage converter with soft communication networks
Embodiments of the present invention describe a voltage converter and a method for operating the voltage converter. In one embodiment the voltage converter...
US-9,318,633 Photodetector with controllable spectral response
A photodetector includes a semiconductor substrate having an irradiation zone configured to generate charge carriers having opposite charge carrier types in...
US-9,318,592 Active area shaping of III-nitride devices utilizing a source-side field plate and a wider drain-side field plate
In an exemplary implementation, a III-nitride semiconductor device includes a III-nitride heterojunction including a first III-nitride body situated over a...
US-9,318,560 Group III-V device with strain-relieving layers
According to one exemplary embodiment, a group III-V semiconductor device includes at least one transition layer situated over a substrate. The group III-V...
US-9,318,550 Semiconductor device with device separation structures
A semiconductor device includes a first gate electrode structure, a second gate electrode structure, a device separation structure, and cell separation...
US-9,318,549 Semiconductor device with a super junction structure having a vertical impurity distribution
A super junction semiconductor device includes a semiconductor portion with parallel first and second surfaces. An impurity layer of a first conductivity type...
US-9,318,485 Capacitor arrangements and method for manufacturing a capacitor arrangement
In various embodiments, a capacitor arrangement is provided, which may include a substrate; a plurality of first doped regions and a plurality of second doped...
US-9,318,483 Reverse blocking transistor device
A transistor device includes at least one transistor cell. The cell includes a drift region, a source region, a body region arranged between the source region...
US-9,318,473 Semiconductor device including a polymer disposed on a carrier
In a method of manufacturing a semiconductor device, a first semiconductor element is mounted on a carrier. A b-stage curable polymer is deposited on the...
US-9,318,446 Metal deposition on substrates
Various techniques, methods, devices and apparatus are provided where an isolation layer is provided at a peripheral region of the substrate, and one or more...
US-9,318,417 Gallium nitride devices
Semiconductor structures comprising a III-nitride (e.g., gallium nitride) material region and methods associated with such structures are provided. In some...
US-9,318,358 Etching device and a method for etching a material of a workpiece
An etching device is provided, the etching device including a process chamber including an etchant, a structure configured to provide a laminar flow of the...
US-9,318,355 Power semiconductor device with a double metal contact
A power semiconductor device that includes a stack of a thin metal layer and a thick metal layer over the active region thereof, and a method for the...
US-9,316,706 Minimum magnetic field detection systems and methods in magnetoresistive sensors
Embodiments relate to magnetoresistive sensors suitable for both angle and field strength sensing. A sensor can comprise two magnetoresistive (xMR) sensor...
US-9,316,705 Vertical hall effect-device
A vertical Hall effect device is provided and includes a Hall effect layer having a first, second, third, and fourth Hall effect region, which are at least...
US-9,316,680 Method, device and circuitry for detecting a failure on a differential bus
An exemplary embodiment relates to a method for detecting a failure on a differential bus. The method may include: determining an allowed voltage range of the...
US-9,316,663 Intelligent field shaping for magnetic speed sensors
The present disclosure provides for techniques to improve the sensitivity of magnetic sensor systems. One embodiment of a magnetic sensor system includes a...
US-9,313,898 Low viscosity polymeric printing solutions and electronic components bearing polyimide based upon the low...
An electrical component that includes a substrate and a polymeric layer oriented in working relation with the substrate, the polymeric layer including a low...
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