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Patent # Description
US-9,263,419 Lead frame strips with electrical isolation of die paddles
A lead frame strip includes connected unit lead frames each having a die paddle, a tie bar directly connecting the die paddle to a periphery of the unit lead...
US-9,263,384 Programmable devices and methods of manufacture thereof
Programmable devices, methods of manufacture thereof, and methods of programming devices are disclosed. In one embodiment, a programmable device includes a link...
US-9,263,369 Chip arrangement, wafer arrangement and method of manufacturing the same
Various embodiments provide a chip arrangement. The chip arrangement may include a first chip having a first chip side and a second chip side opposite the first...
US-9,263,362 Method of forming a ring-shaped metal structure
A method includes providing a first semiconductor chip comprising a ring-shaped metal structure extending along a contour of a first main surface of the...
US-9,263,357 Carrier with hollow chamber and support structure therein
According to various embodiments, a carrier may include: a hollow chamber spaced apart from a surface of the carrier; and at least one support structure within...
US-9,263,328 Semiconductor device and method for making same
One or more embodiments relate to a semiconductor device that includes: a conductive layer including a sidewall; a conductive capping layer disposed over the...
US-9,263,271 Method for processing a semiconductor carrier, a semiconductor chip arrangement and a method for manufacturing...
A method for processing a semiconductor carrier is provided, the method including: providing a semiconductor carrier including a doped substrate region and a...
US-9,263,154 Method and device for evaluating a chip manufacturing process
A method for evaluating a chip manufacturing process is described comprising measuring, for each of a plurality of chips manufactured in a chip manufacturing...
US-9,262,576 Method and apparatus for providing a layout defining a structure to be patterned onto a substrate
A method provides a layout defining a structure to be patterned onto a substrate. The structure is registered with a predefined grid of the layout. The method...
US-9,261,791 Photoresist application
Devices and methods are provided where photoresist is applied on a substrate and at least some regions of the photoresist are dried prior to removing a...
US-9,261,572 Low offset spinning current hall plate and method to operate it
One embodiment of the present invention relates to a method and apparatus for removing the effect of contact resistances for Hall effect device contacts. In one...
US-9,261,415 System and method for temperature sensing
In accordance with an embodiment, a temperature sensor includes a proportional to absolute temperature (PTAT) current generator having a first current output...
US-9,258,385 Method for loading a program module into a network device and network with network devices
A method for loading program modules into programmable network devices of a network comprises loading an ID-generator into each network device for generating a...
US-9,258,110 Phase detector
A phase detector device having a modulo N operator coupled with an adder is disclosed. Furthermore, clock recovery devices using such a phase detector device...
US-9,258,032 System and method for receiving data across an isolation barrier
In one embodiment, a system for communication has a receiver for receiving data from a passive transmitter capacitively coupled to the receiver. The receiver...
US-9,258,005 Sensor system using multiple modes for analog to digital conversion
A device for converting analog to digital is disclosed. The device includes a dual mode converter and a control unit. The dual mode converter has a coarse mode...
US-9,258,000 Combined lock/out-of-lock detector for phase locked loops
A detector for detecting a locked state and an out-of-lock state of a phase locked loop includes an out-of-lock detector circuit that receives a reference...
US-9,257,983 Level shifter utilizing a capacitive isolation barrier
According to an exemplary implementation, a level shifter includes a low voltage circuit and a high voltage circuit. The low voltage circuit is configured to...
US-9,257,724 Reaction chamber arrangement and a method for forming a reaction chamber arrangement
A reaction chamber arrangement is provided, the reaction chamber arrangement including a first chemical reaction chamber; a second chemical reaction chamber; an...
US-9,257,549 Semiconductor field effect power switching device
A semiconductor device having a semiconductor body, a source metallization arranged on a first surface of the semiconductor body and a trench including a first...
US-9,257,532 Method for forming a semiconductor device with a trench and an isolation
A method for forming a semiconductor device. One embodiment provides a semiconductor substrate having a trench with a sidewall isolation. The sidewall isolation...
US-9,257,523 Avalanche diode having an enhanced defect concentration level and method of making the same
The invention relates to an avalanche diode that can be employed as an ESD protection device. An avalanche ignition region is formed at the p-n junction of the...
US-9,257,512 Semiconductor component with dynamic behavior
One embodiment provides a semiconductor component including a semiconductor body having a first side and a second side and a drift zone; a first semiconductor...
US-9,257,511 Silicon carbide device and a method for forming a silicon carbide device
A silicon carbide device includes a silicon carbide substrate, an inorganic passivation layer structure and a molding material layer. The inorganic passivation...
US-9,257,503 Superjunction semiconductor device and method for producing thereof
A method of forming a superjunction device includes forming at least one trench in a first surface of a first semiconductor layer of a first doping type, and a...
US-9,257,448 Integrated semiconductor device having an insulating structure and a manufacturing method
An integrated semiconductor device is provided. The integrated semiconductor device has a first semiconductor region of a second conductivity type, a second...
US-9,257,424 Semiconductor device
A semiconductor device is provided that includes a composite semiconductor body including a high voltage depletion-mode transistor and a low voltage...
US-9,257,342 Methods of singulating substrates to form semiconductor devices using dummy material
In one embodiment, a method of forming a semiconductor device includes forming openings in a substrate. The method includes forming a dummy fill material within...
US-9,257,285 Ion source devices and methods
An ion source includes a chamber defining an interior cavity for ionization, an electron beam source at a first end of the interior cavity, an inlet for...
US-9,254,996 Vertical pressure sensitive structure
Embodiments related to pressure sensitive structures are described and depicted.
US-9,253,569 System and method for a cancelation circuit
In accordance with an embodiment, a cancelation circuit includes a current mirror and a low pass filter. The current mirror includes an input terminal...
US-9,252,354 Vertical hall device with highly conductive opposite face node for electrically connecting first and second...
Vertical Hall device with highly conductive node for electrically connecting first and second Hall effect regions. A vertical Hall device comprises a first Hall...
US-9,252,292 Semiconductor device and a method for forming a semiconductor device
A semiconductor device includes a semiconductor substrate. The semiconductor substrate includes a first doping region arranged at a main surface of the...
US-9,252,263 Multiple semiconductor device trenches per cell pitch
A semiconductor device includes a plurality of field plate trenches formed in a semiconductor substrate, a plurality of gate trenches formed in the...
US-9,252,257 III-nitride semiconductor device with reduced electric field between gate and drain
A conductive field plate is formed between the drain electrode and gate of each cell of a III-Nitride semiconductor and is connected to the source electrode to...
US-9,252,256 III-nitride semiconductor device with reduced electric field
A conductive field plate is formed between the drain electrode and gate of each cell of a III-Nitride semiconductor and is connected to the source electrode to...
US-9,252,251 Semiconductor component with a space saving edge structure
A semiconductor component is disclosed. One embodiment includes a semiconductor body including a first semiconductor layer having at least one active component...
US-9,252,140 Semiconductor chip and semiconductor arrangement
One aspect of the invention relates to a semiconductor chip with a semiconductor body. The semiconductor body has an inner region and a ring-shaped outer...
US-9,252,089 Universal lead frame for flat no-leads packages
A universal lead frame for semiconductor packages includes a solid lead frame sheet comprising an electrically conductive material and a plurality of columns...
US-9,252,063 Extended contact area for leadframe strip testing
A leadframe strip includes a plurality of unit leadframes connected to a periphery of the leadframe strip, each unit leadframe having a die paddle, a plurality...
US-9,252,045 Method for manufacturing a composite wafer having a graphite core
A composite wafer including a carrier substrate having a graphite core and a monocrystalline semiconductor substrate or layer attached to the carrier substrate...
US-9,251,934 Method for manufacturing a plurality of nanowires
A method for manufacturing a plurality of nanowires, the method including: providing a carrier comprising an exposed surface of a material to be processed and...
US-9,251,864 System and method for providing voltage supply protection in a memory device
The invention relates to an electronic memory system, and more specifically, to a system for providing voltage supply protection in a memory device, and a...
US-9,251,303 Method and apparatus for use in design of a system
A method is disclosed for use in design of a system, the system to include a plurality of sources contributing to a variable system effect. The method includes...
US-9,251,120 Wheel localizer, wheel localization device, system, method and computer program for locating a position of a wheel
Embodiments can provide a system, a wheel localizer, a wheel localization device, a method or a computer program for locating a position of wheel. The system...
US-9,251,098 Apparatus and method for accessing an encrypted memory portion
An apparatus for accessing an encrypted memory portion of a memory is provided. The apparatus includes a plurality of signature generators, wherein each...
US-9,250,293 Capacitive test device and method for capacitive testing a component
A system and a method for capacitive testing a component (including a packaged component) are disclosed. An embodiment of a test head comprises a holding unit...
US-9,249,014 Packaged nano-structured component and method of making a packaged nano-structured component
An assembled component and a method for assembling a component are disclosed. In one embodiment the assembled component includes a component carrier, an...
US-9,248,709 RFID-tag, a TPMS device, a tire, a receiver device and a method for providing information related to...
Embodiments relate to a Radio Frequency IDentification (RFID)-tag, a Tire Pressure Monitoring System (TPMS) device, a tire, a receiver device and a method for...
US-9,248,466 Application of fluids to substrates
Various embodiments relate to application of a fluid to a substrate. The fluid is locally heated, for example, to obtain a desired thickness profile.
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