Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching: infineon





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
US-6,489,675 Optical semiconductor component with an optically transparent protective layer
The optical semiconductor component has a semiconductor body having a first surface with an active region and a second surface with a passive region. An...
US-6,489,249 Elimination/reduction of black silicon in DT etch
In a method of etching a wafer in a plasma etch reactor, the improvement of conducting etching to reduce or eliminate "black silicon" comprising: a) providing a...
US-6,489,187 Method for setting the breakover voltage of a thyristor
The effective doping profile of a finished thyristor is altered with helium ions radiated into a region provided for triggering the thyristor in such a way that...
US-6,488,418 Optoelectronic coupling element and production method
The optoelectronic coupling element is adjustable, during production, with regard to an optimal light path. A coupling part has a coupling device for coupling...
US-6,488,417 Opto-electronic assembly having an integrated imaging system
An opto-electronic assembly includes an opto-electronic transducer, an optical path and an imaging system in the form of a translucent hollow body having...
US-6,487,744 Device for cleaning a wafer of abrasive agent suspension remaining after polishing with brushes and DI water
A device for cleaning a wafer of abrasive agent suspension (slurry) remaining after polishing with brushes and DI water includes an upper gear casing having an...
US-6,487,128 Integrated memory having memory cells and reference cells, and operating method for such a memory
The memory has identically constructed memory cells and reference cells. An item of reference information is written into the reference cells by uncoupling the...
US-6,487,127 Circuit configuration for reading and writing information at a memory cell field
Binary information is written to and read from a memory cell field forming a matrix-type field of rows and columns via a plurality of write/read circuits, each...
US-6,487,109 Magnetoresistive memory and method for reading a magnetoresistive memory
A magnetoresistive memory includes magnetoresistive memory cells disposed in a plurality of rows and/or columns. A bit line is connected to first poles of the...
US-6,487,108 MRAM configuration
A magneto-resistive random access memory (MRAM) configuration is described in which a plurality of memory cell blocks are supplied with operating voltages that...
US-6,487,107 Retention time of memory cells by reducing leakage current
A memory cell having first and second access transistors coupled to a storage transistor is disclosed. During a write 0 operation, a degraded logic 0 is written...
US-6,486,811 Offset-free analog-to-digital converter
Analog-to-digital converter for converting an analog input signal which is present at a signal input (2a, 2b) and has a specific frequency bandwidth, into an...
US-6,486,732 Modulator-demodulator
To keep the power consumption in the modulator-demodulator of a mobile radio as low as possible, the modulator-demodulator has a voltage-controlled oscillator....
US-6,486,699 Compensation circuit for driver circuits
The invention relates to a compensation circuit for driver circuits having a current reference source which generates at least one reference signal which is...
US-6,486,675 In-situ method for measuring the endpoint of a resist recess etch process
An in-situ method for measuring the endpoint of a resist recess etch process for DRAM trench cell capacitors to determine the buried plate depth on a...
US-6,486,538 Chip carrier having ventilation channels
A chip carrier made of a non-metallic material has conductor tracks applied thereon for producing an external, two-dimensional connection configuration for...
US-6,486,526 Crack stop between neighboring fuses for protection from fuse blow damage
A fuse structure in an integrated circuit chip is described that includes an insulated semiconductor substrate; a fuse bank integral to the insulated...
US-6,486,505 Semiconductor contact and method of forming the same
In one aspect, the present invention discloses a transistor device (see e.g., FIG. 3) that includes first and second source/drain regions 124a and 126 disposed...
US-6,486,049 Method of fabricating semiconductor devices with contact studs formed without major polishing defects
In a semiconductor device, a contact stud (100) contacts a semiconductor substrate (10); the stud is embedded in an insulating structure with a first insulating...
US-6,486,024 Integrated circuit trench device with a dielectric collar stack, and method of forming thereof
A method of using at least two insulative layers to form the isolation collar of a trench device, and the device formed therefrom. The first layer is preferably...
US-6,486,015 Low temperature carbon rich oxy-nitride for improved RIE selectivity
Reactive ion etch (RIE) selectivity during etching of a feature nearby embedded structure is improved by using a silicon oxynitride layer formed with...
US-6,485,871 Method of producing phase masks in an automated layout generation for integrated circuits
A method of producing phase masks for automatically generating a layout for an integrated circuit includes the step of compacting a layout of an integrated...
US-6,484,307 Method for fabricating and checking structures of electronic circuits in a semiconductor substrate
A method for fabricating and checking at least two structures of an electronic circuit in a semiconductor substrate. By using two different masks, in two method...
US-6,484,277 Integrated memory having a redundancy function
A memory has coding units that are used for allocating any one of redundant lines at a time to any one of first lines on an address basis. Each coding unit has a...
US-6,483,960 Optomodule and connection configuration
An optomodule has a carrier substrate; wiring applied on a front side of the carrier substrate; contacts configured on a rear side of the carrier substrate and...
US-6,483,768 Current driver configuration for MRAM
A current driver configuration for MRAMs includes word-line drivers and bit-line drivers at respective first ends of word lines and bit lines. The word line...
US-6,483,166 Semiconductor configuration having an optical fuse
The semiconductor configuration has a packing material that is permeable to radiation energy in a given wavelength band. One or more fuses that adjoin the...
US-6,482,716 Uniform recess depth of recessed resist layers in trench structure
A method for forming uniform-depth recesses across areas of different trench density, in accordance with the present invention, includes providing a substrate...
US-6,482,017 EMI-shielding strain relief cable boot and dust cover
EMI-shielding strain relief boots and dust covers and methods of using these boots and dust covers are described. An inventive EMI-shielding strain relief boot...
US-6,481,294 Sensor array for a capacitance measuring fingerprint sensor, and method for producing such a sensor array
A base layer, which is preferably flexible, has first conductor tracks, a first insulation layer, fine structures with first electrodes, second conductor tracks...
US-6,480,128 High-speed sample-and-hold circuit with gain
A sample-and-hold system that includes a first source follower having an input and an output and a second source follower that includes an input connected in...
US-6,480,064 Method and apparatus for an efficient low voltage switchable Gm cell
A switching Gm cell allowing a wide transconductance range with a limited voltage range. The Gm cell includes a plurality of Gm setting devices, the operation of...
US-6,480,055 Decoder element for generating an output signal having three different potentials and an operating method for...
A decoder element is provided with an output, whereby an output signal with one of three different possible potentials is produced. The output signal may have a...
US-6,480,044 Semiconductor circuit configuration
A semiconductor circuit is disclosed which contains a driving circuit which is integrated into a semiconductor substrate of a first conductivity type and...
US-6,480,039 Input buffer of an integrated semiconductor circuit
An integrated semiconductor circuit having a first operating mode and a second operating mode has a plurality of input buffers. At least one of the input buffers...
US-6,480,038 Bipolar comparator
A bipolar comparator with an asymmetric differential amplifier stage is described. The comparator has two transistors, and the control electrodes of which are...
US-6,480,024 Circuit configuration for programming a delay in a signal path
A circuit configuration includes two signal path sections that are used to program the delay of a signal path, in particular in DRAMs. The two signal path...
US-6,479,871 Electrostatic discharge (ESD) latch-up protective circuit for an integrated circuit
The ESD protective circuit proceeds from a modified lateral pnpn "latch-up" protective structure having a highly doped n-type zone, which is arranged on the well...
US-6,479,396 Dry polymer and oxide veil removal for post etch cleaning
In a process of preparing a via in a semiconductor substrate wafer in which vias are landed on tungsten, and in which resist is stripped using plasma or chemical...
US-6,479,373 Method of structuring layers with a polysilicon layer and an overlying metal or metal silicide layer using a...
Doped polysilicon layers and layered polysilicon structures are produced, and the layers and layered structures are structured. The doping is distinguished by...
US-6,477,106 Circuit configuration for deactivating word lines in a memory matrix
A circuit configuration for deactivating word lines in a memory matrix. The circuit configuration contains controllable connection devices for connecting the...
US-6,477,099 Integrated circuit with a differential amplifier
An integrated circuit has a differential amplifier in a basic circuit having two input transistors, a load element and a power source. The power source has an...
US-6,477,095 Method for reading semiconductor die information in a parallel test and burn-in system
A method according to the present invention is provided for determining memory device identification. The method invokes a serial output from n identification...
US-6,477,081 Integrated memory having memory cells with a magnetoresistive storage property
An integrated memory has memory cells with a magnetoresistive storage property. The memory cells are connected in each case between a column line and a row line....
US-6,477,078 Integrated memory having memory cells that each include a ferroelectric memory transistor
An integrated memory has word lines that run in a first direction, and bit lines and control lines that run in a second direction, which is perpendicular to the...
US-6,476,658 Circuit configuration with protection device
The circuit configuration, in particular a DRAM element, has a protection device for suppressing the formation and/or emission of a reflection signal caused by a...
US-6,476,657 Pulse generator for generating an output in response to a delay time
A pulse generator circuit, in particular for use in or for integrated circuits, which, in the usual way, has a number of inverting elements connected in series,...
US-6,476,650 Method for outputting data and circuit configuration with driver circuit
A method and also a circuit configuration with a driver circuit for the parallel amplification of two input signals is described. A first and a second amplified...
US-6,476,593 Method and circuit for compensation control of offset voltages of a radio receiving circuit integrated in a...
A method and circuit for compensation control of offset voltages of a radio receiving circuit integrated in a circuit module that can be used in receiver and...
US-6,475,919 Method for producing trenches for DRAM cell configurations
The invention relates to a method for producing trenches for manufacturing storage capacitors in DRAM cell configurations. In the method, a two-stage hard mask...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.