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Patent # Description
US-6,528,433 Method for monitoring nitrogen processes
The novel method allows monitoring of nitrogen processes by making use of the fact that the incorporation of nitrogen near the surface in silicon, or in a thin...
US-6,528,392 Dicing configuration for separating a semiconductor component from a semiconductor wafer
The dicing configuration for separating a semiconductor component from a semiconductor wafer is formed with a rupture joint which is created together with...
US-6,528,384 Method for manufacturing a trench capacitor
A method for manufacturing a trench capacitor uses a low-pressure gas phase doping for forming a buried plate as a capacitor plate. The use of the low-pressure...
US-6,528,383 Simultaneous formation of deep trench capacitor and resistor
A compact resistor is formed in an integrated circuit using many of the same steps as are employed in forming a trench capacitor for a DRAM cell; in particular...
US-6,528,355 Method for fabricating a trench MOS power transistor
A method for fabricating a trench MOS transistor includes the step of at least partly filling the trench with a conductive material which is isolated from the...
US-6,527,848 Complex of an element of transition group IV or V for forming an improved precursor combination
A new complex of an element of transition group IV or V is provided for forming an improved precursor combination for use in chemical vapor deposition (CVD)....
US-6,526,484 Methods and apparatus for reordering of the memory requests to achieve higher average utilization of the...
According to the present invention, a scheduler suitable for reordering of memory requests to achieve higher average utilization of the command and data bus is...
US-6,526,428 Method and apparatus for determining interpolated intermediate values of a sampled signal
A method and apparatus determines interpolated intermediated values of a sampled signal. In order to determine interpolated intermediate values of a sampled...
US-6,525,978 Circuit configuration for evaluating the information content of a memory cell
A description is given of a method and a circuit configuration for evaluating an information content of a memory cell, preferably of an MRAM memory cell, or of a...
US-6,525,977 Circuit configuration
A circuit configuration prevents a transfer of interference signals present on an input line to a processing section. Electrical input signals are evaluated in...
US-6,525,974 Integrated memory with redundancy
An integrated memory contains two normal read amplifiers and two first redundant read amplifiers. It also contains bit lines which are combined into at least two...
US-6,525,963 Programmable read-only memory and method for operating the read-only memory
A programmable read-only memory and a method for operating the read-only memory are described. The memory contains at least one memory cell field with a...
US-6,525,818 Overlay alignment system using polarization schemes
An optical alignment system used in the manufacture of semiconductor integrated circuits determines and adjusts the alignment between features which have been...
US-6,525,613 Efficient current feedback buffer
An efficient current feedback buffer is revealed. The buffer is useful in power supplies for a number of analog and digital devices, including CMOS voltage...
US-6,525,600 Bandpass filter
The bandpass filter has a comparatively large pass bandwidth, with, at the same time, comparatively steep edges up to the stop band and low attenuation in the...
US-6,525,597 Circuit configuration with internal supply voltage
In integrated circuits with internally generated supply voltages, during the run-up of the internal voltage generators, unintentionally high currents can arise...
US-6,525,416 Electronic devices and a sheet strip for packaging bonding wire connections of electronic devices and method...
An electronic device is described that has a sheet strip for packaging bonding wire connections of the electronic device and a method for producing it. To that...
US-6,525,374 Semiconductor component with a high breakdown voltage
The invention relates to a semiconductor component with a base zone (3) extending in a lateral direction (x) of a first type of conductivity (n) and at least two...
US-6,525,363 Integrated circuit configuration with at least one capacitor and method for producing the same
A first capacitor electrode of the capacitor, which is arranged on a surface of a substrate (1), has a lower part (T) and a lateral part (S) arranged thereon. At...
US-6,524,917 Method for fabricating an integrated circuit with undercut etching
The present invention provides a method for fabricating an integrated circuit, comprising the following steps: preparing a substrate (1) with an electrically...
US-6,524,448 Configuration for the execution of a plasma based sputter process
The present invention relates to a system for executing a plasma-based sputtering method, such as for example a PVD (Physical Vapor Deposition) method. In a...
US-6,522,588 Method and device for storing and outputting data with a virtual channel
A description is given of a method and a device for outputting data via a buffer memory. In which the data, which are intended to be output first from the buffer...
US-6,522,579 Non-orthogonal MRAM device
An MRAM device (100) and method of manufacturing thereof having wordlines (112) that run non-orthogonal relative to bitlines (122), resulting in lower current...
US-6,522,578 Method for preventing electromigration in an MRAM
A method for preventing electromigration in a magnetic random access memory (MRAM) is described. In the method, after a programming step, a signal which...
US-6,522,272 Analogue frontend
An analogue frontend, such as is used, for example, in receivers for communications equipment, comprises a plurality of analogue components (1-3) which are...
US-6,522,179 Differential line driver circuit
A differential line driver circuit having an output impedance matched to the line impedance includes first and second input terminals for the application of an...
US-6,521,988 Device for packaging electronic components
The invention relates to a device and a method for packaging electronic components (11) having semiconductor chips (5) by means of a mounting frame (1), which is...
US-6,521,978 Shielding device and electrical structural part having a shielding device
The shielding device described is distinguished by the fact that it has a coating that at least partially surrounds the element that is to be electromagnetically...
US-6,521,935 Mos transistor and dram cell configuration
A MOS transistor includes an upper source/drain region, a channel region, and a lower source/drain region that are stacked as layers one above the other and form...
US-6,521,542 Method for forming dual damascene structure
A method is provided for forming a step in a layer of material. The method includes forming the layer over a substrate. A cavity is formed in a portion of an...
US-6,521,512 Method for fabricating a thin, free-standing semiconductor device layer and for making a three-dimensionally...
In a method for fabricating a silicon-on-insulation wafer having fully processed devices in its upper-most silicon layer, the wafer is reduced in thickness from...
US-6,521,493 Semiconductor device with STI sidewall implant
A semiconductor device and method of manufacturing the same are provided. A trench is formed in a semiconductor substrate. A thin oxide liner is preferably...
US-6,520,688 Coupling element
A coupling element for optical coupling of at least one optoelectronic transducer to at least one optical wave guide, with a coupling element having an image...
US-6,519,103 View DAC feedback inside analog front circuit
A view DAC feedback inside an analog front circuit for a partial response, maximum likelihood based read/write channel is disclosed. The view DAC feedback...
US-6,518,855 Integrated circuit for mobile radio and mobile telephone installations
Microwave circuit arrangement containing one or more semiconductor switching elements, which are characterized in that at least one semiconductor switching...
US-6,518,819 Push-pull output stage for digital signals with regulated output levels
The circuit has a push-pull end stage which acts as an amplifier stage for digital signals. The push-pull end stage has two n-channel MOS transistors which...
US-6,518,789 Circuit configuration for converting logic levels
The circuit configuration for converting logic levels has a bipolar input stage and a CMOS output stage. The bipolar input stage is equipped to process ECL and...
US-6,518,616 Vertical gate top engineering for improved GC and CB process windows
A method for a memory cell has a trench capacitor and a vertical transistor adjacent to the capacitor. The vertical transistor has a gate conductor above the...
US-6,518,613 Memory cell configuration with capacitor on opposite surface of substrate and method for fabricating the same
A MOS transistor of a memory cell and a bit line connected thereto are disposed on a first surface of a substrate. A capacitor of the memory cell is disposed on...
US-6,518,151 Dual layer hard mask for eDRAM gate etch process
A method of fabricating an integrated circuit chip having a first region of a first layout rule and a second region of a second layout rule. The method includes...
US-6,517,641 Apparatus and process for collecting trace metals from wafers
An improved process for cleaning a semiconductor wafer surface during manufacture to remove metallic contaminants without the use of robotics and without risk of...
US-6,516,428 On-chip debug system
An on-chip debug system includes a data band selector operable to transmit to an emulator the selected data bands generated by the selected components in an...
US-6,515,891 Random access memory with hidden bits
A random access memory having a multiplicity of memory cells having logic states that can be changed by a control voltage. At least some of the memory cells...
US-6,515,890 Integrated semiconductor memory having memory cells with a ferroelectric memory property
An integrated semiconductor memory has memory cells with a ferroelectric memory property. The memory cells are in each case connected between a column line and a...
US-6,515,874 Clocked power supply
The integrable control circuit drives a semiconductor switch in a switched-mode power supply. The control circuit has a control unit for producing control pulses...
US-6,515,543 Circuit configuration for controlling nonlinear paths
An electrical circuit is provided for controlling nonlinear paths. A first linearization block and a second linearization block are provided, which may each have...
US-6,515,528 Flip-flop circuit
A flip-flop circuit comprises a master latch circuit (2), which receives an input signal (D), and, connected in series therewith, a slave latch circuit (3), the...
US-6,515,514 Method and circuit configuration for controlling a data driver
A data driver is activated in dependence of a provided bit sequence in order to produce, at the data output of the driver, a data signal which, in the times...
US-6,515,495 Test structure in an integrated semiconductor
With increasing integration density of integrated circuits, the packing density in test regions (kerf structures) located between the integrated circuits cannot...
US-6,515,374 Contact connection of metal interconnects of an integrated semiconductor chip
An integrated semiconductor chip has at least two metal interconnects of two different metallization planes, which are disposed parallel to one another. The...
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