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Twisted bit-line compensation for DRAM having redundancy
A memory is provided having an array of rows and columns of memory cells. The memory includes plurality of sense amplifiers, each one having a true terminal and...
Semiconductor memory having a redundancy circuit for word lines and method
for operating the memory
A redundancy circuit for a semiconductor memory having word lines and redundant word lines is described. The redundancy circuit activates the word line at the...
Circuit configuration for quantization of digital signals and for filtering
The invention relates to a circuit configuration for quantization of digital signals and for filtering quantization noise. Said circuit configuration comprises a...
Programmable logarithmic gain adjustment for open-loop amplifiers
Transconductance-based variable gain amplifiers amplify an input voltage by converting the voltage difference to a current and then amplifying the result. At...
Circuit arrangement to reduce the supply voltage of a circuit part and
process for activating a circuit part
In order to achieve reliable operation despite the greater interference susceptibility of a circuit (1) at a reduced power supply, in addition to a global power...
Method to improve charge pump reliability, efficiency and size
A dynamic clamp is used in conjunction with capacitors with thinner dielectric or with deep trench capacitors to solve the problem of dielectric breakdown in...
Voltage generator with standby operating mode
A voltage generator for producing an internal supply voltage has a standby voltage generator and a voltage generator for normal operation that are controlled in...
Method for producing an alternating phase mask
A carrier has a surface with a mask layer thereon. An irradiation-sensitive layer on the mask layer is exposed and developed to form a first exposure structure....
Slurry-less chemical-mechanical polishing
The invention provides slurry-less chemical-mechanical polishing processes which are effective in planarizing oxide materials, especially siliceous oxides, even...
Coupling device for connecting an optical fiber to an optical transmitting
or receiving unit and transmitting...
A coupling device is for coupling an optical fiber to an optical transmitting or receiving unit. The coupling device can be included in a transmitting or...
Forward link inter-generation soft handoff between 2G and 3G CDMA systems
In a CDMA cellular radiotelephone system, a soft handoff (SHO) is performed when a mobile station communicates with a new inter-generation base station, without...
Radio-frequency laser module and a method for producing it
A radio-frequency laser module has a substrate and a semiconductor laser disposed on the substrate. An electrical RF conductive path is provided on the...
Narrow contact design for magnetic random access memory (MRAM) arrays
An MRAM device (200) and method of manufacturing thereof having second conductive lines (228) with a narrow width. The second conductive lines (228) partially...
Etch selectivity inversion for etching along crystallographic directions in
Methods for expanding trenches are disclosed. A trench is formed in a substrate having side walls including at least two crystallographic planes. One...
Method of producing a semiconductor surface covered with fluorine
Fluorine is deposited on a semiconductor substrate surface according to a novel process. A semiconductor substrate is placed in a reaction chamber and the...
Metal wire fuse structure with cavity
An integrated circuit has primary devices and redundant devices being selective substituted for the primary devices through at least one fuse. The fuse includes...
Trench isolation processes using polysilicon-assisted fill
Disclosed is a method of simultaneously supplying trench isolations for array and support areas of a semiconductor substrate made of a substrate material, the...
Strap resistance using selective oxidation to cap DT poly before STI etch
A method of providing shallow trench (143) isolation for a semiconductor wafer (100). Trenches (113) are formed within a first semiconductor material (112) and a...
Method for fabricating a semiconductor memory component
The invention relates to a method for fabricating a semiconductor memory component, in particular a DRAM or FeRAM having a silicon substrate. The lower electrode...
Method of forming a self aligned trench in a semiconductor using a
patterned sacrificial layer for defining the...
A method of forming a trench can be used in the fabrication of dynamic random access memory (DRAM) cells. In one aspect, a first layer of a first material (e.g.,...
Method for producing a cell of a semiconductor memory
The process first forms trench capacitors in a substrate, which are filled with a trench fill and in which a first insulating layer is disposed over the...
DRAM cell system and method for producing same
DRAM cell arrangement and method for fabricating it Word lines and bit lines are arranged above a main area of a substrate, with the result that they have a...
DRAM memory cell for DRAM memory device and method for manufacturing it
A DRAM memory cell includes a MOSFET selection transistor having a drain region and a source region in a semiconductor substrate column. A current channel, which...
Optical plug-in connector
The plug connector extends along a main axis and at least one optical waveguide end terminates in a connector housing. Locking parts, which are preferably...
Device for performing surface treatment on semiconductor wafers
A device for performing surface treatment on semiconductor wafers has a cassette (1) for accommodating a plurality of wafers (5) in its interior (3); the wafers...
Advanced bit fail map compression with fail signature analysis
A method for providing a compressed bit fail map, in accordance with the invention includes the steps of testing a semiconductor device to determine failed...
Nonlinear echo compensator
A nonlinear echo compensator for an L-level message signal includes a plurality of groups of coefficient memories, wherein each group is assigned to at least one...
Arrangement for analyzing the nonlinear properties of a communication
An arrangement to analyze the nonlinear properties of a communication channel that uses a test signal having a number of tones. The test signal is transmitted...
Configuration for evaluating a signal which is read from a ferroelectric
A configuration is described for evaluating a signal that is read from a ferroelectric storage capacitor, in which, in addition to positive and negative...
Integrable current supply circuit with parasitic compensation
Integrable current supply circuit An integrable current supply circuit for feeding a supply current to a signal line (12) having a current source (14) for...
System carrier for a semiconductor chip having a lead frame
A system substrate for a semiconductor chip has a conductor frame (1); many small-area signal flat conductors (4) extend from webs (2, 3) of the conductor frame...
MOS transistor and method for producing the transistor
Terminal regions of source/drain zones of an MOS transistor are configured over the substrate in the form of conductive structures, are separated from the...
A connecting system for detachably mechanically connecting an electronic component to a support is described. The connecting system has fixed rails that are...
Multimedia chip card
Operating method for an integrated memory having writeable memory cells and
corresponding integrated memory
Before a write and/or read access to one of the memory cells is carried out, a security information stored in a security memory cell is read out. If the security...
Method for checking the functioning of memory cells of an integrated
In a method for checking the functioning of memory cells of an integrated semiconductor memory, a first group of the memory cells is tested. The test results,...
Integrated semiconductor memory device
An integrated semiconductor memory device that can be subjected to a memory cell test in order to determine functional and defective memory cells includes...
Single-port memory cell
A single-port memory cell arrangement includes a multiplicity of single-port memory cells, each having a selection transistor and a memory transistor. The...
Memory configuration with a central connection area
A memory configuration includes a central connection area. The central connection area is surrounded annularly by cell arrays having memory cells. The memory...
Method for random access to picture blocks in video pictures
During image processing of video pictures, it is generally necessary to have fast, repeated access to adjacent picture blocks. Picture memories with a sufficient...
Circuit arrangement for conversion of an input current signal to a
corresponding digital output signal
The invention provides a circuit arrangement for conversion of an input current signal (11) to a digital output signal (43). In particular, the invention relates...
Digital/analog converter for converting a binary coded data word into an analog output signal, having a capacitor cell Matrix (9) comprising capacitor cells...
Circuit configuration with an integrated amplifier
A circuit configuration with an integrated amplifier is described. The amplifier has an output stage that is connected to a supply potential terminal and a...
Switchable operational amplifier for switched op-amp applications
A switchable operational amplifier is presented for switched op amp technology, in which the current through the pre-stage is reduced during the off phase of the...
Patterning of content areas in multilayer metalization configurations of
The semiconductor structure has a layer structure formed from a metalization layer and a dielectric layer. The metalization layer is patterned and has contact...
Transistor with ESD protection
The transistor has source and drain diffusion regions between which a gate electrode is disposed. In order to increase the sheet resistance of the source and/or...
Process for the electrochemical oxidation of a semiconductor substrate
In a process for the electrochemical oxidation of a semiconductor substrate that has recesses, such as for example, capacitor trenches or mesopores, formed in a...
Method for patterning an organic antireflection layer
An antireflection coating (ARC) polymer layer is patterned by DUV (deep ultraviolet) lithography followed by an ARC open etching step and subsequent etching of...
Method for fabricating capacitor electrodes
The method according to the invention enables the roughness of an HSG surface to be substantially transferred to the surface of an electrode. The electrode...
Method of producing a ferroelectric semiconductor memory
A method of producing a ferroelectric semiconductor memory, includes forming a switching transistor on a semiconductor substrate, applying an insulating layer to...