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Patent # Description
US-6,660,654 Fabrication method and apparatus for fabricating a spatial structure in a semiconductor substrate
In a fabrication method for making spatially etched structures, in particular trench structures for semiconductor memory cells, in a semiconductor substrate made...
US-6,660,637 Process for chemical mechanical polishing
A chemical mechanical polishing process rotates a wafer having an alignment mark at a wafer rotation rate and a polishing surface at an off-matched rotation...
US-6,660,582 Method of forming a vertical field-effect transistor device
It is proposed when forming field-effect transistor devices in a semiconductor substrate for the overlapping region of a source-drain region that is to be...
US-6,660,437 Alternating phase mask
An alternating phase mask having a branched structure containing two opaque segments is described. Two transparent surface segments are disposed on both sides of...
US-6,658,601 Method and apparatus for monitoring a process that proceeds automatically to ensure that it is executed properly
A method and an apparatus for monitoring a process that proceeds automatically to ensure that it is executed properly. The method and the apparatus are...
US-6,658,244 Method and circuit for compensation control of offset voltages in a radio receiving circuit integrated in a...
Offset voltage compensation in baseband in a radio receiver path is achieved by control and programming signals which are required in any case to set the desired...
US-6,658,097 Codec circuit and method for increasing the data transmission rate during a modem transmission
Codec circuit for increasing the data transmission rate in a modem transmission with a first programmable digital filter (13) which is connected into a...
US-6,657,916 Integrated memory with memory cell array
An integrated memory has a memory cell array with memory cells which are connected to word lines and bit lines. For the purpose of reading from or writing to one...
US-6,657,909 Memory sense amplifier
Memory sense amplifier unit for amplifying a data signal read from a memory via bit lines (2, 3), having a precharge circuit (4) comprising PMOS transistors (5,...
US-6,657,802 Phase assisted synchronization detector
A synchronization detector including a phase detector and a distance metric calculator. The phase detector uses the preamble readback signal to estimate the bit...
US-6,657,479 Configuration having a current source and a switch connected in series therewith
The configuration described is distinguished by the fact that it contains a control device which ensures that the potential which is established on the...
US-6,657,453 Semiconductor wafer testing system and method
An apparatus for testing a plurality of semiconductor devices of a common wafer includes a plurality of driver circuits, each operable to produce an intermediate...
US-6,657,452 Configuration for measurement of internal voltages of an integrated semiconductor apparatus
The invention relates to a configuration for the measurement of internal voltages in a DUT (2), in which a comparator (3) is provided in each DUT (2) and...
US-6,657,422 Current mirror circuit
A current mirror circuit has an input path, which has a current source and, connected in series therewith, a first transistor circuit with at least two...
US-6,657,363 Thin film piezoelectric resonator
The layer of the cover electrode, or an additional layer on the cover electrode is formed with holes, preferably produced lithographically, or similar...
US-6,657,314 Manipulation-proof integrated circuit
The integrated circuit has a circuit with information that is protected by a covering shielding level. A network with a large number of nodes is formed in the...
US-6,656,798 Gate processing method with reduced gate oxide corner and edge thinning
Disclosed is a method of processing a semiconductor gate structure on a semiconductor wafer, the method comprising providing a semiconductor structure with an...
US-6,656,787 Method for fabricating non-volatile memories
A method for fabricating a semiconductor component includes the steps of applying an electrode material and a metal-oxide-containing layer on a substrate surface...
US-6,656,647 Method for examining structures on a wafer
In a method for examining structures on a wafer, at least one mask, which is applied on the wafer and is fabricated by exposure processes, is used for...
US-6,654,885 Method for authorization checking and configuration for carrying out the method
The system checks whether authorization exists for at least two data processing devices to exchange data with one another. In the preferred embodiment, both data...
US-6,654,281 Nonvolatile nor semiconductor memory device and method for programming the memory device
A nonvolatile NOR semiconductor memory device and a method for programming the memory device are described. The memory device has a multiplicity of ...
US-6,654,271 Method for reading and storing binary memory cells signals and circuit arrangement
The invention features a method for reading and storing a binary memory cell signal where a signal transit time of the binary memory cell signal between one...
US-6,653,963 Method and apparatus for the A/D conversion of analog signals and corresponding A/D converter arrangement
An A/D converter arrangement comprises an A/D converter (6) to which analog signals from a plurality of signal channels (2) can be fed for A/D conversion. With...
US-6,653,882 Output drivers for IC
The invention features an output driver for integrated circuits that includes a driver that has a data input connected to the integrated circuit, a data output...
US-6,653,879 Method and system for managing a pulse width of a signal pulse
An input signal is received having a period and an input pulse width. The input pulse width of an input signal is adjusted to an output pulse width of an output...
US-6,653,875 Method and apparatus for a delay lock loop
A delay lock loop circuit includes a forward delay circuit receiving a reference clock signal and issuing a delayed clock signal. The forward delay circuit...
US-6,653,732 Electronic component having a semiconductor chip
An electronic component includes a semiconductor chip and/or a test structure. The semiconductor chip includes a multi-layer coating having at least one...
US-6,653,185 Method of providing trench walls by using two-step etching processes
Method of providing trench walls of a uniform orientation to support epitaxial growth in the trench. The trench is formed by a first etching process. A second...
US-6,652,291 Leadframe interposer
The leadframe interposer is provided with an upset which is formed by shaping in a central region and enlarges the vertical dimension of the interposer there in...
US-6,651,203 On chip programmable data pattern generator for semiconductor memories
A semiconductor memory chip in accordance with the present invention includes a first memory array to be tested including a plurality of memory cells arranged in...
US-6,650,883 Mixer with adjustable linearity
A four-quadrant multiplier for mixing RF signals comprises two differential amplifiers respectively connected as a load of a third differential amplifier. Both...
US-6,650,690 Device and system for carrying out search procedures in a mobile radio receiver
A device for carrying out search procedures includes a memory for storing a digital received data sequence, and a memory storing a predetermined correlation data...
US-6,650,577 Integrated semiconductor memory having memory cells in a plurality of memory cell arrays and method for...
An integrated semiconductor memory includes memory cells in a plurality of memory cell arrays disposed on a semiconductor chip in levels running above one...
US-6,650,094 Circuit configuration for supplying an electrical consumer and for limiting a time deviation of a switching...
A circuit configuration for supplying switchable voltage and/or current to an electrical consumer, includes a switching device, a voltage source for tapping high...
US-6,649,999 Semiconductor chip configuration with a layer sequence with functional elements contacted by contact pads
In a semiconductor chip, conductive tracks run in a rewiring layer from contact pads to contact elevations. The contact pads are formed as vias. The conductive...
US-6,649,974 Field-effect controlled semiconductor device having a non-overlapping gate electrode and drift region and its...
A semiconductor component includes a first connection zone of a first conductivity type for providing a contact at a first side of a semiconductor body and a...
US-6,649,521 Method for determining the relevant ion and particle flows in i-PVD processes
A method for determining relevant deposition parameters in i-PVD processes, includes, first calculating the reaction rates for desired reagents of the gas plasma...
US-6,649,483 Method for fabricating a capacitor configuration
A method for fabricating a capacitor configuration in particular an FeRAM memory device includes the step of filling intermediate regions, which remain free...
US-6,649,468 Method for fabricating a microelectronic component
A method for fabricating a microelectronic component includes the step of applying a barrier against the passage of hydrogen to a storage capacitor having a...
US-6,649,459 Method for manufacturing a semiconductor component
The invention relates to a method for producing a semiconductor component including semiconductor areas of different conductivity types which are alternately...
US-6,649,450 Method of producing an integrated circuit and an integrated circuit
A circuit is described which has a semiconductor component surrounded by a plastic housing and with which contact can be made via conductor tracks. Between each...
US-6,649,441 Method for fabricating a microcontact spring on a substrate
The invention relates to a method for fabricating a microcontact spring on a substrate (1) with at least one contact pad (2) and a first insulator layer (13)...
US-6,649,424 Method for fabricating an integrated semiconductor circuit having a strongly polarizable dielectric or...
A method of fabricating semiconductor circuits having integrated capacitors that have a dielectric or a ferroelectric material between electrodes. The materials...
US-6,647,183 Optical coupling system
To ensure laser safety, also in the case of a largest possible coupled optical power, during the direct optical coupling of a light-emitted component to an...
US-6,647,076 Method of compensating for interference in a signal generated by discrete multitone modulation, and circuit...
The invention relates to a method for the compensation of interference in a signal generated by discrete multitone modulation. The signal generated by discrete...
US-6,647,038 Optoelectronic laser module
An optoelectronic laser module, in particular for dense wavelength division multiplex systems, is described. The laser module has a laser diode with an active...
US-6,646,937 Integrated clock generator, particularly for driving a semiconductor memory with a test signal
An integrated clock generator, particularly for driving a semiconductor memory with a test signal, in which a delay locked loop is provided which, in a first...
US-6,646,908 Integrated memory chip with a dynamic memory
The integrated memory chip has an external control terminal, a dynamic memory, and a control circuit for controlling a memory access to the dynamic memory. The...
US-6,646,580 Digital/analog converter with programmable gain
Digital/analog converter with programmable gain for converting a digital input signal (D.sub.n) into an analog output signal, the digital/analog converter (1)...
US-6,646,579 Method and device for generating OVSF code words
A code word generator for OVSF codes, comprising an intermediate memory device (16) which is used to input a calculation index as a binary calculation index data...
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