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Patent # Description
US-6,633,379 Apparatus and method for measuring the degradation of a tool
A machining apparatus (10) comprises a material removing tool (12) movably mounted for removing material from a workpiece (14); means for illuminating (42, 54) a...
US-6,633,064 Compensation component with improved robustness
The compensation component is formed with compensation regions in a semiconductor between two electrodes. By varying the second field and/or the first field, a...
US-6,633,061 SOI substrate, a semiconductor circuit formed in a SOI substrate, and an associated production method
In a SOI substrate, a semiconductor circuit formed in a SOI substrate, and an associated production method, a multilayer barrier layer with a potential barrier...
US-6,632,687 Methods of compensating for wafer parameters
The present invention relates to a system and method for compensating IC parameters. According to an embodiment of the present invention, a die of an IC wafer is...
US-6,631,511 Generating mask layout data for simulation of lithographic processes
A method for generating mask layout data for lithography simulation includes prescribing original data defining an original layout of a mask and determining a...
US-6,630,727 Modularly expandable multi-layered semiconductor component
A modularly expandable semiconductor component includes at least one carrier layer, at least one intermediate layer, at least one coverlayer, at least one...
US-6,630,723 Laser programming of integrated circuits
Laser Programming of Integrated Circuits. The invention relates to the laser adjustment or laser programming of laser fuses of an integrated circuit on a chip,...
US-6,630,703 Magnetoresistive memory cell configuration and method for its production
A storage cell configuration including magnetoresistive storage elements located in a cell field between first lines and second lines. A first metalization...
US-6,630,698 High-voltage semiconductor component
The invention relates to a high-voltage semiconductor component comprising semiconductor areas (4, 5) of alternating, different conductivity types which are...
US-6,630,379 Method of manufacturing 6F2 trench capacitor DRAM cell having vertical MOSFET and 3F bitline pitch
A memory cell structure including a planar semiconductor substrate. A deep trench is in the semiconductor substrate. The deep trench has a plurality of side...
US-6,628,860 Fiber optic connector systems
A fiber optic connector system that includes a fiber optic plug and a fiber optic socket (or input) is described. The fiber optic input includes mechanisms for...
US-6,628,553 Data output interface, in particular for semiconductor memories
A data output interface, in particular for semiconductor memories, provides a plurality of output drivers for providing data output signals in a manner dependent...
US-6,628,551 Reducing leakage current in memory cells
A memory cell having first and second access transistors coupled to a storage transistor is disclosed. The access transistors are high gate threshold voltage...
US-6,628,544 Flash memory cell and method to achieve multiple bits per cell
A method of flash memory cell programming is provided which uses a uniform electric potential across tunnel oxide. The tight Vt distribution and very stable Vt...
US-6,628,541 Memory architecture with refresh and sense amplifiers
An improved memory architecture is described. The memory architecture includes separately controlled refresh and sense amplifiers to enable a memory access and...
US-6,628,467 Input/output multiplex system for a read/write channel in a disk drive
This invention provides a read/write channel with a multiplex input/output system for a disk drive, which may have one or more magnetic disks, one or more...
US-6,628,409 Method for determining the distance between periodic structures on an integrated circuit or a photomask
Fourier transformations are used to calculate a power spectrum of an image of an integrated circuit. The distance between periodic structures is determined from...
US-6,628,156 Integrated circuit having a timing circuit, and method for adjustment of an output signal from the timing circuit
An integrated circuit has a timing circuit with a power source and a capacitor. The timing circuit outputs an output signal whose time can be adjusted and which...
US-6,628,152 Method for monitoring a proper functioning of an integrated circuit
A proper functioning of an integrated circuit is monitored by monitoring a supply voltage of the integrated circuit. Dips in the supply voltage are ascertained....
US-6,628,141 Integrated circuit having a scan register chain
An integrated circuit is characterized in that circuit parts contained therein are connected to one another via an interface containing at least one scan...
US-6,627,970 Integrated semiconductor circuit, in particular a semiconductor memory circuit, having at least one integrated...
An integrated semiconductor circuit, in particular a semiconductor memory circuit, having at least one integrated electrical antifuse structure is described. The...
US-6,627,940 Memory cell arrangement
A memory-cell array includes a substrate forming parallel first and second trenches. A transistor's upper source/drain region adjoins two of the first and two of...
US-6,627,934 Integrated semiconductor memory configuration with a buried plate electrode and method for its fabrication
A semiconductor memory configuration has a plurality of selection transistors. Each selection transistor is connected to a first electrode of a storage...
US-6,627,548 Process for treating semiconductor substrates
The invention relates to a process for treating semiconductor substrates in which metal layers are exposed by removing one or more layers of the surface of a...
US-6,627,498 Memory cell fabrication method and memory cell configuration
The memory cell has a source region and a drain region in semiconductor material and, above a channel region between the source and drain regions, a...
US-6,627,496 Process for producing structured layers, process for producing components of an integrated circuit, and process...
A process for producing structured layers on a base body, in particular a semiconductor body, includes the steps of providing a first layer, structuring the...
US-6,627,392 Method of transferring a pattern of high structure density by multiple exposure of less dense partial patterns
A pattern with small, densely packed structures is transferred from a structure carrier to an object. At least two partial patterns of less densely packed...
US-6,625,076 Circuit configuration fir evaluating the information content of a memory cell
A description is given of a method and a circuit configuration for evaluating an information content of a memory cell, preferably of an MRAM memory cell, or of a...
US-6,625,065 Method for masking DQ bits
A method for masking DQ bits that are input into a semiconductor memory by a memory controller is described. In this case, the bits to be masked are provided...
US-6,624,898 Wafer supporting plate
A wafer supporting plate suitable for supporting a wafer during a semiconductor-forming process. In particular, the present invention relates to a wafer...
US-6,624,499 System for programming fuse structure by electromigration of silicide enhanced by creating temperature gradient
The present invention provides a system, apparatus and method of programming via electromigration. A semiconductor fuse which includes a cathode and an anode...
US-6,624,461 Memory device
The invention relates to a memory device comprising numerous memory cells, each cell comprising at least one selection transistor and one stacked capacitor and...
US-6,624,042 Fabrication process for a semiconductor component
A process for fabricating a semiconductor component includes providing a trench in a substrate and depositing a liner layer on the resulting structure using a...
US-6,623,231 Plant for producing semiconductor products
A plant for producing semiconductor products is described and has a plurality of production and measuring units in at least one clean room. Provided there is a...
US-6,623,179 Electro-optical data transfer module
An electro-optical data transmission module comprises at least a first SMT housing (11) and a second SMT housing (13). A surface-emitting laser light emitter...
US-6,621,806 Timing device and timing method
A timing device for generating and outputting a plurality of signal edges by changing signal statuses at predeterminable times. The timing device includes a...
US-6,621,752 Refreshing scheme for memory cells a memory array to increase performance of integrated circuits
In an IC having memory cells, a write operation is performed on a word within a particular row of memory cells. The other words within the same row are refreshed...
US-6,621,683 Memory cells with improved reliability
A capacitor with improved reliability is disclosed. The capacitor includes a bottom electrode, a top electrode, and an intermediate layer therebetween. A...
US-6,621,431 Analog-to-digital converter circuit
An analog-to-digital converter circuit including an analog-to-digital converter and calibrating circuit, preferably in the form of a digital logic, for the...
US-6,621,364 Voltage-controlled oscillator for frequency modulation
A voltage-controlled oscillator for frequency modulation includes an oscillator core with a tunable resonant circuit component which is driven with a control...
US-6,621,356 Phase-locked loop with short transient recovery duration and small interference signal component
In order to shorten the transient recovery duration, the phase-locked loop has a voltage-controlled oscillator providing an oscillator signal to a first...
US-6,621,343 Open loop variable gain amplifier using replica gain cell
A variable gain amplifier ("VGA") having an open loop architecture is disclosed. The VGA includes one or more gain cells coupled in the signal path to amplify a...
US-6,621,334 Frequency-compensated, multistage amplifier configuration and method for operating a frequency-compensated...
A frequency compensation circuit includes a first and a second compensation capacitor for a frequency-compensated amplifier to which a chopped useful signal can...
US-6,621,304 Clocking and synchronization circuitry
A clocking and synchronization circuitry is disclosed. A plurality of windows is provided to accommodate jitters in a clock with respect to a reference clock. A...
US-6,621,112 DRAM with vertical transistor and trench capacitor memory cells and methods of fabrication
A semiconductor Dynamic Random Access Memory (DRAM) cell is fabricated using a vertical access transistor and a storage capacitor formed in a vertical trench. A...
US-6,620,724 Low resistivity deep trench fill for DRAM and EDRAM applications
Semiconductor devices having deep trenches with fill material therein having low resistivity are provided along with methods of fabricating such semiconductor...
US-6,620,701 Method of fabricating a metal-insulator-metal (MIM) capacitor
A method of manufacturing a metal-insulator-metal capacitor (MIMCap) (36) including first conductive lines (15), capacitor dielectric (26) and second conductive...
US-6,620,699 Method for forming inside nitride spacer for deep trench device DRAM cell
A method is provided for forming an inside nitride spacer in a deep trench device DRAM cell. The method includes depositing an oxide liner in a trench etched...
US-6,620,677 Support liner for isolation trench height control in vertical DRAM processing
A method of manufacturing a vertical DRAM device (10) having isolation trenches (38) with a controlled height. A support liner (54) is disposed over support...
US-6,620,647 Method for producing a semiconductor component with a silicon carrier substrate
Semiconductor chips are mounted on a multilayer wiring of a silicon carrier substrate, while the bottom side of the carrier substrate is provided with soldering...
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