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Patent # Description
US-6,621,112 DRAM with vertical transistor and trench capacitor memory cells and methods of fabrication
A semiconductor Dynamic Random Access Memory (DRAM) cell is fabricated using a vertical access transistor and a storage capacitor formed in a vertical trench. A...
US-6,620,724 Low resistivity deep trench fill for DRAM and EDRAM applications
Semiconductor devices having deep trenches with fill material therein having low resistivity are provided along with methods of fabricating such semiconductor...
US-6,620,701 Method of fabricating a metal-insulator-metal (MIM) capacitor
A method of manufacturing a metal-insulator-metal capacitor (MIMCap) (36) including first conductive lines (15), capacitor dielectric (26) and second conductive...
US-6,620,699 Method for forming inside nitride spacer for deep trench device DRAM cell
A method is provided for forming an inside nitride spacer in a deep trench device DRAM cell. The method includes depositing an oxide liner in a trench etched...
US-6,620,677 Support liner for isolation trench height control in vertical DRAM processing
A method of manufacturing a vertical DRAM device (10) having isolation trenches (38) with a controlled height. A support liner (54) is disposed over support...
US-6,620,647 Method for producing a semiconductor component with a silicon carrier substrate
Semiconductor chips are mounted on a multilayer wiring of a silicon carrier substrate, while the bottom side of the carrier substrate is provided with soldering...
US-6,620,559 Photomask, method of lithographically structuring a photoresist layer with the photomask, and method of...
The photomask and the associated method of lithography and mask technique enable production of a regular configuration of resist dots or holes. At least one...
US-6,618,836 Configuration and method for producing test signals for testing a multiplicity of semiconductor chips
A configuration for producing test signals for testing semiconductor chips includes a clock signal source for producing a clock signal, and a tester. The test...
US-6,618,632 Process for monitoring processing plants
A method of monitoring and/or controlling machining plans having time-dependent machining parameters includes measuring desired time-dependent machining...
US-6,618,481 Method for improving acoustic sidetone suppression in hands-free telephones
A method for improving acoustic sidetone suppression in hands-free telephones, in particular for use in motor vehicles, is described. The telephone has a level...
US-6,618,410 Optoelectronic semiconductor component
An Optoelectronic semiconductor component, in which an active zone is disposed above a semiconductor substrate, and which zone is disposed between at least one...
US-6,618,306 Semiconductor memory device having row and column redundancy circuit and method of manufacturing the circuit
A digital circuit configuration includes a memory matrix having M rows and N columns and P<M additional rows and Q<N additional columns, and an addressing...
US-6,618,305 Test circuit for testing a circuit
Test circuit for testing a circuit to be tested, having a test data generator, which generates test data in a manner dependent on data control signals which are...
US-6,618,303 Integrated circuit, test structure and method for testing integrated circuits
An electronic circuit in an integrated circuit having memory cells is described. The circuit permits information to be written to particular memory cells only...
US-6,617,914 Electrical antifuse with external capacitance
An antifuse having a dielectric disposed between a plurality of conductive elements is programmed with one of the conductive elements connected to a capacitor....
US-6,617,899 Ultra high speed clocked analog latch
An ultra high-speed clocked analog latch is revealed for use at clock speeds from 100 MHz to several GHz. The analog latch is used as a latching comparator for...
US-6,617,640 Field-effect-controllable semiconductor configuration with a laterally extending channel zone
A semiconductor configuration includes a semiconductor body with a first connection zone of a first conductivity type, a second connection zone of the first...
US-6,617,605 Nonvolatile memory cell and method for producing the memory cell
An EPROM-like memory includes a substrate having a source region, a drain region, and a channel. The memory includes a gate stack formed by a gate oxide, a...
US-6,617,213 Method for achieving high self-aligning vertical gate studs relative to the support isolation level
A vertical gate transistor has a gate stud (14) that extends above the substrate (20) surface in order to contact a word line. The stud is formed of a first...
US-6,615,351 Method for checking the authenticity of a data medium
In a method for checking the authenticity of a data medium, in particular a smart card, the encrypted form of a physical feature of the data medium is stored in...
US-6,615,344 System and method for tracking selectively enabling modules used in an integrated processor using a tracking...
An integrated processor is provided having functional unit tracking and monitoring capabilities. The processor core is configured to read configuration data and...
US-6,615,289 Semiconductor chip configuration and method of controlling a semiconductor chip
An integrated semiconductor chip is connected to external terminals with all of its data-carrying bonding pads. One of a plurality of possible data input/data...
US-6,614,963 Module for optical signal transmission
The module for optical signal transmission has a transmitting or receiving component mounted on a carrier. At least one optical waveguide, whose two ends...
US-6,614,842 FIR filter architecture for 100Base-TX receiver
A 100Base-TX receiver employs a finite impulse response (FIR) filter to provide both equalization and insertion loss compensation for an MLT-3 input signal. The...
US-6,614,835 Acquisition method and configuration for carrying out the method
A communications acquisition method includes a correlation of a received, coded spread sequence having a length of m bits with a locally generated spread...
US-6,614,706 Voltage regulating circuit, in particular for semiconductor memories
The voltage regulating circuit, in particular for semiconductor memories, has a reference-voltage generator for generating a reference voltage, an in-phase...
US-6,614,704 Circuit and method for refreshing memory cells in a DRAM
The memory cells of a DRAM are refreshed such that the temporal sequence of the control signals for triggering the information refresh operation for the...
US-6,614,700 Circuit configuration with a memory array
The circuit configuration has a memory array, a memory access controller, a control unit, and an input/output circuit. The control unit outputs a control signal...
US-6,614,661 Covering device for ceramic modules
The covering device covers a ceramic module with electronic components arranged between a ceramic substrate and an upper covering plate of the covering device....
US-6,614,642 Capacitor over plug structure
A capacitor over plug (COP) structure is disclosed. The COP avoids the step which is created in conventional COP structures, which adversely impacts the...
US-6,614,605 Adjusting apparatus and method for its adjustment
An adjusting apparatus is provided, in particular, for the adjustment of a lens in an optoelectronic transmitting/receiving device, has a number of actuating...
US-6,614,575 Optical structure and method for producing the same
An optical structure includes a substrate having semiconductor material and a grating structure. The grating structure has the property of emitting at least one...
US-6,614,322 Voltage controlled oscillator with a transistor and a frequency variable resonant circuit
A voltage controlled oscillator for wide range tuning bandwidth includes a transistor with a voltage tunable resonant circuit connected to an emitter of the...
US-6,614,308 Multi-stage, high frequency, high power signal amplifier
A broadband RF signal amplifier includes a plurality of transistors attached to a surface of a pedestal, each transistor having an input and an output. An RF...
US-6,614,248 Tester apparatus for electronic components
A tester apparatus for electronic components has a tester unit and one or more first contactor apparatus next to one another for making contact with the...
US-6,614,243 Measurement probe for detecting electrical signals in an integrated semiconductor circuit
A measurement probe for detecting electrical signals in an integrated circuit on a semiconductor chip has a lever arm and a probe tip which is configured on the...
US-6,614,100 Lead frame for the installation of an integrated circuit in an injection-molded package
The lead frame has a spring element, which can be compressed during the injection molding of the package by an injection mold. The resultant resilience has the...
US-6,614,090 Compensation semiconductor component and method of fabricating the semiconductor component
The semiconductor component is a charge carrier compensation component formed in a semiconductor body. A semiconductor basic body is disposed in the...
US-6,614,069 Nonvolatile semiconductor memory cell and method for fabricating the memory cell
A nonvolatile semiconductor memory cell includes a transistor component formed on a substrate and a storage node that determines the switching state of the...
US-6,614,066 Ferroelectric transistor and memory cell configuration with the ferroelectric transistor
A first source-drain region, a channel region, and a second source-drain region are arranged one after another in a semiconductor substrate. At least the surface...
US-6,614,048 Memory element with molecular or polymeric layers, memory cell, memory array, and smart card
The memory cell or the memory array formed of such memory cells has different molecular or polymeric layers forming an electrochemical redox pair. A matrix...
US-6,613,664 Barbed vias for electrical and mechanical connection between conductive layers in semiconductor devices
A multi-layer integrated circuit (400) and method of manufacturing thereof having barbed vias (427) connecting conductive lines (468, 408). Circuit (400)...
US-6,613,644 Method for forming a dielectric zone in a semiconductor substrate
A method for forming a dielectric zone in a region of a semiconductor substrate is described. A first trench and a second trench are formed in the region of the...
US-6,613,640 Method for fabricating an integrated ferroelectric semiconductor memory and integrated ferroelectric...
The integrated ferroelectric semiconductor memory is fabricated according to the stack cell principle. A ferroelectric capacitor module is formed on an...
US-6,613,624 Method for fabricating an integrated semiconductor circuit
Integrated semiconductor circuits have MOS transistors whose gate electrodes are provided with dopings in order to set the electrical potential of the channel...
US-6,613,616 Method for fabricating field-effect transistors in integrated semiconductor circuits and integrated...
A method for fabricating a field-effect transistor situated within an integrated semiconductor circuit. At least two gate regions each extending between a source...
US-6,612,858 Device for unlocking an electronic component that is insertible into a receiving device
An apparatus for unlocking an electronic component to be inserted into a retaining device, in particular a transceiver, and held in the retaining device by a...
US-6,612,757 Multichannel optical transmitter
The transmission device comprises a transmission unit (1) having a plurality of useful lasers (3b to 3m), which are arranged in a row (2) and emit useful...
US-6,612,738 Method for determining the temperature of a semiconductor chip and semiconductor chip with temperature...
In order to be able to determine precisely a temperature of a semiconductor chip, in particular a semiconductor memory, during active operation, a ...
US-6,611,614 Image acquisition apparatus
Sensor elements are arranged in a hexagonal grid. A processor element in the form of a primitive automaton is assigned to each of the sensor elements in the...
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