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Nonvolatile semiconductor memory cell and method for fabricating the memory
A nonvolatile semiconductor memory cell includes a transistor component formed on a substrate and a storage node that determines the switching state of the...
Ferroelectric transistor and memory cell configuration with the
A first source-drain region, a channel region, and a second source-drain region are arranged one after another in a semiconductor substrate. At least the surface...
Memory element with molecular or polymeric layers, memory cell, memory
array, and smart card
The memory cell or the memory array formed of such memory cells has different molecular or polymeric layers forming an electrochemical redox pair. A matrix...
Barbed vias for electrical and mechanical connection between conductive
layers in semiconductor devices
A multi-layer integrated circuit (400) and method of manufacturing thereof having barbed vias (427) connecting conductive lines (468, 408). Circuit (400)...
Method for forming a dielectric zone in a semiconductor substrate
A method for forming a dielectric zone in a region of a semiconductor substrate is described. A first trench and a second trench are formed in the region of the...
Method for fabricating an integrated ferroelectric semiconductor memory and
The integrated ferroelectric semiconductor memory is fabricated according to the stack cell principle. A ferroelectric capacitor module is formed on an...
Method for fabricating an integrated semiconductor circuit
Integrated semiconductor circuits have MOS transistors whose gate electrodes are provided with dopings in order to set the electrical potential of the channel...
Method for fabricating field-effect transistors in integrated semiconductor
circuits and integrated...
A method for fabricating a field-effect transistor situated within an integrated semiconductor circuit. At least two gate regions each extending between a source...
Device for unlocking an electronic component that is insertible into a
An apparatus for unlocking an electronic component to be inserted into a retaining device, in particular a transceiver, and held in the retaining device by a...
Multichannel optical transmitter
The transmission device comprises a transmission unit (1) having a plurality of useful lasers (3b to 3m), which are arranged in a row (2) and emit useful...
Method for determining the temperature of a semiconductor chip and
semiconductor chip with temperature...
In order to be able to determine precisely a temperature of a semiconductor chip, in particular a semiconductor memory, during active operation, a ...
Image acquisition apparatus
Sensor elements are arranged in a hexagonal grid. A processor element in the form of a primitive automaton is assigned to each of the sensor elements in the...
Self-aligned cross-point MRAM device with aluminum metallization layers
An MRAM device (160) and manufacturing process thereof having aluminum conductive lines (134) and (152), with self-aligning cross-points. Conductive lines (134)...
Contact for memory cells
A memory cell which provides a diffusion path for hydrogen to the transistor is disclosed. The diffusion path is provided by forming a contact in which the upper...
Frequency synthesizer and method of providing a mixing oscillator signal to
A frequency synthesizer for generating an oscillator signal with a desired frequency includes a first phase locked loop and a second phase locked loop, which is...
Method for forming a single wiring level for transistors with planar and
vertical gates on the same substrate
A memory cell comprises a region containing one or more vertical pass transistor, and a support region containing, e.g. one or more planar transistors. During...
Circuit configuration for controlling the word lines of a memory matrix
A circuit configuration for performing a selective changeover of word lines of a memory matrix between an activation potential and a deactivation potential uses...
Twisted bit-line compensation
A memory is provided having an array of rows and columns of memory cells. The memory includes plurality of sense amplifiers, each one having a true terminal and...
Circuit configuration for reading memory elements
A circuit configuration for measuring or calibrating current of components in memory elements, preferably, EPROM or EEPROM memory elements, includes a memory...
Circuit configuration for producing a quadrature-amplitude-modulated
A circuit configuration for a QAM transmitter contains a Cordic for converting the baseband signal to the radio frequency band. The complex output signal from...
Trench capacitor with capacitor electrodes
A trench capacitor for use in a semiconductor memory cell is formed in a substrate. The trench capacitor includes a trench having an upper region and a lower...
Substrate assembly having a depression suitable for an integrated circuit
configuration and method for its...
A depression extends from a main surface of the substrate to the inside of said substrate and has an upper area and an adjacent lower area. A cross-section of...
Removable inorganic anti-reflection coating process
In accordance with the present invention, a method for employing and removing inorganic anti-reflection coatings, includes the steps of providing a first...
Method for producing an edge termination suitable for high voltages in a
basic material wafer prefabricated...
An edge termination is produced that is capable of handling high voltages. The edge termination is produced in a base material wafer that is produced in...
An optical device includes a surface-mountable optical component with a base member having a recess filled with a transparent filler and a VCSEL element arranged...
Method for producing a holding configuration for at least one sheathed
optical fiber conductor
A method for producing a holding configuration for at least one sheathed optical fiber conductor, which includes forming a holding body with a through-channel...
Grating patterns and method for determination of azimuthal and radial
Methods and reticles for evaluating lenses are disclosed. In one instance, a reticle which permits light to pass therethrough is provided which includes a first...
An oscillator circuit is described and has an oscillator core with at least one inductance and, connected thereto, a first and second capacitance. A deattenuator...
Circuit for generating a reference voltage based on two partial currents
with opposite temperature dependence
A circuit for generating a temperature-stabilized reference voltage uses the current-mode technique, in which two partial currents are superimposed on each other...
Circuit configuration for discharging a capacitor which has been charged to
a high voltage to a low voltage...
The object is to discharge a first capacitor from a high voltage to a low voltage. To this end, the one electrode of the first capacitor is linked with the one...
Support matrix for integrated semiconductors, and method for producing it
Support matrices for semiconductors are often disposed with spacers on the semiconductor chip. The spacers are composed of silicone that flows into the region of...
Semiconductor structures and manufacturing methods
A method for forming substantially uniformly thick, thermally grown, silicon dioxide material on a silicon body independent of bon axis. A trench is formed in a...
Method for producing an electrode by means of a field effect controllable
semiconductor component and...
A field-effect-controllable semiconductor component and a method for fabricating an electrode of the component includes a semiconductor body having a first zone...
Process flow for thick isolation collar with reduced length
A trench capacitor memory cell structure is provided with includes a vertical collar region that suppresses current leakage of an adjacent vertical parasitic...
Memory cell configuration and production method
A memory cell configuration includes a magnetoresistive element with an annular cross-section in a layer plane, a first line and a second line. The first and...
Method of manufacturing circuit with buried strap including a liner
Semiconductor devices having trenches with buried straps therein preventing lateral out-diffusion of dopant are provided along with methods of fabricating such...
Method for the manufacture of micro-mechanical components
A method for the manufacture of micro-mechanical components from a stack of layers having at least a substrate, a sacrificial layer and a layer which is to be...
Resolution enhancement for alternating phase shift masks
An alternating phase shift mask (400) and method of manufacturing thereof including assist edges (450) and (452) surrounding a main phase edge (420). Assist...
Multichannel optical coupling configuration
A coupling system includes an optical plug-in connector, a coupling partner and a retaining element. The housing of the plug-in connector is provided with a...
Configuration for fuse initialization
The invention relates to a configuration for fuse initialization, in which the fuse initialization signals bFPUP, FPUN are carried on a total of two lines to the...
Dynamic memory refresh circuitry
A circuit for refreshing data stored in an array of dynamic memory cells is provided. The circuit includes an integrated circuit chip. The chip has the array of...
Zero static power programmable fuse cell for integrated circuits
A software programmable fuse cell which reduces or eliminates static power consumption is disclosed. The programmable fuse cell includes programmable and...
Integrated semiconductor configuration having a semiconductor memory with
user programmable bit width
An integrated semiconductor circuit is described and has a semiconductor memory configuration embedded in a semiconductor chip and an interface circuit. The...
Integrated semiconductor memory configuration
The integrated ferroelectric or DRAM semiconductor memory configuration has memory cells each with a selection transistor and a capacitor module that can be...
Process for fabricating an interconnect for contact holes
A process for fabricating an interconnect for contact holes includes forming contact holes in an insulation layer leading to a first interconnect layer, cleaning...
Field effect transistor and method of fabrication
An Insulated Gate Field Effect Transistor (IGFET), fabricated using Shallow Trench Isolation (STI), has an edge of a channel region of the IGFET which has a...
Pulse voltage breakdown (VBD) technique for inline gate oxide reliability
Disclosed is a method of testing a dielectric, comprising setting a reference current below a breakdown current of the dielectric, applying a stress voltage to...
Plant for producing semiconductor products
A plant for producing semiconductor products that includes at least one clean room having a floor and a plurality of production units that are configured in the...
Finishing pad design for multidirectional use
A polishing pad (for example, polishing pad 305) for use in polarization of a semiconductor wafer (for example, semiconductor wafer 420), the polishing pad 305...
Method to descramble the data mapping in memory circuits
An automatic method for the generation of a logical hardware test pattern in memory circuits is based on a given physical pattern. The method includes backwards...