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Patent # Description
US-6,731,131 Circuit for an electronic semiconductor module
It is an aim to reduce an area required on a chip for interconnects which cross a spine center. The circuit has n inputs, which are disposed on one side of the...
US-6,730,989 Semiconductor package and method
A semiconductor packaging arrangement, or module, includes a printed circuit board having an electrical interconnect thereon and a semiconductor package mounted...
US-6,730,982 FBEOL process for Cu metallizations free from Al-wirebond pads
A process of making an interconnection structure of Cu FBEOL semiconductor devices that does not rely upon Al-wirebond pads which require additional patterning...
US-6,730,930 Memory element and method for fabricating a memory element
A memory element with organic material comprises two metallized layers, arranged one on top of the other, with first lines and second lines which are arranged to...
US-6,730,607 Method for fabricating a barrier layer
A method of fabricating a barrier layer includes oxidizing a silicon-containing substrate to form a substrate oxide layer on the surface of the substrate,...
US-6,730,562 Method of patterning ferroelectric layers
A method for structuring ferroelectric layers on semiconductor substrates retains or regenerates the adherence and breakdown voltage resistance of the...
US-6,730,463 Method for determining and removing phase conflicts on alternating phase masks
A photoresist layer on a substrate wafer is exposed in first sections with a first exposure radiation and in second sections with a second exposure radiation...
US-6,729,775 Electro-optical module with a housing
The electro-optical module has a housing in which a supporting plate provided with at least one optical element, electric circuit elements, and electric...
US-6,729,774 Electro-optical module
An electro-optical module includes a connector and a module body having an electro-optical converter. The connector accommodates one end of a fiber optic...
US-6,728,902 Integrated circuit having a self-test device for carrying out a self-test of the integrated circuit
An integrated circuit includes a self-test device which is provided for executing a self-test of the integrated circuit and which has a control output. A program...
US-6,728,321 Receiving device for angle-modulated signals
A receiving device for angle-modulated signals performs the channel selection in a digital manner rather than an analog manner. A receive signal is preferably...
US-6,728,147 Method for on-chip testing of memory cells of an integrated memory circuit
A method for on-chip testing of memory cells of a cell array of an integrated memory circuit includes writing different data patterns to memory cells and reading...
US-6,728,145 Semiconductor memory with a signal path
A semiconductor memory has a data signal path and a control device in order to supply functional elements of the data signal path with control signals....
US-6,728,144 Method and circuit configuration for generating a data strobe signal for very fast semiconductor memory systems
A method is provided for generating a data strobe signal in order to transmit the latter through a signal line with tristate behavior from/to a semiconductor...
US-6,728,143 Integrated memory
An integrated memory having a memory cell array has a control circuit for controlling a memory access for reading out or writing a data signal of one of the...
US-6,727,989 Enhanced overlay measurement marks for overlay alignment and exposure tool condition control
In an overlay measurement mark comprising an inner box and an outer box located at a predetermined area on a mask through which patterns are formed on a...
US-6,727,733 Output driver circuit and method for adjusting a driver device
An output driver circuit includes a delay device disposed between a signal input and a driver device. The input signal to the driver device can be delayed by a...
US-6,727,721 Method for switching from a first operating condition of an integrated circuit to a second operating condition...
The invention provides a method for switching from a first operating condition of an integrated circuit to a second operating condition of the integrated circuit...
US-6,727,693 Circuit configuration and sensor device
The circuit configuration converts an input signal into a binary output signal. The circuit has at least one comparator, at least one demodulation unit, and at...
US-6,727,587 Connection device and method for producing the same
A connection device for a circuitry device connects a circuitry unit with a contact device to thermo-mechanically uncouple the circuitry unit and the contact...
US-6,727,586 Semiconductor component
A semiconductor component that is suitable for wafer level packaging contains a plurality of contact elements that are elevated relative to a main body of the...
US-6,727,576 Transfer wafer level packaging
A semiconductor structure and a method for forming the semiconductor structure, including a semiconductor chip and a conductive layer disposed over a portion of...
US-6,727,162 Semiconductor chip assembly system with a suction nipple for removing a semiconductor chip
A semiconductor chip assembly system has a suction nipple for picking up a semiconductor chip from a carrier film. For this purpose, the suction nipple has a...
US-6,725,725 Micromechanical differential pressure sensor device
A micromechanical differential pressure sensor device for measuring a pressure difference between two mutually separated spaces or media, in which two absolute...
US-6,725,407 Method and configuration for protecting data during a self-test of a microcontroller
The invention relates to a method for protecting data during a self-test of a microcontrollers, in which all of the circuit elements within the microcontroller...
US-6,725,403 Efficient redundancy calculation system and method for various types of memory devices
A method for calculating and analyzing redundancies for semiconductor memories, in accordance with the present invention, includes providing a memory device...
US-6,724,833 Method and apparatus for communicating information
A method and apparatus for communicating information between a remote location and a user. Information from the remote location or the user is received by the...
US-6,724,685 Configuration for data transmission in a semiconductor memory system, and relevant data transmission method
In a configuration for data transmission in a semiconductor memory system, in which data are transmitted between at least one semiconductor memory module and a...
US-6,724,676 Soft error improvement for latches
Embodiments of the present invention generally provide a soft error-resistant latch circuit. The latch circuit generally includes first and second inverters,...
US-6,724,672 Integrated memory having a precharge circuit for precharging a bit line
An integrated memory having a memory cell array: including word lines for selecting memory cells, bit lines for reading out or writing data signals of the memory...
US-6,724,667 Data memory with redundant memory cells used for buffering a supply voltage
A data memory for storing data, having a memory cell array (2), which comprises a large number of memory cells (3), each of which can be addressed by means of a...
US-6,724,479 Method for overlay metrology of low contrast features
A wavefront sensing tool, such as a Shack-Hartmann detector, detects alignment features in a semiconductor wafer that might otherwise be undetectable using...
US-6,724,475 Apparatus for rapidly measuring angle-dependent diffraction effects on finely patterned surfaces
An apparatus for measuring angle-dependent diffraction effects includes a coherent radiation source, a device for deflecting the coherent radiation in different...
US-6,724,240 Method and integrated circuit for boosting a voltage
A method and an integrated circuit for boosting a voltage are disclosed. A two-stage charge pump is used and has switches and capacitors. Known charges pumps can...
US-6,724,181 Method of calibrating a test system for semiconductor components, and test substrate
In order to calibrate a test system for semiconductor components, use is made of a test substrate which has connecting contact points that are associated with...
US-6,724,076 Package for a semiconductor chip
The invention relates to a packaging for a semiconductor chip. A frame that directly surrounds the slot is provide on the carrier board on the side of the...
US-6,724,058 Method for producing a filled recess in a material layer, and an integrated circuit configuration produced by...
A recess is produced in a material layer by creating at least a first and a second structure in various steps. The layers define each other laterally and extend...
US-6,724,055 Semiconductor structure having an interconnect and method of producing the semiconductor structure
The semiconductor structure has an interconnect that is isolated by a cavity from an underlying insulating layer on a support. The fabrication method provides...
US-6,724,054 Self-aligned contact formation using double SiN spacers
A method for fabricating a self-aligned contact in an integrated circuit includes defining first spacer layers over the sidewalls of a pair of wordline stacks....
US-6,724,038 Memory element for a semiconductor memory device
A memory element includes a number of material areas isolated from one another to form at least one area with changed electrical and/or magnetic characteristics...
US-6,724,030 System and method for back-side contact for trench semiconductor device characterization
A method for forming a back-side contact for a vertical trench device includes grinding a back-side of a semiconductor substrate, milling a trench in the...
US-6,724,026 Memory architecture with memory cell groups
An improved cell design for series memory architecture is disclosed. The improved cell design facilitates the formation of capacitors using a single etch process...
US-6,723,657 Method for fabricating a gate stack in very large scale integrated semiconductor memories
A method for the fabrication of a gate stack, in particular in very large scale integrated semiconductor memories, uses a combination of a damascene process and...
US-6,722,793 Optical bidirectional transceiver module having a pin element with integrated WDM filter
An optical bidirectional transceiver module includes a module body having an opening, an inner hollow space and a fiber pin pushed through the opening into the...
US-6,721,904 System for testing fast integrated digital circuits, in particular semiconductor memory modules
The invention relates to a system for testing fast integrated digital circuits, in particular semiconductor modules, such as for example SDRAMs. In order to...
US-6,721,702 Speech recognition method and device
In a method for interactive voice recognition, a word spoken by a user is analyzed. If no definite assignment to a word of a predetermined vocabulary is...
US-6,721,581 Reprogrammable digital wireless communication device and method of operating same
A digital wireless communication device comprises a software-programmable processor, a heterogeneous reconfigurable multiprocessing logic circuit, and a bus...
US-6,721,377 Method and circuit configuration for resynchronizing a clock signal
A method for resynchronizing a clock signal, includes the steps of defining a presettable clock signal, dividing a first clock signal having a first frequency...
US-6,721,230 Integrated memory with memory cells in a plurality of memory cell blocks, and method of operating such a memory
An integrated memory including memory cells in a plurality of memory cell blocks, each memory cell block being assigned at least one dedicated data line and a...
US-6,721,219 Method and circuit arrangement for reading out and for storing binary memory cell signals
The invention provides a method in which a binary memory cell signal from a; least one memory cell is applied to at least one bit line pair (201t, 201b), the...
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