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Method and configuration for protecting data during a self-test of a
The invention relates to a method for protecting data during a self-test of a microcontrollers, in which all of the circuit elements within the microcontroller...
Efficient redundancy calculation system and method for various types of
A method for calculating and analyzing redundancies for semiconductor memories, in accordance with the present invention, includes providing a memory device...
Method and apparatus for communicating information
A method and apparatus for communicating information between a remote location and a user. Information from the remote location or the user is received by the...
Configuration for data transmission in a semiconductor memory system, and
relevant data transmission method
In a configuration for data transmission in a semiconductor memory system, in which data are transmitted between at least one semiconductor memory module and a...
Soft error improvement for latches
Embodiments of the present invention generally provide a soft error-resistant latch circuit. The latch circuit generally includes first and second inverters,...
Integrated memory having a precharge circuit for precharging a bit line
An integrated memory having a memory cell array: including word lines for selecting memory cells, bit lines for reading out or writing data signals of the memory...
Data memory with redundant memory cells used for buffering a supply voltage
A data memory for storing data, having a memory cell array (2), which comprises a large number of memory cells (3), each of which can be addressed by means of a...
Method for overlay metrology of low contrast features
A wavefront sensing tool, such as a Shack-Hartmann detector, detects alignment features in a semiconductor wafer that might otherwise be undetectable using...
Apparatus for rapidly measuring angle-dependent diffraction effects on
finely patterned surfaces
An apparatus for measuring angle-dependent diffraction effects includes a coherent radiation source, a device for deflecting the coherent radiation in different...
Method and integrated circuit for boosting a voltage
A method and an integrated circuit for boosting a voltage are disclosed. A two-stage charge pump is used and has switches and capacitors. Known charges pumps can...
Method of calibrating a test system for semiconductor components, and test
In order to calibrate a test system for semiconductor components, use is made of a test substrate which has connecting contact points that are associated with...
Package for a semiconductor chip
The invention relates to a packaging for a semiconductor chip. A frame that directly surrounds the slot is provide on the carrier board on the side of the...
Method for producing a filled recess in a material layer, and an integrated
circuit configuration produced by...
A recess is produced in a material layer by creating at least a first and a second structure in various steps. The layers define each other laterally and extend...
Semiconductor structure having an interconnect and method of producing the
The semiconductor structure has an interconnect that is isolated by a cavity from an underlying insulating layer on a support. The fabrication method provides...
Self-aligned contact formation using double SiN spacers
A method for fabricating a self-aligned contact in an integrated circuit includes defining first spacer layers over the sidewalls of a pair of wordline stacks....
Memory element for a semiconductor memory device
A memory element includes a number of material areas isolated from one another to form at least one area with changed electrical and/or magnetic characteristics...
System and method for back-side contact for trench semiconductor device
A method for forming a back-side contact for a vertical trench device includes grinding a back-side of a semiconductor substrate, milling a trench in the...
Memory architecture with memory cell groups
An improved cell design for series memory architecture is disclosed. The improved cell design facilitates the formation of capacitors using a single etch process...
Method for fabricating a gate stack in very large scale integrated
A method for the fabrication of a gate stack, in particular in very large scale integrated semiconductor memories, uses a combination of a damascene process and...
Optical bidirectional transceiver module having a pin element with
integrated WDM filter
An optical bidirectional transceiver module includes a module body having an opening, an inner hollow space and a fiber pin pushed through the opening into the...
System for testing fast integrated digital circuits, in particular
semiconductor memory modules
The invention relates to a system for testing fast integrated digital circuits, in particular semiconductor modules, such as for example SDRAMs. In order to...
Speech recognition method and device
In a method for interactive voice recognition, a word spoken by a user is analyzed. If no definite assignment to a word of a predetermined vocabulary is...
Reprogrammable digital wireless communication device and method of
A digital wireless communication device comprises a software-programmable processor, a heterogeneous reconfigurable multiprocessing logic circuit, and a bus...
Method and circuit configuration for resynchronizing a clock signal
A method for resynchronizing a clock signal, includes the steps of defining a presettable clock signal, dividing a first clock signal having a first frequency...
Integrated memory with memory cells in a plurality of memory cell blocks,
and method of operating such a memory
An integrated memory including memory cells in a plurality of memory cell blocks, each memory cell block being assigned at least one dedicated data line and a...
Method and circuit arrangement for reading out and for storing binary
memory cell signals
The invention provides a method in which a binary memory cell signal from a; least one memory cell is applied to at least one bit line pair (201t, 201b), the...
Integrated dynamic memory and method for operating it
An integrated dynamic memory includes a memory cell array having memory cells each assigned to one of a plurality of groups. The plurality of groups are divided...
Drive circuit and control method
A circuit has a control signal input, a control signal output, a delay element for generating a delay duration, and a control logic circuit. The latter controls...
Cooling hood for circuit board
A cooling hood for a circuit board is provided. The circuit board includes at least one semiconductor device. The cooling hood includes a duct mounted onto the...
Analog/digital or digital/analog converter having internal reference
An A/D converter or D/A converter has an internal voltage selection device. Several reference voltages are available for selection by the selection device, which...
System and method for converting from single-ended to differential signals
A single-ended signal is converted to differential signals with a first device that converts an input current of a single-ended input signal to a voltage, a...
Integratable circuit configuration for potential-free signal transmission
A circuit configuration for potential-free signal transmission has a transformer with a primary winding and a secondary winding. A drive circuit is connected...
Integrated circuit with test mode, and test configuration for testing an
During a function test on an integrated circuit, the integrated circuit is connected to an automatic test machine. A connection pad provided exclusively just for...
Method for manufacturing an integrated memory circuit and an integrated
In a method for manufacturing an integrated memory circuit, a semiconductor substrate having a front side and a rear side is provided first. The semiconductor...
Trench MOS transistor
A trench MOS-transistor includes a body region strengthened by an implantation area that faces the drain region to increase the avalanche resistance.
Series memory architecture
An IC with a memory array having a series architecture is disclosed. The memory cells of the series group are arranged in pairs in which the capacitors of a...
Method of eliminating back-end rerouting in ball grid array packaging
Disclosed is a method of ball grid array packaging, comprising the steps of providing a semiconductor die having a metal conductors thereon, covering said metal...
Carrier element for a semiconductor chip for incorporation into smart cards
A carrier element for a semiconductor chip and in particular for incorporation into smart cards. The carrier element has an encapsulation composition protecting...
Method for high speed testing with low speed semiconductor test equipment
A method for testing semiconductor memories, in accordance with the invention includes providing a tester having a plurality of data channels. The tester...
Switchable POTS splitter
Switchable POTS-splitter for separating a voice signal from a data signal having a high pass filter for the data signal and a low pass filter for the voice...
VCSEL with monolithically integrated photodetector
A VCSEL has an active layer, a photodetector in one of the DBR gratings and with a radiation-absorbing layer that is arranged in an antinode of a laser mode. The...
Control circuit for an S-DRAM
Control circuit for a data path of an S-DRAM which is clocked by a high-frequency clock signal, having a programmable mode register for storing a latency value;...
Method for assessing the quality of a memory unit
Assessing the burn-in of faulty memory units on a wafer includes detecting only those defective memory cells that lie along control lines in the case of which...
Polyvalent, magnetoresistive write/read memory and method for writing and
reading a memory of this type
A multivalue magnetoresistive read/write memory and method of writing to and reading from such a memory. The invention has, inter alia, one or more storage...
Method for data communication between a plurality of semiconductor modules
and a controller module and...
A communications method is described in which two memory modules receive data and commands from a controller module via a common data and command bus. The memory...
Temperature-protected semiconductor circuit configuration
A temperature-protected semiconductor circuit configuration that has an integrated switching unit. The switching unit is formed of a semiconductor switch, a...
Coil and coil system for integration into a micro-electronic circuit and
The coil and coil system is provided for integration in a microelecronic circuit. The coil is placed inside an oxide layer of a chip, and the oxide layer is...
Delay adjustment circuit
A delay adjustment circuit for decreasing a phase shift between a system clock and a feedback clock from a semiconductor's internal clock. The circuit includes a...
The invention relates to a semiconductor module having a plurality of signal paths for carrying external signals that each contain a setup and hold circuit on...
Reconfigurable gate array
The invention relates to an FPGA (field programmable gate array) with a plurality of functional blocks. An interface enables data and address communication...