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Patent # Description
US-6,747,496 DLL-(delay-locked-loop) circuit
The present invention provides a Delay Locked Loop circuit having: a delay device for generating at least one delayed clock signal from an input clock signal; a...
US-6,747,495 Low jitter analog-digital locker loop with lock detection circuit
A digital phase detector compares the output clock signal of the oscillator with the reference clock signal, an analog phase detector, and a lock detection...
US-6,747,486 Comparator
A comparator includes an adjustable offset and particularly dimensioned and configured components. The particular configuration and dimensioning of the...
US-6,747,440 Voltage regulator circuit for smart card ICs
The circuit contains a series regulator with an FET. A capacitor and a further FET, which is provided as a transfer gate and is driven by the POR signal, are...
US-6,747,257 Monolithic optical pickup and an assembly including the pickup with laser source(s) and optical detector(s)
A monolithic optical pickup has all passive optical elements aligned during fabrication, thereby requiring no alignment during the assembly of a system utilizing...
US-6,747,230 Method and device for sorting wafers
A method and a device for sorting wafers from an initial state into an end state. The wafers are at least partly identifiable as elements of a finite sequence...
US-6,746,880 Method for making electrical contact with a rear side of a semiconductor substrate during its processing
A method for electrically contacting a rear side of a semiconductor substrate when processing the semiconductor substrate includes the step of placing the...
US-6,746,877 Encapsulation of ferroelectric capacitors
A ferroelectric capacitor encapsulation method for preventing hydrogen damage to electrodes and ferroelectric material of the capacitor. In general terms, the...
US-6,746,828 Process for structuring a photoresist layer
A method for structuring a photoresist layer includes the steps of providing a substrate on which a photoresist layer has been applied at least in some areas....
US-6,746,827 Process for structuring a photoresist layer
A method for structuring a photoresist layer includes the steps of providing a substrate on which a photoresist layer has been applied at least in some areas....
US-6,746,821 Method of structuring a photoresist layer
A method structures a chemical amplification photoresist layer, in which a photoresist layer of the chemically amplified type is brought into contact, before or...
US-6,745,637 Self-supporting adaptable metrology device
A metrology device is described which is couplable to a load port of a semiconductor product handling and/or processing tool. The tool encloses a ...
US-6,745,380 Method for optimizing and method for producing a layout for a mask, preferably for use in semiconductor...
A method of producing a layout for a mask for use in semiconductor production includes a two-stage, iterative optimization of the position of scatter bars in...
US-6,745,342 Universal serial bus transceiver shortcut protection
A Universal Serial Bus interface including a USB device controller coupled by way of a shortcut protection circuit to a USB transceiver. The shortcut protection...
US-6,744,686 Semiconductor memory module with low current consumption
A semiconductor memory module with a changeover device by which an internal voltage supply circuit can be switched on or off in a simple manner. The changeover...
US-6,744,682 Semiconductor memory with jointly usable fuses
A semiconductor memory apparatus includes a first and second memory bank. Each of these memory banks has a plurality of row and column lines and at least one...
US-6,744,665 Memory cell configuration
A memory cell configuration has a nonvolatile memory that can be latched by a latching element. The nonvolatile memory is latched by activating a copy of the...
US-6,744,662 Magnetoresistive memory (MRAM)
The form of leads of a cell array of a multiplicity of magnetic memory cells is optimized by deviating from a square cross section of the leads in such a way...
US-6,744,304 Circuit for generating a defined temperature dependent voltage
An electronic circuit for generating an output voltage has a defined temperature dependence, a bandgap circuit for generating a defined temperature-constant...
US-6,744,279 Data register with integrated signal level conversion
Data register for storage of a data bit with integrated signal level conversion. The data register has an input for application of a data bit input signal which...
US-6,744,271 Internal generation of reference voltage
An integrated circuit (IC) configured for being connected to an external reference voltage uses an IC reference voltage to determine the logic levels of signals...
US-6,744,241 Method for driving a switch in a switch-mode converter, and a drive circuit for driving a switch
The present invention relates to a method and to a drive circuit for driving a switch in a switch-mode converter that has input terminals for supplying an input...
US-6,744,127 Semiconductor chip, memory module and method for testing the semiconductor chip
A lowermost layer of control chips carries on it layers of memory chips. The memory chips are contacted via looped-through contacts that reach from one side of...
US-6,743,642 Bilayer CMP process to improve surface roughness of magnetic stack in MRAM technology
A method for manufacturing a magnetoresistive random access memory (MRAM) cell is disclosed, which alleviates the problem of Neel coupling caused by roughness in...
US-6,743,572 Method for structuring a photoresist layer
A method for structuring a photoresist layer including preparing a substrate having a photoresist layer which is applied at least in subregions. The photoresist...
US-6,742,153 Test configuration and method for testing a digital electronic filter
A test configuration and a method for testing a digital electronic filter, include feeding back an output of the filter to an input in such a manner that a...
US-6,741,865 Digital multi-subscriber radio telecommunication system working with frequency jumping
In the digital multi-subscriber radio telecommunication system which operates using frequency hopping technology and is intended for use in the 2.4 GHz ISM...
US-6,741,657 Circuit arrangement for transmitting pulses via a transmission path
In a circuit arrangement for transmitting impulses via a transmission path which allows short pulses to be transmitted via a longer transmission path, for...
US-6,741,513 Data memory with a plurality of memory banks
The data memory has a plurality of banks, each with a multiplicity of memory cells that form a matrix of rows and columns with respectively assigned matrix row...
US-6,741,491 Integrated dynamic memory, and method for operating the integrated dynamic memory
An integrated dynamic memory has word lines and bit lines as well as at least one global bit line, which is disposed in the memory cell array in the same sense...
US-6,740,917 Integrated semiconductor memory fabrication method
In integrated semiconductor memories, the area taken up by a memory cell on a semiconductor substrate is always kept as small as possible to be able to...
US-6,740,910 Field-effect transistor, circuit configuration and method of fabricating a field-effect transistor
The gate region of a field effect transistor comprises at least one through hole wherein a nanoelement is provided which is electrically coupled to the source...
US-6,740,595 Etch process for recessing polysilicon in trench structures
A method for eching a recess in a polysilicon region of a semiconductor device by applying a solution of NH.sub.4 OH in water to the polysilicon.
US-6,740,594 Method for removing carbon-containing polysilane from a semiconductor without stripping
A method for removing a carbon-containing polysilane from a semiconductor substrate without stripping the polysilane during manufacture of a semiconductor...
US-6,740,568 Method to enhance epitaxial regrowth in amorphous silicon contacts
In a method of forming a contact, a liner reactive ion etch is affected on a substrate to remove silicon nitride and silicon oxide. An oxygen plasma ex-situ...
US-6,740,558 SiGe vertical gate contact for gate conductor post etch treatment
There is provided a method for forming a vertical gate on a vertical array semiconductor device having support devices. The method includes the step of forming a...
US-6,740,555 Semiconductor structures and manufacturing methods
A method for forming substantially uniformly thick, thermally grown, silicon dioxide material on a silicon body independent of axis. A trench is formed in a...
US-6,740,539 Carbon-graded layer for improved adhesion of low-k dielectrics to silicon substrates
A structure and method for an insulator layer having carbon-graded layers above a substrate is disclosed, wherein the concentration of carbon increases in each...
US-6,740,475 Method for structuring a photoresist layer
A photoresist layer structuring process includes a substrate with a photoresist layer applied thereto in parts. The photoresist layer includes a film-forming...
US-6,739,013 Wafer cleaning apparatus
A wafer cleaning apparatus includes a wafer supporting device for supporting a wafer to be cleaned, and sponges for cleaning the wafer. The sponges are arranged...
US-6,738,602 Integrable circuit for the frequency conditioning of radio transceiver, in particular a cordless telephone,...
A circuit is provided for time division duplexing with a frequency hopping technique and has a total of just two frequency synthesizers for the transmission and...
US-6,738,449 Programmable fractional frequency divider
The invention features a fractional frequency divider including a phase selection device where mutually phase-shifted signals are alternately switched through to...
US-6,738,433 Quadricorrelator for a demodulator for frequency-modulated signals
The quadricorrelator for a demodulator for frequency-modulated signals has a first input receiving an in-phase component of the signal and a second input...
US-6,738,309 Semiconductor memory and method for operating the semiconductor memory
A semiconductor memory is described which has a clock input, a signal input, a data output, a measuring device, a control circuit, and a latency. The latency...
US-6,738,304 Dynamic memory device and method for controlling such a device
According to one embodiment, a dynamic memory is provided. The dynamic memory can include a memory matrix having a plurality of memory cells arranged in rows and...
US-6,738,002 SD-ADC with digital dither signal processing
A sigma-delta analog-to-digital converter includes an integrator and a dither signal generator for generating a digital dither signal, and a plurality of...
US-6,737,919 Method and apparatus for calibrating a Gm cell utilizing a replica Gm cell
A method and apparatus for calibrating a Gm cell using a Gm replica cell. A digital to analog converter receives a Gm setting code and generates a reference...
US-6,737,911 Filter
The adaptive filter can be realized with a very low circuitry outlay, as a result of which the adaptive filter for the first time becomes practical for many...
US-6,737,901 Integrable, controllable delay device, delay device in a control loop, and method for delaying a clock signal...
A delay device has multiplexers connected in series in a differential configuration. First connections of the multiplexers are connected to the output of an...
US-6,737,895 Control signal generating device for driving a plurality of circuit units
A method for driving a plurality of circuit units to be controlled includes applying a control signal to a control signal connection unit and an activation...
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