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Patent # Description
US-6,785,284 Interleavement for transport of frames and cells
A DMA system includes a plurality of transmit-receive pairs (102, 104) for communicating on a bus. A DMA controller (108) supervises bus handling. The DMA...
US-6,785,170 Data memory with short memory access time
A data memory including a main data memory having a plurality of data memory units, a redundancy data memory that includes a plurality of redundancy data memory...
US-6,785,119 Ferroelectric capacitor and process for its manufacture
Forming a capacitor, by (a) forming a matrix of ferroelectric capacitor elements on a substrate, (b) forming a CAP layer over the ferroelectric capacitor...
US-6,784,929 Universal two dimensional (frame and line) timing generator
A programmable two-dimensional timing generator according to the invention employs a clock generator (102) and a user-defined two-stage waveform generator (106,...
US-6,784,691 Integrated circuit having a connection pad for stipulating one of a plurality of organization forms, and method...
An integrated circuit can be operated in at least three different organization forms that can be set externally. A connection pad receives an external signal for...
US-6,784,683 Circuit configuration for selectively transmitting information items from a measuring device to chips on a...
The circuit configuration allows selective transmission of information items to a chip of a wafer during chip fabrication, and an apparatus having a needle card....
US-6,784,678 Test apparatus for semiconductor circuit and method of testing semiconductor circuits
A wafer test apparatus for bringing the contact areas of the integrated circuits to be tested into electrical connection with the test contacts as uniformly as...
US-6,784,553 Semiconductor device with self-aligned contact and method for manufacturing the device
A semiconductor device and a method for manufacturing the semiconductor device with a self-aligned contact, is described. A first conductor and a second...
US-6,784,551 Electronic device having a trimming possibility and at least one semiconductor chip and method for producing...
An electronic device has a semiconductor chip and a passive component, whose electrical values can be varied. The semiconductor chip is electrically conductively...
US-6,784,445 Apparatus for monitoring intentional or unavoidable layer depositions and method
The apparatus allows monitoring layer depositions in a process chamber. The apparatus has a light source, a sensor element, and at least one light detector. The...
US-6,784,105 Simultaneous native oxide removal and metal neutral deposition method
A method of fabricating a semiconductor device having a dielectric structure on which an interconnect structure is optionally patterned using lithographic and...
US-6,784,091 Maskless array protection process flow for forming interconnect vias in magnetic random access memory devices
A method for forming interconnect structures in a magnetic random access memory (MRAM) device includes defining an array of magnetic tunnel junction (MTJ) stacks...
US-6,784,070 Intra-cell mask alignment for improved overlay
A method for intra-cell alignment of a substrate and mask comprises providing a substrate comprising an exposed photosensitive material, providing a phase-shift...
US-6,783,999 Subtractive stud formation for MRAM manufacturing
A method of fabricating a magnetic memory cell and an MRAM structure. A thin conductive hard is used to pattern a magnetic stack material layer. Conductive studs...
US-6,783,596 Wafer handling device
The present invention provides a wafer handling device having a base plate (G; G'), which has a first and a second supporting surface for a respective wafer (W1,...
US-6,783,372 Apparatus for connecting semiconductor modules
The present invention provides an apparatus for connecting semiconductor modules, in particular memory banks, having: at least two devices (A, B) for receiving a...
US-6,783,284 Optical module for wavelength reference measurement in WDM systems
An optical for wavelength reference measurement has in essence an optical conductor with integrated fiber Bragg grating that has a transmission maximum at a...
US-6,782,491 Device and method for supplying power to computer peripheral equipment using the bus system of the computer
Apparatus and method for the power supply of auxiliary implements of computers via the bus system of the computer, wherein an energy store is provided within the...
US-6,782,465 Linked list DMA descriptor architecture
A linked list DMA descriptor includes an indication of a number of data pointers contained in a subsequent DMA descriptor. The number of data pointers contained...
US-6,782,331 Graphical user interface for testing integrated circuits
A system that includes a graphical user interface (GUI) connected to an input/output device of a computer system and one or more test instruments producing a set...
US-6,782,067 Asynchronous data reception circuit of a serial data stream
Data reception circuit for receiving a serial input data stream, where the data reception circuit has a data stream separation circuit (4) for separating the...
US-6,782,060 Method and apparatus for generating reliability information for channel decoding in a radio receiver
An equalizer of a radio receiver for generating reliability information (q) that specifies probabilities of a received data symbol (z) being based on a...
US-6,781,897 Defects detection
A method for defect detection, comprising providing a memory cell array comprising memory cells connected to word lines and local bit lines, and global bit lines...
US-6,781,896 MRAM semiconductor memory configuration with redundant cell arrays
The MRAM semiconductor memory configuration has MRAM main cell arrays in the form of a crosspoint array or a transistor array together with redundant MRAM cell...
US-6,781,889 Method for operating a semiconductor memory and semiconductor memory
An additional test mode is introduced in a semiconductor memory. A multiplicity of word lines are simultaneously activated by a word line decoder in the test...
US-6,781,727 Configuration for operating an optical transmission or reception module at high data rates of up to 10 Gbit/s
The invention relates to an arrangement for operating an optical transmission or reception module at high data rates of up to 10 Gbit/s, having a TO package with...
US-6,781,449 Electronic output stage
An electronic output module, especially an electronic output module for CMOS-LVDS levels (LVDS-low voltage differential signalling), is suitable for analogue and...
US-6,781,438 Method and device for generating a reference voltage
A method and a device generate a reference voltage for discriminating between the logic states of a data signal received at a receiving end. A transmitting...
US-6,781,437 Zero static power programmable fuse cell for integrated circuits
A software programmable fuse cell which reduces or eliminates static power consumption is disclosed. The programmable fuse cell can be operated in programmable...
US-6,781,436 Programming transistor in breakdown mode with current compliance
A transistor (such as a MOSFET) is operated in its breakdown region, as opposed to its saturation region, to program an electric fuse. With the programming...
US-6,781,398 Circuit for testing an integrated circuit
A test circuit for testing an integrated circuit, includes a test signal input for receiving a test signal from the integrated circuit and a reference signal...
US-6,781,233 Semiconductor device and converter device with an integrated capacitor
In order to keep the mounting outlay for shielding measures as low as possible, a semiconductor device having a semiconductor component in a housing element is...
US-6,781,220 Printed circuit board for semiconductor memory device
In a semiconductor memory device, a printed circuit board connects a memory chip to an external circuit. The printed circuit board includes a multiplicity of...
US-6,781,209 Optoelectronic component with thermally conductive auxiliary carrier
The invention relates to an optoelectronic component with a light emitting or light receiving element (1) and a system carrier (9) supporting the element (1)....
US-6,781,180 Trench capacitor and method for fabricating the same
A trench capacitor for use in a semiconductor memory cell is formed in a substrate and includes a trench having an upper region and a lower region. An insulation...
US-6,781,057 Electrical arrangement and method for producing an electrical arrangement
The invention relates to an electrical arrangement having a mount device with at least one conductor track, having an electrical component that is mounted on the...
US-6,780,775 Design of lithography alignment and overlay measurement marks on CMP finished damascene surface
A method for producing a semiconductor device having an alignment mark, the method comprising forming a first dielectric layer within which a trench having...
US-6,780,730 Reduction of negative bias temperature instability in narrow width PMOS using F2 implantation
In a process of fabricating a narrow channel width PMOSFET device, the improvement of affecting reduction of negative bias temperature instability by use of...
US-6,780,552 Method for controlling the quality of a lithographic structuring step
After exposing a semiconductor wafer, quality parameters, for example, the critical dimension, the overlay accuracy, and alignment parameters, etc. are measured...
US-6,780,337 Method for trench etching
The invention relates to a method for trench etching, in particular a method for anisotropic deep trench (DT) etching in an Si substrate by plasma dry etching,...
US-6,779,136 Method for testing the refresh device of an information memory
A method for testing the refresh device of an information memory contains the following: a refresh selector for selecting memory cells to be refreshed; a sensor...
US-6,778,784 Optical transmission device
The transmission device comprises at least one laser transmitter (1) which emits light (2) as a function of binary data signals (24) which are to be transmitted,...
US-6,778,407 Portable data carrier
A portable data carrier includes a card-shaped body having a recess for receiving a chip module. The chip module includes at least one semiconductor chip on a...
US-6,778,110 Bubble handling A/D converter calibration
An A/D converter includes a calibration apparatus handling occurrences of thermometer code bubbles in an A/D sub-converter in at least one A/D converter stage....
US-6,777,990 Delay lock loop having an edge detector and fixed delay
A delay lock loop circuit includes a forward delay circuit receiving a reference clock signal and issuing a first delayed clock signal. The forward delay circuit...
US-6,777,974 Arrangement and method for adjustment of the slope times for one or more drivers and a driver circuit
The invention relates to an arrangement (10) and a method for adjusting the slope times of one or more drivers (90) in such a way that the adjustment is...
US-6,777,960 Method of inferring the existence of light by means of a measurement of the electrical characteristics of a...
A method of inferring the existence of light by means of a measurement of the electrical characteristics of a nanotube bound to a dye first of all involves...
US-6,777,924 Method and magazine device for testing semiconductor devices
A method and device allow testing functionally identical semiconductor devices on a programmable testing device. The semiconductor devices are placed in magazine...
US-6,777,791 Multiple ground signal path LDMOS power package
A laterally diffused metal oxide semiconductor (LDMOS) power package includes a conductive mounting flange mounted on a heat sink and electrically connected to a...
US-6,777,731 Magnetoresistive memory cell with polarity-dependent resistance
A magnetoresistive tunnel element includes first and second electrodes and a tunnel barrier disposed between the two electrodes, the tunnel barrier having at...
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