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Silicon nitride island formation for increased capacitance
A semiconductor device is fabricated using a micro-masking structure. The micro-masking structure is formed along the sidewalls of a trench in a semiconductor...
Negative resist process with simultaneous development and silylation
The invention relates to a process for producing amplified negative resist structures in which, following exposure and contrasting of the resist in a developing...
Access authorization device for controlling access requested by an OCDS
A program-controlled unit with an on-chip debug support (OCDS) module and a method for debugging a program-controlled unit fitted with the OCDS module by using...
Same single board computer system operable as a system master and a bus
A same single board computer system that is operable as a system master and a bus target and methods of operating the same are described. In one system, a...
Delivering data optically to an integrated circuit
A system includes a multi-sided module having a cavity housing a substrate and n photoreceivers located on a side of the substrate and adapted to receive a beam...
Transceiver with bidirectional internal interface lines
A transceiver has bidirectional internal interface lines which can be connected to a baseband circuit. The transceiver is switchable by the baseband circuit...
Circuit configuration for driving a programmable link
A circuit configuration for driving a programmable link, for example a fuse, is specified, having a drive circuit for driving the fuse in a manner dependent on a...
Integrated dynamic memory with control circuit for controlling a refresh
mode of memory cells, and method for...
An integrated dynamic memory contains a control circuit for controlling a refresh mode in which the memory cells undergo refreshing of their contents. A...
Read/write amplifier for a DRAM memory cell, and DRAM memory
A description is given of a DRAM memory (10) having a number of DRAM memory cells (15) which each form one or more memory cell arrays (11). Each memory cell (15)...
Converting volatile memory to non-volatile memory
The invention relates to a method for converting volatile memory cells to non-volatile memory cells with minimal modifications. There is included a volatile...
Semiconductor memory device
A DRAM memory cell having an isolation transistor formed from a bipolar transistor.
Electronic component with stacked electronic elements
An electronic component includes stacked electronic elements with external contacts. The external contacts are connected to contact terminal pads of an...
Transistor having compensation zones enabling a low on-resistance and a
high reverse voltage
A semiconductor component includes a semiconductor body having a substrate of a first conduction type and a first layer of a second conduction type that is...
Vertical transistor, memory arrangement and method for fabricating a
A vertical transistor (100) has a source region (103), a drain region (109), a gate region (108), and a channel region (104) between the source region (103) and...
Circuit with buried strap including liner
Semiconductor devices having trenches with buried straps therein preventing lateral out-diffusion of dopant are provided along with methods of fabricating such...
A magnetic memory cell is disclosed. The memory cell includes first conductor and second conductors coupled to first and second electrodes of a magnetic element....
Transistor configuration for a bandgap circuit
A transistor configuration for a bandgap circuit is configured in the form of an npn transistor. An insulated p-type well, which is surrounded by a buried n-type...
Structure and method of forming bitline contacts for a vertical DRAM array
using a line bitline contact mask
A bitline contact and method of forming bitline contact for a vertical DRAM array using a bitline contact mask. In the method, gate conductor lines are formed....
Method for producing quadratic contact holes utilizing side lobe formation
An array of small square contact holes, on the order of magnitude of the exposing light wavelength, are formed by selecting the partial coherence and numerical...
Method for obtaining elliptical and rounded shapes using beam shaping
A method of fabricating a mask (316) for patterning a semiconductor wafer. The mask (316) includes elliptical (340) or rounded features formed using an...
Process for the deposition of thin layers by chemical vapor deposition
A process for the deposition of thin layers by chemical vapor deposition includes adding an effective amount of nitroxyl radicals of the formula ##STR1## to a...
Wafer handling system and wafer handling method
A wafer holder has a set of minimum contact wafer support members predefining support member contacting portions on a planar wafer surface of a wafer. The wafer...
Method for estimating the channel impulse response of a mobile radio
A method for estimating a channel impulse response of a mobile radio channel is described. The mobile radio channel is accessed over a wide bandwidth by a code...
Focus and tracking repeatable runout compensator
A repeatable runout compensator that allows a transducer of a servo system in a storage device employing rotating media to follow the eccentricity on the media...
Semiconductor memory with a clock synchronization device having a
temperature controlled delay circuit
In order to achieve an optimally stable synchronization of clock signals, a temperature-controlled delay device with which it is possible to generate a signal...
Write protection control for electronic assemblies
The invention relates to an electronic assembly having a non-volatile memory device with a controllable write protection feature and a switching configuration...
Decoding device and smart card having such a decoding device
A decoding device includes a signal-conditioning device for generating an intermediate signal from an input signal, a data register for storing a time section of...
Duty-cycle correction circuit
An apparatus for generating two signals having a predetermined spacing between mutually corresponding signal edges includes first and second delay devices for...
Dynamic delay line control
A delay lock loop circuit for aligning in time a reference clock signal with an internal feedback clock signal includes a forward delay circuit that receives the...
Semiconductor module having a configurable data width of an output bus, and
a housing configuration having a...
A semiconductor module having a configurable data width of an output bus has data connecting pads as well as driver circuits having a respective output that is...
Vertical high-voltage semiconductor component
The present invention relates to a high-voltage semiconductor component having a semiconductor substrate of a first conduction type on which a semiconductor...
Field effect transistor and fabrication method
A field effect transistor contains a gate stack with a first layer, preferably a polysilicon layer, on a gate oxide disposed on a substrate, and over the first...
Application of alignment marks to wafer
The invention relates to a method for applying adjusting marks on a semiconductor disk. A small part structure consisting a non-metal is produced in an extensive...
Method for integrating imperfect semiconductor memory devices in data
A method for integrating imperfect semiconductor memory devices having functional and defective memory cells into a data processing apparatus. The defective...
Semiconductor memory with precharge control
The application of a nonactive level to a word line in a semiconductor memory is controlled by a precharge control. In order to initiate the precharge operation,...
Edge-triggered d-flip-flop circuit
The circuit forms an edge-triggered D-Flip-Flop with a master/slave configuration. The master circuit has only one master switch controlled by a clock signal and...
Clock generator, particularly for USB devices
In accordance with the USB specifications, an accuracy of 0.25% is required for the data transmission rate. To generate a clock signal that allows this accuracy,...
Integrated circuit having a synchronous and an asynchronous circuit and
method for operating such an integrated...
An integrated circuit has a synchronous circuit and an asynchronous circuit. A clock-controlled input register circuit and an output register circuit for storing...
Test configuration and test method for testing a plurality of integrated
circuits in parallel
A test configuration for testing a plurality of integrated circuits, in particular fast semiconductor memory modules located on a wafer, in parallel. The test...
Circuit for charging rechargeable batteries having a combined charging and
overvoltage protection circuit
A rechargeable battery unit, which is intended for supplying a voltage to an electrical appliance, is charged by an external charging voltage by a charging...
Semiconductor component for high reverse voltages in conjunction with a low
on resistance and method for...
A semiconductor component includes a semiconductor body of a first conductivity type which accommodates a space charge region. Semiconductor regions of a second...
Field-shield-trench isolation for gigabit DRAMs
A dynamic random access memory (DRAM) formed in a semiconductor body has individual pairs of memory cells that are isolated from one another by a vertical...
Vertical transistor and transistor fabrication method
In DRAM memory cells, individual memory cells are isolated from one another by an isolation trench (STI). In such a case, a vertical transistor is formed by the...
Semiconductor component and corresponding test method
A semiconductor component having a first main terminal, a second main terminal, a gate terminal for controlling the current between the main terminals is...
Method for fabricating a semiconductor structure using a protective layer,
and semiconductor structure
A method produces a semiconductor structure on a substrate. Then, a protective layer is applied to the semiconductor structure. To fabricate a further...
Process for fabrication of a ferrocapacitor
A process for the fabrication of a ferrocapacitor comprising depositing a first mask element 7 over a structure having a bottom electrode 1, a ferroelectric...
Finishing pad design for multidirectional use
A polishing pad (for example, polishing pad 305) for use in planarization of a semiconductor wafer (for example, semiconductor wafer 420), the polishing pad 305...
Holding device for holding at least one optical plug
The invention relates to a holding device for holding at least one optical plug that can be coupled with a coupling partner in an optical coupling system....
Electronic security device for a firearm and associated electronically
An apparatus for releasing a safety device of a firearm with a trigger for actuating the apparatus, wherein the safety device is capable of blocking the...
DQS postamble noise suppression by forcing a minimum pulse length
A circuit and method for suppressing the effect of noise on a data strobe signal DQS in a double data rate (DDR) SDRAM is provided. The circuit includes a data...