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Method and apparatus for Viterbi detector state metric re-normalization
A method and apparatus for Viterbi detector state metric re-normalization. The method includes fabricating a Viterbi detector (138) having a predetermined number...
A/D converter having signaling and requesting capability
The disclosed A/D conversion system is designed to signal the beginning or the impending beginning of an A/D conversion and/or to request the implementation of...
Addressing device for selecting regular and redundant elements
An addressing device selects an element from a set of N.ltoreq.2.sup.K regular elements or alternatively from a set of R<N redundant elements in dependence on...
High rate coding for media noise
An apparatus has a conversion circuit, a precoder circuit, and a selection circuit. The conversion circuit converts user data b.sub.1, b.sub.2, b.sub.3 . . ....
Circuit configuration for producing exponential predistortion for a
A circuit is specified for producing exponential predistortion for a variable amplifier that contains two parallel-connected, controlled current paths, each...
Integrated circuit having a programmable element and method of operating
An integrated circuit has a programmable element with an electrical interconnect resistance that can be varied by programming. An evaluation circuit for the...
Integrated circuit having a test circuit, and method of decoupling a test
circuit in an integrated circuit
The integrated circuit has a test circuit, which is connected to an input terminal of the integrated circuit via a line connection. An isolating device is...
Nonvolatile semiconductor memory cell and associated semiconductor circuit
configuration and method for the...
A nonvolatile semiconductor memory cell, an associated semiconductor circuit configuration and also a fabrication method, in which, in a substrate, active...
Semiconductor memory cell and semiconductor memory device
A semiconductor memory cell has a field-effect transistor device and a ferroelectric storage capacitor. The field-effect transistor device has a channel region...
Barrier stack with improved barrier properties
An barrier stack for inhibiting diffusion of atoms or molecules, such as O.sub.2 is disclosed. The barrier slack includes first and second barrier layers formed...
Device and method for detecting a reliability of integrated semiconductor
components at high temperatures
The invention relates to a device and a method for detecting the reliability of integrated semiconductor components. The device includes a carrier substrate for...
Method and semiconductor wafer configuration for producing an alignment
mark for semiconductor wafers
A method and a semiconductor wafer configuration for producing an alignment mark for semiconductor wafers. In the method, an alignment mark region surrounded by...
Adhesively bonded chip-and wafer stacks
The present invention describes the use of poly-o-hydroxy amides (PHAs) for adhesively bonding articles or materials, especially components used in the...
Methods of using adhesion enhancing layers and microelectronic integrated
modules including adhesion enhancing...
Adhesion promoters for polymer coatings on metals are articulated into at least two head groups connected by a hydrocarbon spacer group. One head group reacts...
Method of controlled chemical vapor deposition of a metal oxide ceramic
A method of forming a metal oxide ceramic layer is provided, in which a gaseous flow of a vaporized solution of a precursor organo metal compound in a volatile...
Pyrolysis plant for refuse and method for screening solid residues
A pyrolysis plant for refuse and a method for screening solid residues provide a sure and trouble-free sieving of a solid material using a sieving device having...
A transmission configuration includes a plurality of individual lasers which are included in a two-dimensional laser array and emit radiation elements with...
Demodulator and method for demodulating CPFSK-modulated signals using a
linear approximation of the CPFSK signal
In a method for demodulating a CPFSK-modulated signal, the n-1-th substitute symbol a.sub.n-1 which occurs in the linear approximation of the CPFSK is estimated...
Interleavement for transport of frames and cells
A DMA system includes a plurality of transmit-receive pairs (102, 104) for communicating on a bus. A DMA controller (108) supervises bus handling. The DMA...
Data memory with short memory access time
A data memory including a main data memory having a plurality of data memory units, a redundancy data memory that includes a plurality of redundancy data memory...
Ferroelectric capacitor and process for its manufacture
Forming a capacitor, by (a) forming a matrix of ferroelectric capacitor elements on a substrate, (b) forming a CAP layer over the ferroelectric capacitor...
Universal two dimensional (frame and line) timing generator
A programmable two-dimensional timing generator according to the invention employs a clock generator (102) and a user-defined two-stage waveform generator (106,...
Integrated circuit having a connection pad for stipulating one of a
plurality of organization forms, and method...
An integrated circuit can be operated in at least three different organization forms that can be set externally. A connection pad receives an external signal for...
Circuit configuration for selectively transmitting information items from a
measuring device to chips on a...
The circuit configuration allows selective transmission of information items to a chip of a wafer during chip fabrication, and an apparatus having a needle card....
Test apparatus for semiconductor circuit and method of testing
A wafer test apparatus for bringing the contact areas of the integrated circuits to be tested into electrical connection with the test contacts as uniformly as...
Semiconductor device with self-aligned contact and method for manufacturing
A semiconductor device and a method for manufacturing the semiconductor device with a self-aligned contact, is described. A first conductor and a second...
Electronic device having a trimming possibility and at least one
semiconductor chip and method for producing...
An electronic device has a semiconductor chip and a passive component, whose electrical values can be varied. The semiconductor chip is electrically conductively...
Apparatus for monitoring intentional or unavoidable layer depositions and
The apparatus allows monitoring layer depositions in a process chamber. The apparatus has a light source, a sensor element, and at least one light detector. The...
Simultaneous native oxide removal and metal neutral deposition method
A method of fabricating a semiconductor device having a dielectric structure on which an interconnect structure is optionally patterned using lithographic and...
Maskless array protection process flow for forming interconnect vias in
magnetic random access memory devices
A method for forming interconnect structures in a magnetic random access memory (MRAM) device includes defining an array of magnetic tunnel junction (MTJ) stacks...
Intra-cell mask alignment for improved overlay
A method for intra-cell alignment of a substrate and mask comprises providing a substrate comprising an exposed photosensitive material, providing a phase-shift...
Subtractive stud formation for MRAM manufacturing
A method of fabricating a magnetic memory cell and an MRAM structure. A thin conductive hard is used to pattern a magnetic stack material layer. Conductive studs...
Wafer handling device
The present invention provides a wafer handling device having a base plate (G; G'), which has a first and a second supporting surface for a respective wafer (W1,...
Apparatus for connecting semiconductor modules
The present invention provides an apparatus for connecting semiconductor modules, in particular memory banks, having: at least two devices (A, B) for receiving a...
Optical module for wavelength reference measurement in WDM systems
An optical for wavelength reference measurement has in essence an optical conductor with integrated fiber Bragg grating that has a transmission maximum at a...
Device and method for supplying power to computer peripheral equipment
using the bus system of the computer
Apparatus and method for the power supply of auxiliary implements of computers via the bus system of the computer, wherein an energy store is provided within the...
Linked list DMA descriptor architecture
A linked list DMA descriptor includes an indication of a number of data pointers contained in a subsequent DMA descriptor. The number of data pointers contained...
Graphical user interface for testing integrated circuits
A system that includes a graphical user interface (GUI) connected to an input/output device of a computer system and one or more test instruments producing a set...
Asynchronous data reception circuit of a serial data stream
Data reception circuit for receiving a serial input data stream, where the data reception circuit has a data stream separation circuit (4) for separating the...
Method and apparatus for generating reliability information for channel
decoding in a radio receiver
An equalizer of a radio receiver for generating reliability information (q) that specifies probabilities of a received data symbol (z) being based on a...
A method for defect detection, comprising providing a memory cell array comprising memory cells connected to word lines and local bit lines, and global bit lines...
MRAM semiconductor memory configuration with redundant cell arrays
The MRAM semiconductor memory configuration has MRAM main cell arrays in the form of a crosspoint array or a transistor array together with redundant MRAM cell...
Method for operating a semiconductor memory and semiconductor memory
An additional test mode is introduced in a semiconductor memory. A multiplicity of word lines are simultaneously activated by a word line decoder in the test...
Configuration for operating an optical transmission or reception module at
high data rates of up to 10 Gbit/s
The invention relates to an arrangement for operating an optical transmission or reception module at high data rates of up to 10 Gbit/s, having a TO package with...
Electronic output stage
An electronic output module, especially an electronic output module for CMOS-LVDS levels (LVDS-low voltage differential signalling), is suitable for analogue and...
Method and device for generating a reference voltage
A method and a device generate a reference voltage for discriminating between the logic states of a data signal received at a receiving end. A transmitting...
Zero static power programmable fuse cell for integrated circuits
A software programmable fuse cell which reduces or eliminates static power consumption is disclosed. The programmable fuse cell can be operated in programmable...
Programming transistor in breakdown mode with current compliance
A transistor (such as a MOSFET) is operated in its breakdown region, as opposed to its saturation region, to program an electric fuse. With the programming...
Circuit for testing an integrated circuit
A test circuit for testing an integrated circuit, includes a test signal input for receiving a test signal from the integrated circuit and a reference signal...
Semiconductor device and converter device with an integrated capacitor
In order to keep the mounting outlay for shielding measures as low as possible, a semiconductor device having a semiconductor component in a housing element is...