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Patent # Description
US-6,873,055 Integrated circuit arrangement with field-shaping electrical conductor
An integrated circuit arrangement includes at least one electrical conductor that, when a current flows through it, produces a magnetic field that acts on at...
US-6,873,012 SOI component
A semiconductor component has a semiconductor substrate, an insulation layer located on the semiconductor substrate, and a semiconductor layer that is arranged...
US-6,873,003 Nonvolatile memory cell
A non-volatile memory cell which can be easily integrated into processes for forming DRAM cells using trench capacitors is disclosed. The non-volatile memory...
US-6,873,000 Storage cell field and method of producing the same
A storage cell field has a plurality of storage cells formed in a substrate of a first doping type, said storage cells comprising a trench capacitor arranged in...
US-6,872,652 Method of cleaning an inter-level dielectric interconnect
A method for cleaning a semiconductor interconnect structure formed in an organic ILD using an anisotropic organic dielectric etch in combination with a sputter...
US-6,872,648 Reduced splattering of unpassivated laser fuses
The act of blowing an unpassivated electrical fuse (for example, fuse 405) using a laser can result in the splattering of the fuse material and result in...
US-6,872,594 Method of fabricating an electronic component
The electronic component has semiconductor chips that are stacked on one another. On their active top sides, the chips having interconnects for rewiring to...
US-6,872,495 Method for fabricating a lithographic reflection mask in particular for the patterning of a semiconductor...
A method for fabricating a lithographic reflection mask in particular for patterning of semiconductor wafers, is described, and can be used for extremely small...
US-6,872,464 Soldering agent for use in diffusion soldering processes, and method for producing soldered joints using the...
A soldering agent for use in diffusion soldering processes contains, in a soldering paste, a mixture of at least partially metallic grains of a high-melting...
US-6,871,306 Method and device for reading and for checking the time position of data response signals read out from a...
A method and a device for reading and for checking the time position of a data response read out from a memory module to be tested, in particular a DRAM memory...
US-6,871,050 Circuit configuration for controlling the transmitting power of a battery-operated transceiver
A circuit configuration is provided for controlling the transmitting power of a battery-operated transceiver. A high transmitting power of a mobile transceiver...
US-6,870,911 Transceiver
Transceiver for transmitting and receiving voice and data signals includes a voice signal driver configured to operate in idle or working operating modes, during...
US-6,870,879 Interpolation filter circuit
Interpolation filter circuit for a digital communication device for the filtering and clock-rate conversion of a digital input signal received from a data source...
US-6,870,787 Configuration and method for checking an address generator
In a configuration for checking an address generator, a memory apparatus is configured such that it can store values of address signals that are present on lines...
US-6,870,572 Method and circuit for picture-in-picture superimposition
A method for picture-in-picture insertion is described, which is distinguished in particular by the fact that the inset pictures are written to a memory device...
US-6,870,433 Oscillator circuit
An oscillator circuit having a charge storage device, an upward integration current source, and a downward integration current source is described. The charge...
US-6,870,420 Method of increasing an internal operating voltage for an integrated circuit, and integrated circuit
An increased internal operating voltage for an integrated circuit can be generated with two two-stage charge pumps, ensuring reliable operation even in the event...
US-6,870,392 Method for generating test signals for an integrated circuit and test logic unit
To generate test signals by a test logic unit on a semiconductor wafer, the test signals being used to check specific functions and/or parameters of an...
US-6,870,373 Circuit configuration and method for assessing capacitances in matrices
A circuit configuration for assessing capacitances in a matrix, which has a number of rows with at least one capacitance in at least one dimension, includes a...
US-6,870,263 Device interconnection
A conductor for interconnecting integrated circuit components having improved reliability. The conductor includes a liner surrounding at least three surfaces of...
US-6,870,206 Semiconductor chip, fabrication method, and device for fabricating a semiconductor chip
A semiconductor chip has standard cells arranged in a plurality of mutually adjacent rows. Each standard cell is connected by a plurality of tracks for...
US-6,870,201 High voltage resistant edge structure for semiconductor components
The invention relates to a high voltage resistant edge structure in the edge region of a semiconductor component which has floating guard rings of the first...
US-6,869,886 Process for etching a metal layer system
The present invention relates to a process for etching a metal layer system. The metal layer system includes a first aluminum-containing layer, a second...
US-6,869,232 Receiving and coupling part for opto-electronic transmission and/or reception element
The invention relates to a receiving and coupling part for an optoelectronic transmission and/or reception element having an opening for inserting a carrier on...
US-6,868,530 Method for fabricating an integrated semiconductor circuit
A method for fabricating a semiconductor circuit uses a computer program to compute a circuit diagram that is made up of a large number of surface cells, each...
US-6,868,432 Addition circuit for digital data with a delayed saturation operation for the most significant data bits
An addition circuit for digital data includes a digital adder for the addition of digital input data values present at data inputs of the digital adder to form a...
US-6,868,028 Circuit configuration for driving a programmable link
A circuit configuration for driving a programmable link has a drive circuit for the selection and blowing of the fuse, and also a shift register, by which an...
US-6,868,018 Memory circuit, method for manufacturing and method for operating the same
A memory circuit includes one or several voltage generators for generating operating voltages for memory elements of the memory circuit and a means for...
US-6,867,657 Relaxation oscillator
The invention relates to an electric circuit for generating a periodic signal comprising: a capacitor device which has a first terminal and a second terminal; a...
US-6,867,597 Method and apparatus for finding a fault in a signal path on a printed circuit board
In the case of the present-day trend of miniaturizing housed electronic devices, there is the problem that the contact spacings between the terminal pins becomes...
US-6,867,492 Radio-frequency power component, radio-frequency power module, method for producing a radio-frequency power...
A radio-frequency power component and a radio-frequency power module, as well as to methods for producing them are encompassed. The radio-frequency power...
US-6,867,479 Method for rewiring pads in a wafer-level package
A method for rewiring contact pads in the wafer-level package is inventively provided. In order to be able to make the terminals of the characterization pads...
US-6,867,472 Reduced hot carrier induced parasitic sidewall device activation in isolated buried channel devices by...
A semiconductor device includes a transistor junction formed in a substrate adjacent to an isolation region. A region between the transistor junction and the...
US-6,867,471 Universal package for an electronic component with a semiconductor chip and method for producing the universal...
An electronic component has a semiconductor chip with chip contacts. The chip contacts are mechanically fixed on a wiring structure and electrically connected to...
US-6,867,442 Surface-functionalized inorganic semiconductor particles as electrical semiconductors for microelectronics...
A semiconductor device has a first contact, by which charge carriers are injected into a semiconductor path, and a second contact, by which the charge carriers...
US-6,867,137 Fabrication method for a semiconductor structure having a partly filled trench
The present invention provides a fabrication method for a semiconductor structure having a partly filled trench, having the following steps: provision of a...
US-6,867,105 Bipolar transistor and method of fabricating a bipolar transistor
A bipolar transistor includes a first layer with a collector. A second layer has a base cutout for a base. A third layer includes a lead for the base. The third...
US-6,867,087 Formation of dual work function gate electrode
In a method of making a dual work function gate electrode of a CMOS semiconductor structure, the improvement comprising formation of the dual work function gate...
US-6,867,053 Fabrication of a FeRAM capacitor using a noble metal hardmask
A ferroelectric capacitor is fabricated using a noble metal hardmask. A hardmask is deposited on a top electrode of a capacitor stack comprising a ferroelectric...
US-6,866,980 Bis-o-aminophenol derivatives, poly-o-hydroxyamides, and polybenzoxazoles, usable in photosensitive...
Bis-o-aminophenols, which carry on at least one of their hydroxyl groups a tert-butoxy-carbonyl group, can be reacted with dicarboxylic acids to give the...
US-6,866,943 Bond pad structure comprising tungsten or tungsten compound layer on top of metallization level
A bond pad structure formed over a predetermined area of an IC substrate comprising quickly and easily removable redundancy and passivation layers upon...
US-6,866,891 Targeted deposition of nanotubes
A method for targeted deposition of a nanotube on a planar surface includes providing a ram made from elastomeric material and having a relief structure on its...
US-6,866,200 Semiconductor device identification apparatus
A three-dimensional image of a semiconductor device identification pattern is obtained by measuring the distance of at least one sensor to the surface of the...
US-6,865,727 Method for calculating the capacity of a layout of an integrated circuit with the aid of a computer, and...
A method for verifying a layout of an integrated circuit with the aid of a computer and the fabrication of the circuit applying the method includes the steps of...
US-6,865,712 Optimized turbo decoder
A turbo decoder for decoding a data signal transmitted via a disturbed channel has a symbol estimator. The symbol estimator contains a computing device, which,...
US-6,865,709 Method and device for channel encoding in an information transfer system
To achieve an improved disparate error protection in the transmission of coded symbols of an information stream, the information stream is supplied to a...
US-6,865,707 Test data generator
Test data generator for generating test data patterns for the testing of a circuit having a frequency multiplication circuit, which increases a low clock...
US-6,865,636 Multitasking processor system for monitoring interrupt events
In a processor system, different memory means (8), which can in each case comprise a memory stack (9) for the instruction counter, a register (10) for...
US-6,865,590 Three input variable subfield comparation for fast matching
The relationship between a sum of applied address operands and a matching virtual page number is exploited to minimize the adder size required for fast number...
US-6,865,173 Method and apparatus for performing an interfrequency search
The present invention a system and method are provided for performing an inter-frequency search with reduced loss of link frames in a CDMA system. The CDMA...
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