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Temperature compensation circuit for a hall element
A temperature compensation circuit for a Hall element has a first and a second band gap reference circuit. The Hall element is fed from an excitation current...
Current mode logic (CML) circuit concept for a variable delay element
An apparatus for a current mode logic variable delay element. A preferred embodiment comprises an input signal that is provided to a multiplexer (for example,...
Test configuration for the functional testing of a semiconductor chip
A test configuration for the functional testing of a semiconductor chip is described. The semiconductor chip, which can be subjected to a functional test for the...
Electronic component with external flat conductors and a method for
producing the electronic component
An electronic component with external flat conductors and a method producing the component includes placing the external flat conductors as waveguides with a...
High-voltage semiconductor component
A process for manufacturing of a semiconductor device comprising a blocking pn junction, a source zone of a first conductivity type connected to a first...
Method for removing structures
A method for removing structures from a substrate is described. The method includes providing a substrate that has the structures that must be removed, applying...
Method for fabricating microstructures and arrangement of microstructures
A method referred to as a "cellular damascene method" utilizes a multiplicity of regularly arranged closed cavities referred to as "cells", which are produced in...
Method of forming an alignment mark structure using standard process steps
for forming vertical gate transistors
An alignment mark structure (22) for aligning a mask with prior formed features of in a circuit region when an opaque material layer (88) covers the alignment...
Process window enhancement for deep trench spacer conservation
In a process for manufacturing deep trench (32) memory cells, a method of enhancing the process window by better protecting the nitride spacer (52) prior to the...
Method for producing a horizontal insulation layer on a conductive material
in a trench
In order to form an oxide cover on a conductive filling in a trench in a semiconductor substrate an HDP oxide is deposited on the conductive filling using a...
Polybenzoxazole precursors, photoresist solution, polybenzoxazole, and
process for preparing a polybenzoxazole...
There are disclosed polybenzoxazole precursors which can be processed by centrifugal techniques, which can be cyclized to polybenzoxazoles on substrates without...
Method and arrangement for generating ultrapure steam
The invention relates to a method for generating ultrapure steam by oxidation of hydrogen in a closed torch with separate feed lines for hydrogen and oxygen and...
Phenyl-linked oxazole cyanates as dielectrics having good adhesive and
The following invention relates to phenyl-linked polybenzoxazoles having terminal, aryl- or heteroaryl-attached cyanate groups which can be used for adhesive...
Configuration for polishing disk-shaped objects
A polish head for Chemical Mechanical Polishing includes a backing film of silicone on a rigid support element, preferably, of amorphous ceramic. The silicone...
Process for the abrasive machining of surfaces, in particular of
A process is described for the chemical mechanical machining of semiconductor wafers. A plurality of surfaces are successively subjected to a polishing step, in...
Scanning tip orientation adjustment method for atomic force microscopy
A method of calibrating an AFM scanner head of an AFM machine to determine the arc functions of the scanner head are provided. A method of measuring the actual...
An optoelectronic component has at least one monolithically integrated laser diode and at least one monolithically integrated optical waveguide. At least one of...
Compensation circuit and method for compensating for an offset
To demodulate a frequency-modulated signal having an offset, two time constants are provided in a filter unit. The filter unit has two analog or digital low-pass...
Multi-path transceiver amplification apparatus, method and system
A multi-path transceiver apparatus, method and system for implementation in a bidirectional antenna path by which a transceiver output signal is provided with a...
RAM memory circuit and method for controlling the same
A RAM memory circuit and method for controlling the same includes memory cells disposed in a matrix of rows and columns each addressed for writing in/reading out...
Read/write amplifier having vertical transistors for a DRAM memory
As a consequence of DRAM memory cell miniaturization, the available space for read/write amplifiers decreases in width from hitherto 4 bit line grids to 2 bit...
Integrated memory and method for operating an integrated memory
An integrated memory includes memory cells arranged in a memory cell array and a read/write amplifier for evaluating and amplifying data signals of the memory...
Ferroelectric memory device
A ferroelectric memory device includes a memory cell array having memory cells arranged in a matrix form. Each of the memory cells includes a cell transistor and...
Housing for receiving a component which can be connected to the housing in
a pluggable manner
The invention pertains to housing for receiving a component which can be connected to the housing in a pluggable manner, in particular an optoelectronic...
Digital filter for filtering a digital input signal with a variable filter length (l), it being possible to switch over the filter length (l) of the digital...
Comparator circuit for mapping an analog input signal into a digital output
The invention is direct to a comparator circuit that maps an analog input signal into a digital output signal and comprises a threshold as well as an upper and a...
A half-bridge circuit includes: a vertically designed n-conducting first MOS transistor that is integrated in a first semiconductor body having a front side and...
Maskless middle-of-line liner deposition
A process for fabricating a semiconductor structure, wherein the semiconductor structure includes a core region and a periphery region. The core region includes...
Trench cell for a DRAM cell array
A trench cell for use in a DRAM array includes a vertical selection transistor of a first conductivity type at the--seen in the bit line direction--first side of...
Method for dry etching deep trenches in a substrate
A method for etching trenches in a substrate secures a wafer to an electrode in a plasma chamber and heats the wafer to a temperature of greater than 200 degrees...
The optimization of a CMP process provides the use of an auxiliary layer (4) between a dielectric (1) in the vicinity of patterned portions and a layer of a...
Deep isolation trenches
A method of forming deep isolation trenches in the fabrication of ICs is disclosed. The substrate is prepared with deep isolation trenches. The isolation...
Method for producing a cavity in a monocrystalline silicon substrate and a
semiconductor component having a...
A semiconductor component has a cavity formed in a monocrystalline silicon substrate. The wall of the cavity is covered by a cover layer, at least in an upper...
Method for fabricating an electrode arrangement for charge storage
The invention relates to an electrode arrangement for charge storage with an external trench electrode (202; 406), embodied along the wall of a trench provided...
Polymerizable composition, polymer, resist, and process for electron beam
A polymerizable composition for use in electron beam lithography, according to the following structural formula: ##STR1## The formula use the following...
Method for adjusting a multilevel phase-shifting mask or reticle
A method for adjusting (aligning) a multilevel phase-shifting mask or a multilevel phase-shifting reticle with the aid of at least one alignment mark provided on...
Method for chemical-mechanical polishing of a layer which is a substrate
and is a metal selected from a...
The invention discloses a method for the chemical-mechanical polishing of layers composed of metals of the group of platinum metals, particularly iridium. In the...
Data processing system having configurable components
The data processing system has configurable components, which each have a configuration register for storing configuration data. A serial bus couples the...
Method for storing data, method for reading data, apparatus for storing
data and apparatus for reading data
The invention relates to two methods for reading and two methods for storing data, and also to an apparatus for compressing data and decompressing data which are...
A memory device has a memory module, a controller, a data bus for connecting the controller and the memory module, a read clock generator, and a read clock bus...
Latency time circuit for an S-DRAM
Latency time circuit for an S-DRAM, which is clocked by a high-frequency clock signal for producing a delayed data enable control signal for synchronous data...
Method for storing data in a memory device with the possibility of access
to redundant memory cells
A method is provided for storing data in a memory device having memory cells arranged in memory cell rows and memory cell columns. The method can include a step...
Acoustic signal generator, and method for generating an acoustic signal
An acoustic signal generator, and a method for generating an acoustic signal are described. The acoustic signal generator has a membrane that can oscillate, a...
Current sample-and-hold-circuit, a/d converter and a method for operating a
current sample-and-hold circuit
The invention relates to a current sample-and-hold circuit comprising several sub-circuits, in which a current signal is stored. At least one of said...
Circuit for transforming a differential mode signal into a single ended
signal with reduced standby current...
An apparatus for converting a differential mode signal into a single ended signal with reduced power consumption. A preferred embodiment comprises a single ended...
Power factor correction circuit with high-voltage semiconductor component
A switching power supply including a power factor correction circuit comprises a rectifier, an inductor coupled in series with the rectifier, a semiconductor...
DRAM having improved leakage performance and method for making same
A semiconductor memory device comprises a trench etched from a substrate below a shallow trench isolation and a doped collar oxide. The device further comprises...
Method of forming organic spacers and using organic spacers to form
semiconductor device features
A method of forming organic spacers using an N.sub.2 plasma or N.sub.2 containing plasma anisotropic etchant, and using such organic spacers for forming features...
Method for fabricating a semiconductor memory device
A method of fabricating semiconductor memory devices is simplified by providing at least some plug regions, which are provided for contacting storage capacitor...
Process for producing a thermoelectric converter
Method for fabricating a thermoelectric converter having a plurality of series-connected thermoelement cells, which are connected in series with one another by...