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Imaging system and method for positioning a measuring tip onto a contact
region of a microchip
The imaging system provides assistance during the positioning of a measuring tip as it is placed onto a contact region of a microchip, in order to measure an...
Optical measurement of planarized features
There is provided a method for measuring planarized features on a wafer of a semiconductor device. The planarized features on the wafer are illuminated. A...
Method of reducing pitch on semiconductor wafer
A projected image is formed during a material substrate. A photolithographic mask is illuminated with substantially coherent light at an oblique angle of...
Electronic component containing capacitance diodes, having different
capacitance ranges, and circuit...
An electronic component has at least a first diode and a second diode that are capacitance diodes. The characteristic curve of the second diode has a fixed,...
Component having an integrated radiofrequency circuit
A conductor network includes trimming capacitors and is connected in parallel with a resonant circuit. The trimming capacitors can be connected in parallel with...
Voltage regulator with frequency response correction
A voltage regulator has a voltage regulator output (6) for providing a regulated output voltage (Uout) and an internal nonreactive resistor (RZ) arranged in...
DC-DC conversion charging apparatus
The present invention provides a method of charging a rechargeable device (108) and a charging apparatus wherein the rechargeable device (108) is connected to a...
Piezoelectric resonator apparatus with acoustic reflector
A resonator apparatus has a piezoelectric resonator as well as an acoustic reflector which has a layer having a high acoustic impedance and a layer having a low...
Electronic component having a semiconductor chip, system carrier, and
methods for producing the electronic...
An electronic component and a system carrier having a heat conduction block, on which overlapping inner flat conductor ends are fixed mechanically and insulated...
Flash memory cell and the method of making separate sidewall oxidation
A process and product for making integrated circuits with dense logic and/or linear regions and dense memory regions is disclosed. On a common substrate, a dual...
Method and configuration for compensating for unevenness in the surface of
In a EUV reflection mask, the distance from the surface of the mask to an idealized plane is locally measured at a first position. The measured value indicates...
Etching process for a two-layer metallization
The novel etching process for a two-layer metallization, or dual damascene patterning, is simple and cost-effective to carry out and reliably prevents fences...
Polyelectrolyte dispensing polishing pad, production thereof and method of
polishing a substrate
A polyelectrolyte dispensing polishing pad, a process for its production and a method of polishing, e.g., chemical mechanical polishing (CMP), a substrate such...
Method for fabricating embedded nonvolatile semiconductor memory cells
A method for fabricating embedded nonvolatile semiconductor memory cells is described. The method includes forming a first insulating layer on a substrate having...
Method for fabricating a deep trench capacitor for dynamic memory cells
A method for fabricating a deep trench capacitor for dynamic memory cells in which a trench is etched into the depth of a semiconductor substrate, and wherein...
Photoresist compound and method for structuring a photoresist layer
A photoresist compound or composition achieves a uniform volume growth in a chemical expansion on a chemically expandable photomask during a method for...
Method for producing a phase shift mask
To avoid charging effects of isolated chromium structures during the structuring of a second level of attenuated phase shift masks, a previous chromium etching...
Connector for a plurality of switching assemblies with compatible
A connector is described for fixing a plurality of switching assemblies on a substrate. The connector is also for making contact with the plurality of switching...
Contact base with detachable contacts for making electrical contact with an
electronic component, in particular...
A frequent problem that arises in particular with regard to the analysis of memory components is that the memory components have to be tested under realistic...
Housing for a coupling configuration for injecting and/or extracting
A housing for a coupling configuration for injecting or extracting optical signals of at least one optical data channel into or from an optical conductor has a...
Method of producing micromechanical structures
A micromechanical structure is described which is disposed on a base body and requires protection from environmental influences by a covering body. Furthermore,...
Circuit configuration for generating control signals for testing
high-frequency synchronous digital circuits
A circuit configuration for generating control signals for testing high-frequency synchronous digital circuits, especially memory chips, is described. A p-stage...
Zero static power fuse cell for integrated circuits
A fuse cell with reduced or no static power dissipation is disclosed. The fuse cell utilizes a latch to store the state of the fuse. The use of the latch avoids...
Latch scheme with invalid command detector
Methods and circuits for reducing unnecessary changes to outputs of latch circuits are provided. Unnecessary changes to outputs of latch circuits may be reduced...
Method of storing a quantity of data in a target memory location and
In a method of storing a quantity of data in a target memory location, the data quantity is stored first in a non-volatile buffer memory location. It is then...
Structure and method of multiplexing bitline signals within a memory array
An integrated circuit memory is provided in which a multiplexer is operable to select one of a plurality of bitlines to couple to a master bitline using select...
A circuit module comprises a circuit board having a plurality of contact elements along a longitudinal edge thereof. The circuit board has arranged thereon a...
Multi-layer barrier allowing recovery anneal for ferroelectric capacitors
A multi-layer barrier for a ferroelectric capacitor includes an outdiffusion barrier layer permeable to both hydrogen and oxygen. The outdiffusion barrier layer...
Circuit arrangement for generating non-overlapping clock phases
A circuit arrangement for generating non-overlapping clock phases including a first circuit, a second circuit, and a multiplexer. The first circuit combines two...
Circuit configuration for processing data, and method for identifying an
A circuit configuration for processing data, particularly a semiconductor memory chip, has a control circuit for setting a phase or frequency relationship...
Semiconductor configuration and method for fabricating the configuration
The invention proposes a semiconductor configuration having a substrate, which has at least one component integrated therein. The substrate has a first main side...
Semiconductor component with enhanced avalanche ruggedness
The invention relates to a semiconductor component with enhanced avalanche ruggedness. At the nominal current of this semiconductor component, in the event of an...
Transistor array and semiconductor memory configuration fabricated with the
A transistor array has vertical FET transistors each connected to a storage capacitor of a memory cell array. Gate electrode strips, which form word lines, of...
Area-efficient stack capacitor
An area-efficient stack capacitor for use in an integrated circuit comprises, in one embodiment, a layer of elemental platinum (Pt) as a bottom electrode, a...
Method for fabricating a vertical transistor, and semiconductor memory cell
having a trench capacitor and an...
A semiconductor memory is fabricated with a vertical transistor situated in an upper section of a trench above a trench capacitor. First, an auxiliary insulation...
Method of fabricating a buried collar
A method of forming a buried collar on the sidewall of a trench in a semiconductor substrate including: (a) providing the trench in the semiconductor substrate,...
Photolithographic mask and methods for producing a structure and of
exposing a wafer in a projection apparatus
Auxiliary openings are assigned to openings on a mask to be transferred to a wafer. These auxiliary openings have a phase-shifting property, preferably between...
Method for producing scatter lines in mask structures for fabricating
integrated electrical circuits
In the method according to the invention, scatter lines (2, 3, 4, 5, 6, 7, 8) with a predetermined width are produced, which run at a predetermined distance from...
Method of producing a biometric sensor
In a biometric sensor and a method for its production, a sensor chip is provided with connecting contacts in the form of electrically conductive bumps. The...
Circuit including a built-in self-test
A circuit includes a built-in self-test, wherein the test coverage of a tested logic circuit is improved given the utilization of a fixed standard interface....
Semiconductor laser chip and method for fabricating a semiconductor laser
A semiconductor laser chip has a semiconductor laser element and a beam shaper integrated into the semiconductor laser chip and serving for shaping a laser beam...
Lensless optical servo system for an optically assisted disk drive
A lensless optical servo system has an unfocused light source and patterned photodetectors. The unfocused light is reflected by markings on a rotating disk and...
Method of checking electrical connections between a memory module and a
semiconductor memory chip
Two methods check functional capability of electrical connections between address lines of a printed circuit board of a memory module and address line contacts...
Contactless data transmission system and method for contactless data
A contactless data transmission system having a transponder and a write/read station, between which data can be exchanged by a HF signal. The transponder...
PLL circuit and method for eliminating self-jitter in a signal which is
received by a control circuit
PLL circuit for eliminating self-jitter in a signal which is received by a control circuit, having a phase comparison circuit for producing a phase difference...
Method and arrangement for frequency doubling
To generate an output signal (11) the frequency of which is twice the frequency of an input signal (1, 2), a delayed signal (3, 4) which is delayed relative to...
Configuration for testing semiconductor devices
A current measuring device in the form of a Hall sensor device is disposed in an individual current/voltage supply line device with a common current/voltage...
Method for fabricating a mask for semiconductor structures
A mask is fabricated by applying a sacrificial layer on a semiconductor wafer. The sacrificial layer is then processed with the aid of a first and a second...
Hardmask of amorphous carbon-hydrogen (a-C:H) layers with tunable etch
A process of using a-C:H layer as a hardmask material with tunable etch resistivity in a RIE process that alleviates the addition of a layer forming gas to the...
Method for fabricating a MOSFET having a very small channel length
A gate layer stack formed with at least two layers is firstly patterned anisotropically and then thelower layer is etched. An isotropic, preferably selective...