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Process and device for the abrasive machining of surfaces, in particular
A process for abrasive machining of surfaces of semiconductor wafers, in particular during the production of electronic memory elements, is described. In the...
Method for testing semiconductor chips
A method for testing semiconductor chips, in particular semiconductor memory chips, is described. In which, in a chip to be tested, at least one test mode is...
Method for adjusting the overlay of two mask planes in a photolithographic
process for the production of an...
The present invention provides a method for optimizing the overlay adjustment of two mask planes in a photolithographic process for the production of an...
Ferroelectric memory integrated circuit with improved reliability
A memory cell having capacitor with top and bottom electrodes with a dielectric layer between is described. The bottom electrode is coupled to a first diffusion...
MRAM MTJ stack to conductive line alignment method
A method of manufacturing a resistive semiconductor memory device (100), comprising depositing an insulating layer (132) over a workpiece (30), and defining a...
Process for structuring a photoresist layer on a semiconductor substrate
In a negative or positive photoresist layer structured with the aid of the customary lithography technique, the photoresist layer is heated briefly, in the...
Vehicle for transporting a semiconductor device carrier to a semiconductor
A vehicle for transporting semiconductor devices is used for servicing loadports of semiconductor processing tools with device carriers by use of a portal hoist....
Optical device assembly with an anti-kink protector and
An optical device assembly includes an optical device. The optical device has an optical fiber led from the device with an anti-kink protector, and also a...
Coupling configuration for coupling an optical plug with a plug pin to a
A coupling configuration enables the coupling of an optical plug with a plug pin to a mounting tubelet wherein at least one optical conductor is arranged in at...
Method for operating a TAP controller and corresponding TAP controller
The present invention provides a method for operating a TAP controller having a first input terminal (Etms) for inputting a logic test mode selection signal...
Optical transceiver module
An optical transceiver module includes an electro-optical transmission assembly and an electro-optical receiving assembly both mounted on a common printed...
Light guide configuration for serial bi-directional signal transmission,
optical circuit board, and fabrication...
A light guide configuration for serial bi-directional signal transmission includes an optical signal line for carrying electromagnetic radiation along a main...
Device and method for echo compensation in a two-wire full duplex channel
Method and device for echo compensation with a common-frequency transmission method in duplex mode over a two-wire line, an echo compensation filter which has...
Test structure for measuring a junction resistance in a DRAM memory cell
A test structure for determining the resistance of a conducting junction between an active region of a selection transistor and a storage capacitor in a...
Redundancy in series grouped memory architecture
An improved redundancy scheme for chained memory architecture is disclosed. The redundancy scheme comprises including redundant cells as part of the memory...
A memory system has a memory controller, a plurality of memory modules and a memory bus connected to the memory controller and branching into a plurality of...
Circuit configuration for level boosting, in particular for driving a
A circuit configuration is provided for level boosting, in particular for driving a link that can be programmed by an energy pulse, which is also referred to as...
Sensor array and method for detecting the condition of a transistor in a
A sensor array is provided including transistors that are coupled together. The transistors are designed as sensors and wherein the sensor array has switching...
Method for making contact with a doping region of a semiconductor component
A method makes contact with a doping region formed at a substrate surface of a substrate. An insulating layer is applied on the substrate surface and a contact...
Method for fabricating a bipolar transistor
A method for producing bipolar transistors with the aid of selective epitaxy for producing a collector and base. The method includes widening the area of the...
Method for manufacturing a trench capacitor having an isolation trench
A method for manufacturing a trench capacitor includes the step of etching a shallow isolation trench in a two-step process flow. During a first etching step, an...
Semiconductor device having ferroelectric film and manufacturing method
First and second semiconductor regions are formed separately from each other in a semiconductor substrate. A gate electrode is formed above the semiconductor...
Device for unlocking an electronic component that is insertible into a
An apparatus for unlocking an electronic component to be inserted into a retaining device, in particular, a transceiver, and held in the retaining device by a...
Valve for a slurry outlet opening of a chemical mechanical polishing device
and chemical mechanical polishing...
A valve for a slurry outlet opening in an installation for chemical mechanical polishing, in particular of semiconductor wafers in DRAM production, includes an...
Identification of a peripheral connection state with a universal serial bus
A circuit configuration for a USB peripheral has an integrated circuit, which has two pins for connecting to two data transmission lines of a USB connection. A...
Polar loop transmission circuit
A polar loop transmission circuit is proposed wherein a signal to be transmitted and a feedback signal are separated into their polar phase and amplitude...
An optoelectronic module has at least two components, which are coupled via an optical waveguide, in a monolothically integrated structure. At least two of the...
Photodiode configuration having two photodiodes, a laser diode
configuration having the photodiode...
A photodiode configuration having at least two photodiodes is described. Accordingly, the photodiodes are formed in a symmetrical configuration on a common...
Method and device for determining the output power of a semiconductor laser
The invention relates to a method and device for determining the output power of a semiconductor laser diode being operated with a diode current. A defined...
Integrated circuits with parallel self-testing
An integrated circuit having a BIST control unit for testing a plurality of memory banks simultaneously is described. The BIST control unit is coupled to a...
Acquisition signal error estimator
A system and method for acquisition signal error estimation is provided which uses one or more past values of the sequence to determine the nearest ideal sample...
Voltage-controlled oscillator circuit which compensates for supply voltage
A voltage-controlled oscillator circuit compensates for supply voltage fluctuations of the oscillator and thus for frequency fluctuations at the oscillator...
Gm replica cell utilizing an error amplifier connected to a current mirror
A method and apparatus for calibrating a Gm cell using a Gm replica cell. A digital to analog converter receives a Gm setting code and generates a reference...
Level-shifting circuitry having "high" output impedance during disable mode
A level shifting circuit includes a level-shifting section responsive to an input logic signal, which varies between a first voltage level (e.g., ground) and a...
Power switching device
A power switching device has a power switching transistor connected in series in a load circuit with an inductive load portion and a commutation circuit. The...
Method and apparatus for producing a clock output signal
An apparatus for producing a clock output signal, having an input for receiving an input signal containing a phase information item; a clock generator for...
Circuit for transforming a single ended signal into a differential mode
An apparatus for transforming single ended signals into differential mode signals. A preferred embodiment comprises an inverter (for example, inverter 505) and a...
Circuit configuration for controlling load-dependent driver strengths
A circuit configuration has a first driver stage for feeding in an input signal and for outputting an amplified signal. A second driver stage, which is connected...
Method and probe card configuration for testing a plurality of integrated
circuits in parallel
A test configuration for testing a plurality of integrated circuits, in particular fast semiconductor memory modules located on a wafer, in parallel. The test...
Method and device for securing a multi-dimensionally constructed chip stack
and chip configuration
A method for securing a multi-dimensionally constructed chip stack, which has a plurality of part chips which are interconnected at respective contact areas and...
Trench capacitor with buried strap
A trench capacitor with improved strap is disclosed. The strap is located above the top surface of the capacitor. The top surface of the trench capacitor which...
Semiconductor memory cell configuration and a method for producing the
A semiconductor memory cell configuration includes dynamic memory cells respectively having a trench capacitor and a vertical selection transistor, the memory...
Test structure for determining a doping region of an electrode connection
between a trench capacitor and a...
A test structure for a memory cell array determines a doping region of an electrode connection that, in a memory cell, connects an inner capacitor electrode of a...
Configuration having an electronic device electrically connected to a
printed circuit board
A configuration and also a method for the configuration in which, the configuration has at least one electronic device with associated contact connections and at...
Method for fabricating a hard mask
The method is for producing a hard mask on a substrate, and in particular, on a primary area of a semiconductor substrate. The method includes the following...
Etching processing method for a material layer
The present invention provides a processing method that changes the given and unfavorable surface contour of a material layer to a predetermined, more favorable...
Selective base etching
A method for selective etching in the manufacture of a semiconductor device comprises: forming a layer (6) of silicon-germanium on a substrate (1) of ...
Method of insulating interconnects, and memory cell array with insulated
The process is used to electrically insulate adjacent metallic interconnects made from an aluminum-containing alloy, in particular for interconnects which are...
Method for the fabrication of a DMOS transistor
A method for the fabrication of a DMOS transistor structure provides the advantage that, through the use of a protective layer, the DMOS transistor structure,...
Semiconductor circuit arrangement and a method for producing same
A semiconductor circuit arrangement includes a circuit element embedded in a semiconductor substrate of a first conductivity type in an integrated manner and is...