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Method of forming a memory and method of forming a memory array
A method of forming a memory includes forming a first electrode and a second electrode within a first layer over a semiconductor substrate, forming a...
Method for producing a controllable semiconductor component having a
plurality of trenches
A method of producing a controllable semiconductor component includes providing a semiconductor body with a top side and a bottom side, and forming a first...
Semiconductor device with charge carrier lifetime reduction means
A semiconductor device includes a cell region having at least one device cell, wherein the at least one device cell includes a first device region of a first...
Group III-V and group IV composite switch
In one implementation, a group III-V and group IV composite switch includes a group IV transistor in a lower active die, the group IV transistor having a source...
An electronic device includes multiple semiconductor chips in a single housing. Such semiconductor chips may comprise different semiconductor materials, for...
Surface mountable power components
According to an exemplary implementation, a power component includes a component substrate and a power semiconductor device electrically and mechanically...
Conductive pads and methods of formation thereof
In one embodiment, a device includes a first conductive pad disposed over a substrate, and a etch stop layer disposed over a top surface of the first conductive...
Power quad flat no-lead (PQFN) semiconductor package with leadframe
islands for multi-phase power inverter
According to an exemplary implementation, a power quad flat no-lead (PQFN) package includes a U-phase output node situated on a first leadframe island of a...
Chip arrangement, a method for manufacturing a chip arrangement,
integrated circuits and a method for...
A chip arrangement is provided, the chip arrangement, including a carrier; at least one chip electrically connected to a carrier top side; an encapsulation...
Encapsulated semiconductor device
A semiconductor device includes a carrier and a semiconductor chip disposed over the carrier. The semiconductor chip has a first surface and a second surface...
Chip package having terminal pads of different form factors
A chip package includes an integrated circuit chip. A first group of terminal pads of the chip package is electrically connected to the integrated circuit chip...
Method for processing a workpiece by forming a pourous metal layer
A method for processing a workpiece may include: providing a workpiece including a first region and a second region; forming a porous metal layer over the first...
Reliable data transmission with reduced bit error rate
A data transmission system includes at least one transmission line. A sender is configured to send data frames to the at least one transmission line and a...
System and method for a transducer interface
According to an embodiment, an interface circuit includes a current replicator and a receiver. The current replicator includes a power terminal coupled to a...
Apparatus and method for reconstructing a bit sequence with preliminary
A method for reconstructing a physically uncloneable function (PUF) A for use in an electronic device is provided. The method includes generating a potentially...
Integrated circuit and method for manufacturing the same
An integrated circuit has one or more logic gates and a control circuit. The control circuit has one or more control elements coupled to the logic gates. The...
Integrated-circuit module with waveguide transition element
An integrated-circuit module includes a package molding compound layer, a radio-frequency (RF) integrated circuit embedded within the package molding compound...
Fin-type semiconductor device and manufacturing method
One embodiment of a semiconductor device includes a fin at a first side of a semiconductor body, a body region of a second conductivity type in at least a part...
Semiconductor device having peripheral trench structures
The disclosure relates to a semiconductor device including a semiconductor body, having a first surface, a gate electrode structure, which includes...
HEMT with compensation structure
A high electron mobility transistor includes a source, a gate and a drain, a first III-V semiconductor region, and a second III-V semiconductor region below the...
Metalization of a field effect power transistor
A metalization of a field effect power transistor having lateral semiconductor layers on an insulator substrate or an intrinsically conducting semiconductor...
Semiconductor device and method for manufacturing a semiconductor device
A method includes providing a semiconductor wafer including multiple semiconductor chips, forming a first scribe line on a frontside of the semiconductor wafer,...
Switch circuit and semiconductor device
In an embodiment, a switch circuit includes an input drain node, an input source node and an input gate node, and a high voltage transistor having a current...
Semiconductor packages utilizing leadframe panels with grooves in
According to an exemplary implementation, a method includes utilizing a leadframe panel comprising a plurality of leadframe modules, each of the plurality of...
Electronic device and method for fabricating an electronic device
An embodiment method for fabricating electronic devices having two components connected by a metal layer includes applying a metal layer to each component and...
Semiconductor device having a corrosion-resistant metallization and method
for manufacturing thereof
A semiconductor device includes a semiconductor substrate having a first side, a second side opposite the first side, an active area, an outer rim, and an edge...
Semiconductor device with self-aligned contact plugs
A semiconductor device includes subsurface structures extending from a main surface into a semiconductor portion, each subsurface structure including a gate...
Power semiconductor module having low gate drive inductance flexible board
A power semiconductor module includes a metallization layer and a power semiconductor die attached to the metallization layer. The die has a first terminal and...
Method of manufacturing an integrated circuit having field effect
transistors including a peak in a body dopant...
An integrated circuit having field effect transistors and manufacturing method. One embodiment provides an integrated circuit including a first FET and a second...
Semiconductor device including a dielectric material
A method for manufacturing a semiconductor device includes providing a carrier and a semiconductor wafer having a first side and a second side opposite to the...
Off-axis magnetic field angle sensors
Embodiments relate to magnetic field angle sensing systems and methods. In an embodiment, a magnetic field angle sensing system configured to determine a...
System-on-chip with master/slave debug interface
A System-on-Chip (SOC) debugging system comprising a plurality of SOCs connected to a shared bus, at least one of the plurality of SOCs being a master SOC and...
Device having a plurality of driver circuits to provide a current to a
plurality of loads and method of...
In various embodiments, a device is provided. The device includes a substrate having a first side and a second side opposite the first side. The substrate...
System and method for generating an auxiliary voltage
In accordance with an embodiment, a circuit includes a first normally-on transistor having a drain coupled to a first switching output node, a normally-off...
Switching regulator with increased light load efficiency in pulse
frequency modulation mode
A switching regulator includes a multiphase converter which includes a plurality of main phases configured to covert a power supply voltage to a lower voltage...
Semiconductor device and method of manufacturing the same
A semiconductor device includes a vertical IGFET in a first area of a semiconductor body, the vertical IGFET having a drift zone between a body zone and a drain...
Method of manufacturing a semiconductor device
A method of manufacturing a semiconductor device includes forming a transistor in a semiconductor substrate having a first main surface. The transistor is...
Method of manufacturing a multi-channel HEMT
A method of manufacturing a transistor device includes forming a semiconductor heterostructure including a plurality of alternating two-dimensional electron...
Composite wafer for bonding and encapsulating an SiC-based functional
A composite wafer includes a substrate and a SiC-based functional layer. The substrate includes a porous carbon substrate core and an encapsulating layer...
Adjusting the charge carrier lifetime in a bipolar semiconductor device
Disclosed are a method and a semiconductor device. The method includes implanting recombination center atoms via a first surface into a semiconductor body, and...
Semiconductor switching device with different local threshold voltage
A semiconductor device includes a semiconductor substrate having a plurality of switchable cells defining an active area of the semiconductor device, an outer...
A layer arrangement in accordance with various embodiments may include: a first layer having a side; one or more nanoholes in the first layer that are open...
Super junction semiconductor device having columnar super junction regions
A super junction semiconductor device includes a semiconductor portion with a first surface and a second surface parallel to the first surface. The...
Depletion mode group III-V transistor with high voltage group IV enable
There are disclosed herein various implementations of a half-bridge or multiple half-bridge switch configurations used in a voltage converter circuit using at...
Electronic component with sheet-like redistribution structure
An electronic component comprising an electrically conductive chip carrier comprising an electrically insulating core structure at least partially covered with...
Integrated antennas in wafer level package
A semiconductor module comprises a wafer package comprising an integrated circuit (IC) device embedded within the wafer package and a layer comprising at least...
Chip arrangement and method of manufacturing the same
A chip arrangement is provided which comprises a carrier; and at least two chips arranged over the carrier; wherein a continuous insulating layer is arranged...
Stacked half-bridge package with a common leadframe
According to an exemplary embodiment, a stacked half-bridge package includes a control transistor having a control drain for connection to a high voltage input,...
Device and method for bypassing a first program code portion with a
replacement program code portion
A device comprises a processor configured to execute a sequence of program instructions, a first storage configured to store a first memory address, a second...
Touchdown monitoring for individual dies of a semiconductor wafer
A prober system comprises a chuck, sensor and processing circuit. The chuck is configured to horizontally move a semiconductor wafer having a plurality of dies...