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Patent # Description
US-6,951,822 Method for forming inside nitride spacer for deep trench device DRAM cell
A method is provided for forming an inside nitride spacer in a deep trench device DRAM cell. The method includes etching a stud from a semiconductor material...
US-6,950,995 Method of resolving mismatched graphical symbols in computer-aided integrated circuit design
A system and method for resolving mismatched graphical symbols in computer-aided design of integrated circuits during schematic migration. The system compares...
US-6,950,971 Using data compression for faster testing of embedded memory
A memory apparatus is configured by obtaining test information for each of group of memory locations within the memory apparatus, compressing the test...
US-6,950,921 Method for operating an integrated memory unit partitioned by an external control signal
A method for operating an integrated memory unit having a memory cell field includes the steps of, before a memory access, partitioning the memory cell field...
US-6,950,884 Device and method for bidirectional data transfer between two processors wherein DMA channel provides improved...
A device for the bidirectional transfer of data between two processors contains input and output control information memories for storing an item of binary...
US-6,950,784 Semiconductor structures and manufacturing methods
A semiconductor body having an alignment mark comprising a pair of sets of parallel lines disposed on the semiconductor body, the parallel lines in one of the...
US-6,950,643 Digital filter combination
The invention features a filter arrangement for filtering an input signal that includes a transmitter signal having a predetermined pulse shape at a receiving...
US-6,950,512 Circuit arrangement for forming the termination of an analogous subscriber line
The invention relates to a circuit arrangement for forming the termination of an analogous subscriber line which comprises a first connection and a second...
US-6,950,482 Phase detector circuit for a phase control loop
A phase detector circuit for a phase control loop includes two EXOR circuits and an integrating loop filter which are connected to form one circuit. The two EXOR...
US-6,950,358 Circuit arrangement for setting a voltage supply for a test mode of an integrated memory
A circuit arrangement for setting a voltage supply for a test mode of an integrated memory contains a voltage generator circuit for generating a supply voltage...
US-6,950,328 Imprint suppression circuit scheme
A ferroelectric memory array includes a plurality of memory pages each formed of a plurality of ferroelectric memory cells. The ferroelectric memory cells are...
US-6,950,314 Arrangement for the electrical connection of an optoelectronic component to an electrical component
An arrangement including an optoelectronic component having terminal contacts, an electrical component having first electrical contacts and second electrical...
US-6,950,146 Method and circuit for inserting a picture into a video picture
In display apparatuses, particularly television receivers and monitors, a video picture can be inserted into a main picture (HB) from a first video signal (VS1),...
US-6,949,946 Integrated semiconductor circuit and method for functional testing of pad cells
An integrated semiconductor circuit includes pad cells each having a connecting pad and an output driver. A transmission response of the pad cells is to be...
US-6,949,940 Device for measurement and analysis of electrical signals of an integrated circuit component
According to the invention, one or more external test connection contact points (pads; pins; balls), are provided in an integrated circuit component (chip) (1),...
US-6,949,820 Substrate-based chip package
The invention relates to a substrate-based chip package, comprising a substrate on which a chip is fastened by a die-attach material. The substrate is provided...
US-6,949,812 Method for manufacturing a high frequency semiconductor structure and high frequency semiconductor structure
A semiconductor structure for high frequency operation has a substrate with a doped well formed therein and a buffer layer made of a substrate material covers...
US-6,949,799 Semiconductor structure comprising an electrostatic discharge (ESD) protection device
A semiconductor structure including a substrate, a device layer and a contact arranged on the substrate, comprises an ESD protective means, arranged between the...
US-6,949,797 Semiconductor structure comprising a magnetoresistor
A semiconductor structure comprises a substrate and a source region formed in the substrate. Further, a drain region is formed in the substrate. The drain region...
US-6,949,442 Methods of forming MIM capacitors
A method for forming a MIM capacitor and a MIM capacitor device formed by same. A preferred embodiment comprises selectively forming a first cap layer over a...
US-6,949,405 Method for producing channels and cavities in semiconductor housings, and an electronic component having such...
An electronic component is produced by incorporating a sacrificial part in a plastic housing shape. After molding, the sacrificial part is etched out or...
US-6,949,269 Method for producing vertical patterned layers made of silicon dioxide
A method is taught for fabricating patterned silicon dioxide layers on process areas disposed perpendicularly or at an inclination to a substrate surface....
US-6,948,847 Temperature sensor for a MOS circuit configuration
A temperature sensor for a MOS circuit configuration is implemented as the gate of a MOS transistor and configured as a two-terminal network with a gate input...
US-6,948,242 Process for producing a contact-making device
A process for producing a contact-making device is provided for making electrical contact between components, which includes the step of producing an electrical...
US-6,948,149 Method of determining the overlay accuracy of multiple patterns formed on a semiconductor wafer
From a plurality of overlay targets formed with patterns on a test wafer, subsets are formed and for each overlay target contained in the subsets, the...
US-6,948,014 Register for the parallel-serial conversion of data
Register for the parallel-serial conversion of data having a plurality of cyclically driven shift registers (2), each comprising series-connected data holding...
US-6,947,548 Driver circuit for subscriber terminals
Driver circuit for at least one subscriber terminal, comprising a first driver (14) for amplifying the power of a direct-voltage signal applied for supplying...
US-6,947,503 Method and circuit for synchronizing a receiver for a convolutionally coded reception signal
A method for synchronizing a receiver for a convolutionally coded reception signal having a sequence of received data symbols includes decoding the ...
US-6,947,478 Analogue echo filter
The invention relates to an analog echo filter for a modem, to which an analog transmit signal is supplied. According to the invention, a passive analog input...
US-6,947,468 Apparatus and method for calculating and implementing a Fibonacci mask for a code generator
An apparatus and method for calculating and implementing a Fibonacci mask for a code generator is disclosed herein. The first step receives a desired code offset...
US-6,947,414 Device for emitting the response of a synchronous system to an asynchronous event
An apparatus for immediately outputting a response of a synchronous system to an asynchronous event includes an advanced calculation device by means of which the...
US-6,947,344 Memory device and method of reading data from a memory cell
The present invention relates to a memory cell having a quasi-folded bit line sensing arrangement with an open bit line cell array. The memory cell array noise...
US-6,947,306 Backside of chip implementation of redundancy fuses and contact pads
A device having redundant circuit elements is provided with programmable fuse elements on the back surface of the chip. Openings are etched through the chip and...
US-6,947,303 Memory chip, memory component and corresponding memory module and method
The present invention creates a memory chip, a memory component and a corresponding memory module. The memory chip is equipped with a multiplicity of memory...
US-6,946,958 Contactless data storage medium
A contactless data storage medium has at least two antennas, in each case for different transmission bands. This makes it possible to configure a data storage...
US-6,946,889 Self alignment system for complement clocks
A self-alignment system for complement clock signals includes a first delay circuit and a second delay circuit. A first clock signal may be propagated through...
US-6,946,882 Current sense amplifier
A symmetrical high-speed current sense amplifier having complementary reference cells and configurable load devices that eliminates architecture-related...
US-6,946,878 Integrated circuit and circuit arrangement for converting a single-rail signal into a dual-rail signal
An integrated circuit that converts a single rail signal into a dual-rail signal includes a clock signal connection, a data input to which a single-rail signal...
US-6,946,848 Calibration configuration
A calibration configuration for setting an adjustable impedance has a voltage divider with a variable resistor and a resistor connected in series, which circuit...
US-6,946,735 Side-wall barrier structure and method of fabrication
The invention includes a wafer having a poly silicon plug passing through a CP-contact. The poly silicon plug is formed from a relatively heavily doped poly...
US-6,946,725 Electronic device having microscopically small contact areas and methods for producing the electronic device
An electronic device and a method for producing the electronic device which has at least one microscopically small contact area for an electronic circuit having...
US-6,946,721 Leadframe of a conductive material and component with a leadframe of a conductive material
A leadframe of a conductive material includes a central region to accommodate a chip and a plurality of connecting fingers extending at least from one side in...
US-6,946,386 Process for producing ultrathin homogenous metal layers
A method of forming an ultrathin homogenous metal layer that serves as base metallization for formation of contact locations and/or contact pads and/or wirings...
US-6,946,339 Method for creating a stepped structure on a substrate
In a method for creating a stepped structure on a substrate, which at least includes a first portion with a first thickness and a second portion with a second...
US-6,946,236 Negative resist process with simultaneous development and aromatization of resist structures
The invention relates to a process for producing amplified negative resist structures in which, following exposure and contrasting of the resist, the resist...
US-6,944,810 Method and apparatus for the testing of input/output drivers of a circuit
In order to test the input and output drivers of a circuit, in particular an integrated semiconductor circuit, a method and apparatus is provided to connect the...
US-6,944,587 Ethernet adapting apparatus
An Ethernet adapting apparatus for data transfer between a standard Ethernet data pump and an Ethernet medium access controller via telecommunication medium (4),...
US-6,944,573 Method and apparatus for the analysis of scratches on semiconductor wafers
For the analysis of scratches on semiconductor wafers, the semiconductor wafer surface is detected and a possible scratch position or a scratch course on the...
US-6,944,286 Ground key detection circuit and method for interference-resistant detection of the activation of a ground key...
A grounding key detecting device and method for interference-proof detection of the operation of grounding keys in telephones. A circuit that detects the...
US-6,944,220 Circuit configuration for the offset compensation of a signal
For the offset compensation of a digital signal, particularly of a communication signal transmitted in a cordless digital communication system, a recursive...
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