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Patent # Description
US-6,934,854 Circuit and method for protecting electronic devices
The access time for the use of an electronic device, for example a chip, is prolonged after each unauthorized access attempt. The access time is determined by...
US-6,934,843 Method for authenticating at least one subscriber during a data interchange
A method for authenticating at least one subscriber during a data interchange between at least two subscribers is described. In the method, a first subscriber...
US-6,934,645 Temperature sensor scheme
The present invention is a random access memory device including a temperature sensing circuit, and method of using the same. The temperature sensing circuit...
US-6,934,319 Configurable multimode despreader for spread spectrum applications
A configurable multimode despreader for spread spectrum applications is disclosed herein. The despreader includes a plurality of data lines, at least one...
US-6,934,304 T1/E1 framer array
A system and method for frame detection and generation. Each incoming clock-data stream is divided into two independent data streams: a clock path which...
US-6,934,205 Bist for parallel testing of on chip memory
A processor assisted memory BIST to identify detective memory addresses. The processor generates the address to be tested and the BIST generates the test data...
US-6,934,197 Method and circuit configuration for digitizing a signal in an input buffer of a DRAM device
A method and circuit configuration for digitizing data and control signals using an input buffer in a dynamic random access memory (DRAM) device. In one...
US-6,933,872 Digital/analog converter circuit with a device for compensating nonlinear distortions
A digital/analog converter circuit (1) comprises a precompensation stage (10), a PCM/PWM converter stage (7) and a digital/analog converter stage (8), these...
US-6,933,807 Acoustic reflector for a BAW resonator providing specified reflection of both shear waves and longitudinal waves
A BAW resonator includes a piezoelectric layer, a first electrode, a second electrode, a substrate, and an acoustic reflector disposed between the substrate and...
US-6,933,798 Trimming method and trimming device for a PLL circuit for two-point modulation
In the case of a trimming method for a PLL circuit operating based on the principle of a two-point modulation, the PLL circuit is locked without any modulation...
US-6,933,768 Method for increasing the input voltage of an integrated circuit with a two-stage charge pump, and integrated...
Integrated circuits with charge pumps are frequently used for supplying integrated circuits, in particular memory circuits, with energy. When the input voltages...
US-6,933,742 Chip card circuit with monitored access to a test mode
A circuit for monitoring an entry into a test mode of a chip circuit has a fusible link which can be fired via a firing transistor. A flipflop, which permits...
US-6,933,595 Electronic device and leadframe and methods for producing the electronic device and the leadframe
The invention relates to an electronic device and a leadframe and to methods for producing the electronic device and the leadframe. The electronic device has a...
US-6,933,549 Barrier material
A barrier layer protecting, for example, a ferroelectric capacitor from hydrogen is described. The barrier layer comprises aluminum oxide with barrier...
US-6,933,443 Method for bonding ceramic to copper, without creating a bow in the copper
An electronic device and method of forming said device are presented, in which the device comprises a base having a pair of elongate flanges and a channel...
US-6,933,240 Method for patterning a layer of silicon, and method for fabricating an integrated semiconductor circuit
A hard mask made from polysilicon is used to etch a layer to be patterned. The hard mask is patterned using a resist mask. The etching of the hard mask is...
US-6,933,206 Trench isolation employing a high aspect ratio trench
An isolation trench formed in a semiconductor substrate and is filled with at least one insulating liner layer that is deposited along sidewalls and a bottom...
US-6,932,916 Semiconductor substrate with trenches of varying depth
A method for etching trenches having different depths on a semiconductor substrate includes providing a mask with first and second openings. The first and second...
US-6,932,674 Method of determining the endpoint of a planarization process
A method of determining the endpoint of a planarizing process is disclosed. An endpoint detection signal is selectively sampled from at least one predetermined...
US-6,931,054 Method for estimating channel parameters of radio channels of a W-CDMA mobile radio system
A method for estimating channel parameters of radio channels of a W-CDMA mobile radio system, for example in accordance with the UMTS standard includes...
US-6,931,020 Method and device for switching a plurality of packet-oriented signals
A method for switching a plurality of packet-oriented signals and an apparatus for performing the method includes supplying a signal to port units, each having...
US-6,930,930 Using isolated p-well transistor arrangements to avoid leakage caused by word line/bit line shorts
Leakage in semiconductors, such as dynamic random access memory (DRAM) devices, caused by word line/bit line shorts can be avoided by locating transistors (e.g.,...
US-6,930,915 Cross-point MRAM array with reduced voltage drop across MTJ's
A method of storing information in a cross-point magnetic memory array and a cross-point magnetic memory device structure. The voltage drop across magnetic...
US-6,930,622 Voltage level converter device
A voltage level converter device for the conversion of an input signal, which is at a first voltage level, into an output signal, which is at a second voltage...
US-6,930,567 Transmission system
The present invention provides a transmission system having a signal source which has an internal resistance, having a signal transmission line (102), one end of...
US-6,930,540 Integrated circuit with voltage divider and buffered capacitor
An integrated circuit has a voltage divider that is configured to save current. The circuit includes a capacitor that is inventively connected to a potential...
US-6,930,539 Reference voltage circuit and method of generating a reference voltage
A reference voltage circuit has a reference voltage source, a charge storage device and also switching devices, which enable occasional operation of the...
US-6,930,501 Method for determining an ESD/latch-up strength of an integrated circuit
A method for determining an ESD/latch-up strength of an integrated circuit includes producing an integrated circuit and a test structure using the same...
US-6,930,383 Electronic component including a housing and a substrate
The invention relates to an electronic component including a housing and a first substrate having at least one integrated circuit, a multiplicity of contact...
US-6,930,357 Active SOI structure with a body contact through an insulator
A silicon on insulator shaped structure formed to reduce floating body effect comprises a T-shaped active structure and a body contact for back bias. Etching a...
US-6,930,345 Increase in deep trench capacitance by a central ground electrode
A semiconductor device includes a trench formed in a substrate, and a diffusion region surrounding the trench to form a buried plate. A first conductive material...
US-6,930,325 Test structure for improved vertical memory arrays
An integrated circuit arrangement that has an integrated test structure is provided. The integrated circuit arrangement includes a transistor array having...
US-6,930,324 Device architecture and process for improved vertical memory arrays
An array process diagnosis test structure for an integrated circuit including a transistor array composed of vertical FET memory cell access transistors, which...
US-6,930,052 Method for producing an integrated circuit having at least one metalicized surface
In order to fabricate a metallization plane with lines and contacts, four dielectric layers are applied to a substrate. Firstly, contact holes are etched through...
US-6,930,042 Method for producing a semiconductor component with at least one encapsulated chip on a substrate
A method for producing a semiconductor component includes coating a substrate with a metalization. The metalization is structured in such a way that...
US-6,928,892 Configuration for determining a concentration of contaminating particles in a loading and unloading chamber of...
A configuration for measuring the concentration of contaminating particles at high time resolution in the mini environments of loading and unloading chambers of...
US-6,928,286 Method of frequency synchronization in a wireless communications system and configuration for implementing the...
The wireless communications system synchronizes the current frequency and permits communication under the DECT protocol between a mobile unit and a fixed base...
US-6,928,210 Apparatus for demultiplexing optical signals at a large number of wavelengths
An apparatus for demultiplexing optical signals at a large number of wavelengths using at least one wavelength-selective filter includes at least two...
US-6,928,159 Telephone for connection to a public telephone network
In the case of the inventive telephone, telephone operating signals (bell signal, charge-unit signals and caller identifiers) and audio signals are processed...
US-6,928,025 Synchronous integrated memory
An output circuit (OUT) can be activated via an activation input (AKT), in the activated state starts an output process for data (D) to be read out, in...
US-6,928,024 RAM memory circuit and method for memory operation at a multiplied data rate
A RAM memory circuit has at least one memory bank with a multiplicity of memory cells arranged like a matrix in rows and columns and is subdivided into...
US-6,928,012 Bitline equalization system for a DRAM integrated circuit
A system for pre-charging and equalizing potentials on a bitline pair in a DRAM integrated circuit. The system includes an equalization circuit at one position...
US-6,927,982 Method of connecting a device to a support, and pad for establishing a connection between a device and a support
In a method of connecting a device to a support, in which method the device comprises at least a first terminal region, and in which method the support comprises...
US-6,927,718 Circuit arrangement and method for reducing an alignment error in a .SIGMA.-.DELTA. modulator
The invention proposes includes a circuit that operates continuously in the time domain on the basis of the sigma-delta principle. The circuit includes at least...
US-6,927,709 Transmission and reception interface and method of data transmission
An N-bit word is produced from an M-bit code received on an M-bit line, M being larger than N, the M-bit code comprising at least an M-bit code word and a...
US-6,927,662 Integrated transformer configuration
The present invention relates to an integrated transformer configuration having a first coil formed from an electrically conductive material having a spiral...
US-6,927,572 Method and apparatus for the compensation of dynamic error signals of a chopped hall sensor
A method for compensation of dynamic error signals of a chopped Hall sensor that comprises at least one Hall sensor element comprising a plurality of terminal...
US-6,927,569 Techniques for electrically characterizing tunnel junction film stacks with little or no processing
Probes are electrically connected to a surface of a tunnel junction film stack comprising a free layer, a tunnel barrier, and a pinned layer. Resistances are...
US-6,927,557 Voltage generator arrangement
A voltage generator arrangement supplies a largely constant output voltage with a high current driver capability. A bandgap reference circuit drives a voltage...
US-6,927,487 Protective device with spacer for subassemblies
A protective device is provided for subassemblies having a substrate and a component disposed thereon and needing to be protected. The component typically is a...
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