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Patent # Description
US-6,947,478 Analogue echo filter
The invention relates to an analog echo filter for a modem, to which an analog transmit signal is supplied. According to the invention, a passive analog input...
US-6,947,468 Apparatus and method for calculating and implementing a Fibonacci mask for a code generator
An apparatus and method for calculating and implementing a Fibonacci mask for a code generator is disclosed herein. The first step receives a desired code offset...
US-6,947,414 Device for emitting the response of a synchronous system to an asynchronous event
An apparatus for immediately outputting a response of a synchronous system to an asynchronous event includes an advanced calculation device by means of which the...
US-6,947,344 Memory device and method of reading data from a memory cell
The present invention relates to a memory cell having a quasi-folded bit line sensing arrangement with an open bit line cell array. The memory cell array noise...
US-6,947,306 Backside of chip implementation of redundancy fuses and contact pads
A device having redundant circuit elements is provided with programmable fuse elements on the back surface of the chip. Openings are etched through the chip and...
US-6,947,303 Memory chip, memory component and corresponding memory module and method
The present invention creates a memory chip, a memory component and a corresponding memory module. The memory chip is equipped with a multiplicity of memory...
US-6,946,958 Contactless data storage medium
A contactless data storage medium has at least two antennas, in each case for different transmission bands. This makes it possible to configure a data storage...
US-6,946,889 Self alignment system for complement clocks
A self-alignment system for complement clock signals includes a first delay circuit and a second delay circuit. A first clock signal may be propagated through...
US-6,946,882 Current sense amplifier
A symmetrical high-speed current sense amplifier having complementary reference cells and configurable load devices that eliminates architecture-related...
US-6,946,878 Integrated circuit and circuit arrangement for converting a single-rail signal into a dual-rail signal
An integrated circuit that converts a single rail signal into a dual-rail signal includes a clock signal connection, a data input to which a single-rail signal...
US-6,946,848 Calibration configuration
A calibration configuration for setting an adjustable impedance has a voltage divider with a variable resistor and a resistor connected in series, which circuit...
US-6,946,735 Side-wall barrier structure and method of fabrication
The invention includes a wafer having a poly silicon plug passing through a CP-contact. The poly silicon plug is formed from a relatively heavily doped poly...
US-6,946,725 Electronic device having microscopically small contact areas and methods for producing the electronic device
An electronic device and a method for producing the electronic device which has at least one microscopically small contact area for an electronic circuit having...
US-6,946,721 Leadframe of a conductive material and component with a leadframe of a conductive material
A leadframe of a conductive material includes a central region to accommodate a chip and a plurality of connecting fingers extending at least from one side in...
US-6,946,386 Process for producing ultrathin homogenous metal layers
A method of forming an ultrathin homogenous metal layer that serves as base metallization for formation of contact locations and/or contact pads and/or wirings...
US-6,946,339 Method for creating a stepped structure on a substrate
In a method for creating a stepped structure on a substrate, which at least includes a first portion with a first thickness and a second portion with a second...
US-6,946,236 Negative resist process with simultaneous development and aromatization of resist structures
The invention relates to a process for producing amplified negative resist structures in which, following exposure and contrasting of the resist, the resist...
US-6,944,810 Method and apparatus for the testing of input/output drivers of a circuit
In order to test the input and output drivers of a circuit, in particular an integrated semiconductor circuit, a method and apparatus is provided to connect the...
US-6,944,587 Ethernet adapting apparatus
An Ethernet adapting apparatus for data transfer between a standard Ethernet data pump and an Ethernet medium access controller via telecommunication medium (4),...
US-6,944,573 Method and apparatus for the analysis of scratches on semiconductor wafers
For the analysis of scratches on semiconductor wafers, the semiconductor wafer surface is detected and a possible scratch position or a scratch course on the...
US-6,944,286 Ground key detection circuit and method for interference-resistant detection of the activation of a ground key...
A grounding key detecting device and method for interference-proof detection of the operation of grounding keys in telephones. A circuit that detects the...
US-6,944,220 Circuit configuration for the offset compensation of a signal
For the offset compensation of a digital signal, particularly of a communication signal transmitted in a cordless digital communication system, a recursive...
US-6,944,049 Magnetic tunnel junction memory cell architecture
A memory device includes a magnetic tunnel junction memory cell having a magnetic tunnel junction structure and a read switch. In one example, the read switch is...
US-6,944,044 Method for reading out or in a status from or to a ferroelectrical transistor of a memory cell and memory matrix
The state is read out from the ferroelectric transistor or stored in the ferroelectric transistor. During the read-out or storage of the state, at least one...
US-6,943,647 Bulk acoustic wave filter with a roughened substrate bottom surface and method of fabricating same
A filter device comprises a substrate having a top surface and a bottom surface, and at least one acoustic wave situated on the top surface of the substrate,...
US-6,943,639 Arrangement for low power clock generation
A high accuracy crystal oscillator for generating a clock signal comprises a gain stage (2) controlled by a current from a current source (5), and a trimmable...
US-6,943,604 Device and method for correcting the duty cycle of a clock signal
A device for correcting the duty cycle of a clock signal with a duty cycle modifying device which receives a clock signal and a complementary clock signal, which...
US-6,943,601 Method and device for phase detection
A phase detection system is used in particular in a Delay-Locked Loop (DLL) to generate, as a function of phase differences of different signals (1, 2, 3), at...
US-6,943,593 Sample-and-hold device and method for the operation of a sample-and-hold device
In the case of a sample-and-hold device a holding condenser is fed with an input voltage via a controllable sampling switch. To improve the transient ...
US-6,943,505 Driving device for a light-emitting component and a method for driving a light-emitting component
The invention pertains to a driving device, for a light-emitting component, which can be universally used and is user-friendly. The driving device for a...
US-6,943,396 Electro-static discharge protection circuit and method for making the same
As disclosed herein, an electrostatic discharge (ESD) protection circuit is provided for an integrated circuit including a semiconductor substrate. The ESD...
US-6,943,393 Memory cell arrangement and method of fabricating it
Memory cell arrangement having a memory cell array which has at least one layer of magnetoresistive memory components (11) which are each connected to first...
US-6,943,116 Method for fabricating a p-channel field-effect transistor on a semiconductor substrate
A p-channel field-effect transistor is formed on a semiconductor substrate. The transistor has an n-doped gate electrode, a buried channel, a p-doped source and...
US-6,943,114 Integration scheme for metal gap fill, with fixed abrasive CMP
In a method of planarizing a semiconductor wafer, the improvement comprising polishing above metal interconnect lines to uniformly polish the topography of the...
US-6,943,113 Metal chemical polishing process for minimizing dishing during semiconductor wafer fabrication
A two-step chemical mechanical polishing (CMP) process is provided to minimize (reduce) dishing of metal lines in trenches in an insulation (oxide) layer of each...
US-6,943,101 Manufacturing of a corrosion protected interconnect on a substrate
A method for fabricating an interconnect on a surface of a passivated substrate includes applying a diffusion barrier to the surface of the passivated substrate...
US-6,940,775 Integrated dynamic memory having a control circuit for controlling a refresh mode for memory cells
An integrated dynamic memory includes memory cells which are combined to form individual independently addressable units, and a control circuit for controlling a...
US-6,940,774 Integrated dynamic memory and operating method
An integrated dynamic memory includes a memory cell array having memory cells for storing a charge corresponding to an information bit. The memory cell array has...
US-6,940,773 Method and system for manufacturing DRAMs with reduced self-refresh current requirements
A method and system for reducing self-refresh current requirements in a includes a DRAM chip that is sectioned into a number of segments. The entire DRAM chip is...
US-6,940,755 Semiconductor with an improved read device and operational mode associated therewith
A selection transistor for a group of memory cells, preferably composed of 16-32 memory cells, is respectively introduced into the feed lines to the memory cells...
US-6,940,720 Integrated circuit having a thermally shielded electric resistor trace
An integrated circuit includes an electric resistor trace, a substrate and a thermally conductive structure arranged above or below the electric resistor trace...
US-6,940,583 Method and apparatus for amplitude filtering in the frequency plane of a lithographic projection system
A method of projecting a pattern from a mask onto a substrate comprises providing an energy source, a substrate, and a mask containing a pattern of features to...
US-6,940,156 Electronic module with a semiconductor chip which has flexible chip contacts, and method for producing the...
An electronic module contains a semiconductor chip that has flexible chip contacts. The flexible chip contacts are disposed on an uppermost metallization layer...
US-6,940,126 Field-effect-controllable semiconductor component and method for producing the semiconductor component
A semiconductor component has at least one first terminal zone of a first conductivity type in a semiconductor body. The first terminal zone is contact-connected...
US-6,940,123 Memory cell array
In a matrix-shaped configuration of memory transistors, word lines are disposed on a top side of a semiconductor body and are parallel to one another. Bit lines...
US-6,940,121 Semiconductor memory cell
A semiconductor memory cell includes a semiconductor substrate that defines a trench having trench walls. The semiconductor memory cell also includes a floating...
US-6,940,115 Memory cell having a second transistor for holding a charge value
A memory cell has a transistor, a capacitor, and a second transistor that is formed as a parasitic field-effect transistor. The parasitic field-effect transistor...
US-6,940,111 Radiation protection in integrated circuits
Reduced radiation damage to an IC feature is disclosed. At least a portion of the feature which is sensitive to radiation is covered by a radiation protection...
US-6,939,805 Method of etching a layer in a trench and method of fabricating a trench capacitor
To fabricate a trench capacitor in a substrate, a trench is formed in the substrate. The trench has an upper region and a lower region. In the trench, first of...
US-6,939,763 DRAM cell arrangement with vertical MOS transistors, and method for its fabrication
DRAM cell arrangement with vertical MOS transistors, and method for its fabrication. Channel regions arranged along one of the columns of a memory cell matrix...
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