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Patent # Description
US-6,924,680 DLL circuit for stabilization of the initial transient phase
A DLL circuit for phase matching of a periodic input signal, having a variable delay unit, having a delay element and having a regulation unit which has a...
US-6,924,675 Buffer device
A buffer device includes a plurality of latch stages which each have a latch device and a multiplexer. At least the multiplexer of the first latch stage on the...
US-6,924,668 Differential to single-ended logic converter
The present invention is a converter stage for converting a differential logic input signal and a corresponding common mode differential logic signal each having...
US-6,924,532 Field-effect power transistor
The present invention provides a field-effect power transistor having a first semiconductor region (10) with first channels (20) having a large ratio of a...
US-6,924,521 Semiconductor device comprising a capacitor using a ferroelectric material
A semiconductor device comprises a bottom electrode, a top electrode, and a dielectric film provided between the bottom electrode and the top electrode and made...
US-6,924,519 Semiconductor device with perovskite capacitor
There is disclosed a semiconductor device comprising a semiconductor substrate, and a capacitor provided above the semiconductor substrate and comprising a...
US-6,924,225 Method for producing an electrically conductive contact
An electrically conductive contact can be used to connect an integrated component to an interconnect. A sacrificial layer is deposited on a liner and planarized...
US-6,924,209 Method for fabricating an integrated semiconductor component
A method for the fabrication of an integrated semiconductor component, in which at least one isolation trench is formed, a first layer of a nonconductive...
US-6,924,177 Method for producing a thyristor
A thyristor having a first zone, a second zone, a third zone, and a fourth zone. At least one control electrode is connected to the second and/or third zone. In...
US-6,924,156 Method for forming a ferroelectric capacitor device
A ferroelectric capacitor device, such as an FeRAM device is formed by forming a substrate extending in a first plane and comprising a number of layers of...
US-6,922,764 Memory, processor system and method for performing write operations on a memory region
A memory is provided which has a memory region for storing data, an input for receiving a data bundle with a plurality of temporally sequential data blocks and...
US-6,922,436 Method and apparatus for clock timing recovery in .chi.DSL particularly VDSL modems
Method and modem for fast timing recovery of transmitted data between a master .chi.DSL modem and a slave .chi.DSL modem, over a noisy, high loss, high...
US-6,922,424 Laser device
A laser device has a laser diode with an optical resonator. The resonator has an exit side for emitting light into an optical system. A monitor diode is provided...
US-6,922,365 Read-out circuit for a dynamic memory circuit, memory cell array, and method for amplifying and reading data...
A read-out circuit for a dynamic memory circuit has an interchanging circuit. The interchanging circuit can apply the bit lines that are connected to the storage...
US-6,922,344 Device for connecting the terminal pins of a package for an optical transmitting and/or receiving device to a...
The device has a package with a base plate, and at least two terminal pins perpendicularly protruding from the base plate of the package. At least one of the...
US-6,922,338 Memory module with a heat dissipation means
A memory module includes a board, a memory device attached to the board, and a heat dissipation means arranged between the memory device and the board.
US-6,922,232 Test system for laser diode far-field pattern measurement
A test system for positioning and measuring the far-field pattern of a laser diode under test (LDUT) using a single objective lens and two relay lenses....
US-6,922,081 Electronic circuit, sensor arrangement and method for processing a sensor signal
In a first phase a first sensor signal, essentially comprising the current offset signal of the sensor, is applied to the input of an electronic circuit. The...
US-6,922,073 Circuit configuration for signal balancing in antiphase bus drivers
A circuit configuration for signal balancing in antiphase bus drivers, particularly for a CAN bus, which have, in each driver path of the bus, a driver amplifier...
US-6,921,691 Transistor with dopant-bearing metal in source and drain
A transistor and method of manufacturing thereof. A gate dielectric and gate are formed over a workpiece, and the source and drain regions of a transistor are...
US-6,920,582 Method and apparatus for testing circuit modules
A method and apparatus for testing by sampling vectors circuit modules designated as channel models or as control modules and containing scan chains. Use is made...
US-6,920,523 Bank address mapping according to bank retention time in dynamic random access memories
A system and method for refreshing data in a dynamic random access memory ("DRAM") is provided, where the system includes a data memory having a plurality of...
US-6,920,473 Method and apparatus for modular multiplying and calculating unit for modular multiplying
A multiplicand is multiplied by a multiplier using a modulus. The multiplicand, the multiplier and the modulus are polynomials of variable. A multiplication...
US-6,920,342 Electronic device having an operating mode and an energy saving standby mode, and a method for switching...
An electronic device has an operating mode and an energy saving standby mode. The electronic device includes an input-side antenna element for receiving a signal...
US-6,920,336 Broadband driver
Broadband driver for signals that are transmitted in different frequency ranges, comprising: (a) a first broadband driver circuit (19) for driving first signals...
US-6,920,074 Method for reading a memory cell in a semiconductor memory, and semiconductor memory
In a semiconductor memory, there is capacitive coupling between bit lines that largely run in parallel. Outer sections of the bit lines are connected via...
US-6,920,059 Reducing effects of noise coupling in integrated circuits with memory arrays
A method for reducing noise coupling in a memory array is disclosed. The memory array includes a plurality memory cells interconnected by wordlines, bitlines,...
US-6,919,767 Circuit arrangement for low-noise fully differential amplification
The invention relates to a circuit for low noise, fully differential amplification. A feedback signal (121) is detected in a differential output step of the...
US-6,919,755 Voltage regulator
The invention relates to a voltage regulating circuit arrangement for converting a first voltage (VEXT) applied to an input of said voltage regulating circuit...
US-6,919,618 Shielding device for integrated circuits
A shielding device includes optical and/or electrical shielding disposed on the side of the integrated circuit in the semiconductor chip facing the substrate....
US-6,919,269 Production method for a semiconductor component
A method for fabricating a semiconductor component includes: deposition of a polysilicon layer on a substrate, deposition of a precursor layer on the polysilicon...
US-6,919,264 Method for the solder-stop structuring of elevations on wafers
A method is provided for the solder-stop structuring of elevations on wafers, such as 3D contact structures in the form of resilient or compliant contact bumps,...
US-6,919,255 Semiconductor trench structure
A method for fabricating a semiconductor trench structure includes forming a trench in a semiconductor substrate and filling it with a filler. A first thermal...
US-6,919,234 Method for producing an antifuse in a substrate and an antifuse structure for integration in a substrate
Method for producing an antifuse in a substrate, a first interconnect being applied to the substrate, a dielectric layer being applied at an end face of the...
US-6,919,232 Process for producing a semiconductor chip
A process for producing a semiconductor chip having contact elements protruding on one chip side within the context of wafer level packaging, the chip side...
US-6,919,147 Production method for a halftone phase mask
The present invention provides a production method for a halftone phase mask which has an SiO.sub.2 substrate, an overlying refractory metal Si.sub.x N.sub.y...
US-6,918,778 Configuration, plug-in mount and contact element for fixing and contacting switching assemblies on a substrate
Contact elements of a plug-in mount are connected in an electrically conducting manner to conductive contact zones on a surface of a substrate after the plug-in...
US-6,918,535 Security paper, method and device for checking the authenticity of documents recorded thereon
A safety paper with an embedded electronic circuit (1, 4, 7) is used to create more effective forgery-proof securities such as bank notes. In order to check...
US-6,917,563 Integrated memory
An integrated memory contains an access controller for controlling an access for the purpose of reading data from, or writing data to, a memory cell array. The...
US-6,917,562 Semi-conductor component with clock relaying device
The invention involves a component with a connection (3b), as well as at least one further connection (3a), whereby differential input clock pulses (CLK,...
US-6,917,549 Integrated memory and method for operating it
An integrated memory has a memory cell array having word lines and bit lines. The bit lines are organized in bit line pairs. The bit lines of the bit line pairs...
US-6,917,234 Power switch arrangement and turn-off method therefor
The invention relates to a power switch arrangement having a semiconductor power switch connected by its load path serially in a load circuit, and a clamping...
US-6,917,214 Method for testing a plurality of devices disposed on a wafer and connected by a common data line
In a method for testing a plurality of devices, which are arranged on a wafer and connected to a common data line, wherein the devices are connectable to a test...
US-6,917,208 Method and test structure for determining resistances at a plurality of interconnected resistors in an...
A method for determining resistances at a plurality of interconnected resistors in an integrated circuit and a resistor configuration in which the resistors are...
US-6,917,100 Circuit module having interleaved groups of circuit chips
A circuit module has a carrier (10) and multiple stacks of circuit chips arranged on a surface of the carrier. Each stack has multiple circuit chips arranged in...
US-6,917,055 Optoelectronic component and method for producing an optoelectronic component
An optoelectronic component has at least one light source which is monolithically integrated in a semiconductor material, in particular having a laser diode. At...
US-6,916,729 Salicide formation method
A method of forming a salicide on a semiconductor device includes depositing a first refractory metal layer over a silicon region of a substrate, depositing a...
US-6,916,721 Method for fabricating a trench capacitor with an insulation collar
A method for fabricating a trench capacitor with an insulation collar in a substrate, which is electrically connected to the substrate on one side via a buried...
US-6,916,704 Multiple deposition of metal layers for the fabrication of an upper capacitor electrode of a trench capacitor
An upper capacitor electrode of a trench capacitor of a DRAM memory cell is formed at least in part as a result of a plurality of metal-containing layers being...
US-6,916,185 Connection of integrated circuit to a substrate
The present invention provides a method of connecting an integrated circuit to a substrate and a corresponding circuit arrangement. Connecting occurs by...
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