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Method for producing a protective cover for a device
In a method for producing a protective cover for a device which is formed in a substrate, a first cover layer is initially deposited on the substrate, the first...
Optical coupling unit and method for inserting optical wave guides into an
optical coupling unit
The invention relates to a coupling unit for optically coupling a multi-channel optical plug-in element to at least one opto-electronic converter of a...
7-tracks standard cell library
A 7-track standard cell library having a layout architecture that is designed for fabrication technologies having design rules of 0.12 microns or smaller. The...
Circuit configuration for receiving at least two digital signals
A circuit configuration has a calibration circuit, which is connected to terminals for two digital signals and has outputs for two digital output signals which...
Broadband driver circuit
Broadband driver circuit for driving voice and data signals, having a current dividing circuit (37), which divides a current generated by a current source (38),...
Semiconductor memory with address decoding unit, and address loading method
A semiconductor memory includes: at least two memory banks that each have a memory cell matrix, an address decoding unit which includes a bank address decoding...
Memory device and method of storing fail addresses of a memory cell
The embodiments of the present invention are directed to a self-repair schema for memory chips, using a sortable fail-count/fail-address register. The...
Circuit configuration for regenerating clock signals
A circuit configuration regenerates clock signals. The circuit configuration includes an input differential amplifier, first and second inverters, and an offset...
Driver circuit and method for operating a driver circuit
The invention relates to a driver circuit (10) for integrated circuits comprising at least one input node (11) for an input signal and at least one output node...
Methods and apparatus for active termination of high-frequency signals
An integrated circuit, comprising: at least one main circuit operable to perform one or more functions, and including at least one I/O node for receiving or...
Semiconductor component and method for its production
The invention proposes a semiconductor component with a semiconductor chip having a first main side with at least one contact pad thereon. A protective layer is...
A vertical or lateral semiconductor component derives a signal from a high load voltage. This signal can be used directly for driving the semiconductor component...
Multi substrate organic light emitting devices
An OLED device capable of emitting multiple colors is disclosed. In one embodiment of the invention, multiple substrates are stacked upon one another, wherein...
Method for the lateral contacting of a semiconductor chip
A description is given of a method for the lateral contacting of a semiconductor chip in which, in the case of a first semiconductor chip (11), which has an...
Measurement configuration including a vehicle and method for performing
measurements with the measurement...
A measurement device, i.e. a metrology tool, and a vehicle are combined to provide a mobile metrology in a fabrication facility. Peripheral equipment such as a...
Circuit and method for protecting electronic devices
The access time for the use of an electronic device, for example a chip, is prolonged after each unauthorized access attempt. The access time is determined by...
Method for authenticating at least one subscriber during a data interchange
A method for authenticating at least one subscriber during a data interchange between at least two subscribers is described. In the method, a first subscriber...
Temperature sensor scheme
The present invention is a random access memory device including a temperature sensing circuit, and method of using the same. The temperature sensing circuit...
Configurable multimode despreader for spread spectrum applications
A configurable multimode despreader for spread spectrum applications is disclosed herein. The despreader includes a plurality of data lines, at least one...
T1/E1 framer array
A system and method for frame detection and generation. Each incoming clock-data stream is divided into two independent data streams: a clock path which...
Bist for parallel testing of on chip memory
A processor assisted memory BIST to identify detective memory addresses. The processor generates the address to be tested and the BIST generates the test data...
Method and circuit configuration for digitizing a signal in an input buffer
of a DRAM device
A method and circuit configuration for digitizing data and control signals using an input buffer in a dynamic random access memory (DRAM) device. In one...
Digital/analog converter circuit with a device for compensating nonlinear
A digital/analog converter circuit (1) comprises a precompensation stage (10), a PCM/PWM converter stage (7) and a digital/analog converter stage (8), these...
Acoustic reflector for a BAW resonator providing specified reflection of
both shear waves and longitudinal waves
A BAW resonator includes a piezoelectric layer, a first electrode, a second electrode, a substrate, and an acoustic reflector disposed between the substrate and...
Trimming method and trimming device for a PLL circuit for two-point
In the case of a trimming method for a PLL circuit operating based on the principle of a two-point modulation, the PLL circuit is locked without any modulation...
Method for increasing the input voltage of an integrated circuit with a
two-stage charge pump, and integrated...
Integrated circuits with charge pumps are frequently used for supplying integrated circuits, in particular memory circuits, with energy. When the input voltages...
Chip card circuit with monitored access to a test mode
A circuit for monitoring an entry into a test mode of a chip circuit has a fusible link which can be fired via a firing transistor. A flipflop, which permits...
Electronic device and leadframe and methods for producing the electronic
device and the leadframe
The invention relates to an electronic device and a leadframe and to methods for producing the electronic device and the leadframe. The electronic device has a...
A barrier layer protecting, for example, a ferroelectric capacitor from hydrogen is described. The barrier layer comprises aluminum oxide with barrier...
Method for bonding ceramic to copper, without creating a bow in the copper
An electronic device and method of forming said device are presented, in which the device comprises a base having a pair of elongate flanges and a channel...
Method for patterning a layer of silicon, and method for fabricating an
integrated semiconductor circuit
A hard mask made from polysilicon is used to etch a layer to be patterned. The hard mask is patterned using a resist mask. The etching of the hard mask is...
Trench isolation employing a high aspect ratio trench
An isolation trench formed in a semiconductor substrate and is filled with at least one insulating liner layer that is deposited along sidewalls and a bottom...
Semiconductor substrate with trenches of varying depth
A method for etching trenches having different depths on a semiconductor substrate includes providing a mask with first and second openings. The first and second...
Method of determining the endpoint of a planarization process
A method of determining the endpoint of a planarizing process is disclosed. An endpoint detection signal is selectively sampled from at least one predetermined...
Method for estimating channel parameters of radio channels of a W-CDMA
mobile radio system
A method for estimating channel parameters of radio channels of a W-CDMA mobile radio system, for example in accordance with the UMTS standard includes...
Method and device for switching a plurality of packet-oriented signals
A method for switching a plurality of packet-oriented signals and an apparatus for performing the method includes supplying a signal to port units, each having...
Using isolated p-well transistor arrangements to avoid leakage caused by
word line/bit line shorts
Leakage in semiconductors, such as dynamic random access memory (DRAM) devices, caused by word line/bit line shorts can be avoided by locating transistors (e.g.,...
Cross-point MRAM array with reduced voltage drop across MTJ's
A method of storing information in a cross-point magnetic memory array and a cross-point magnetic memory device structure. The voltage drop across magnetic...
Voltage level converter device
A voltage level converter device for the conversion of an input signal, which is at a first voltage level, into an output signal, which is at a second voltage...
The present invention provides a transmission system having a signal source which has an internal resistance, having a signal transmission line (102), one end of...
Integrated circuit with voltage divider and buffered capacitor
An integrated circuit has a voltage divider that is configured to save current. The circuit includes a capacitor that is inventively connected to a potential...
Reference voltage circuit and method of generating a reference voltage
A reference voltage circuit has a reference voltage source, a charge storage device and also switching devices, which enable occasional operation of the...
Method for determining an ESD/latch-up strength of an integrated circuit
A method for determining an ESD/latch-up strength of an integrated circuit includes producing an integrated circuit and a test structure using the same...
Electronic component including a housing and a substrate
The invention relates to an electronic component including a housing and a first substrate having at least one integrated circuit, a multiplicity of contact...
Active SOI structure with a body contact through an insulator
A silicon on insulator shaped structure formed to reduce floating body effect comprises a T-shaped active structure and a body contact for back bias. Etching a...
Increase in deep trench capacitance by a central ground electrode
A semiconductor device includes a trench formed in a substrate, and a diffusion region surrounding the trench to form a buried plate. A first conductive material...
Test structure for improved vertical memory arrays
An integrated circuit arrangement that has an integrated test structure is provided. The integrated circuit arrangement includes a transistor array having...
Device architecture and process for improved vertical memory arrays
An array process diagnosis test structure for an integrated circuit including a transistor array composed of vertical FET memory cell access transistors, which...
Method for producing an integrated circuit having at least one metalicized
In order to fabricate a metallization plane with lines and contacts, four dielectric layers are applied to a substrate. Firstly, contact holes are etched through...
Method for producing a semiconductor component with at least one
encapsulated chip on a substrate
A method for producing a semiconductor component includes coating a substrate with a metalization. The metalization is structured in such a way that...