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Patent # Description
US-7,023,701 Device for cooling memory modules
A device for cooling memory modules can include a plurality of elements. The elements can thermal couple at least two memory modules. The device can further...
US-7,023,373 Multi-stage ADC with shared amplifier and reference voltage selection
The invention provides a clocked analog/digital converter for successive approximation which is designed using a jointly used amplifier and a dynamic range...
US-7,023,276 Differential amplifier circuit
A differential amplifier circuit has two input transistors, a load element, and a current source. A terminal for an input voltage is connected to a control...
US-7,023,191 Voltage regulator with adjustable output impedance
The invention relates to a voltage regulator having an output terminal (AK) for the provision of an output voltage and connection of a load, an output capacitor...
US-7,023,184 DC-DC converter with stabilized output voltage
A DC-DC converter is provided with a series circuit formed by an inductor and a capacitor, an output voltage for a load being tapped off across the capacitor and...
US-7,023,097 FBGA arrangement
The invention relates to an FBGA arrangement, comprising a substrate on which at least one chip is chip-bonded face-down, which has a central row of bonding pads...
US-7,023,086 Semiconductor component arrangement with a reduced oscillation tendency
The present invention relates to a circuit assembly with at least two semiconductor components, each having terminals, whereby at least one terminal of the first...
US-7,023,063 Arrangement of microstructures
A method referred to as a "cellular damascene method" utilizes a multiplicity of regularly arranged closed cavities referred to as "cells", which are produced in...
US-7,023,053 Differential transistor pair
A differential transistor pair comprises a plurality of transistor cells in a substrate. Each cell comprises first drain regions at the respective edge of the...
US-7,023,028 Protection structure for protection from electrostatic discharge and integrated circuit
An ESD protection structure for protecting an integrated circuit from electrostatic discharge, having a bipolar protection element, whose emitter is formed by an...
US-7,023,008 Resistive memory element
An electrically operated, resistive memory element includes a volume of resistive memory material, adapted to be switched between different detectable resistive...
US-7,022,917 Construction and electrical connection technique in textile structures
Method for electrically connecting an electrical conductor to an electronic component including the steps of providing a textile material in which at least one...
US-7,022,582 Microelectronic process and structure
The present invention relates to a process for integrating air as dielectric in semiconductor devices, comprising the steps of: a. applying a layer of a...
US-7,022,560 Method to manufacture high voltage MOS transistor by ion implantation
A method for fabrication of a high-voltage, high-frequency MOS-transistor combines a deep n-well and a p-well process and the formation of an extended drain...
US-7,022,549 Method for connecting an integrated circuit to a substrate and corresponding arrangement
An integrated circuit, in particular from a chip, a wafer or a hybrid, to a substrate. A package is provided for the integrated circuit, which has a connection...
US-7,022,209 PVD method and PVD apparatus
A PVD method and a PVD apparatus use a rotating magnetic field in order to increase the yield. The magnetic field is provided such that it essentially vanishes,...
US-7,020,806 Method for testing memory units to be tested and test device
The invention provides a method for testing a memory unit (113) to be tested in a test device (100), the memory unit (113) to be tested being introduced into the...
US-7,020,759 Device and method for associating information concerning memory cells of a memory with an external memory
In a device and a method associating information concerning first memory cells and second memory cells of a memory element with an external memory, with each...
US-7,020,730 Method for operating a microprocessor configuration and microprocessor configuration
A microprocessor configuration includes a central control and processing unit, a bus having a bus state line and data/address lines, and units connected to the...
US-7,020,229 Phase-locked loop
A phase-locked loop is described and has a phase detector that provides at its output per clock cycle a current pulse whose pulse duration is a measure of a...
US-7,020,149 Method for operating a switching system for data packets
A method for operating a switching system for data packets includes providing a switching system having inputs and outputs, temporarily storing data packets at...
US-7,019,981 Making contact with semiconductor chips in chip cards
A chip card having a chip card body, a semiconductor chip and a carrier substrate, the carrier substrate being provided on both sides with surface contacts and...
US-7,019,953 Voltage protection circuit
A voltage protection circuit for a terminal of an electronic device, for example the TIP and RING lines of a linecard, is provided. The voltage protection...
US-7,019,566 Bi-polar PNP chopper
A switch comprises an input with two input lines and an input stage comprising four current controlled PNP-transistors and four resistors, and an output...
US-7,019,554 Methods and apparatus for active termination of high-frequency signals
An integrated circuit includes at least one main circuit 313 operable to perform one or more functions. At least one termination node DQ receives or transmits an...
US-7,019,384 Integrated, tunable capacitance device
An integrated, tunable capacitance device includes a semiconductor region, which is, preferably, N-doped, formed in a semiconductor body, having an insulating...
US-7,019,382 Arrangement for ESD protection of an integrated circuit
To protect a high-frequency integrated circuit (1) against higher voltages than normal operating voltages on an input/output terminal connected to a bonding pad...
US-7,019,305 Biosensor circuit and sensor array consisting of a plurality of said biosensor circuits and biosensor array
Biosensor circuit arrangement including a substrate, a sensor element formed in or on a surface region of the substrate with a physical parameter, which is...
US-7,018,898 Non-volatile two transistor semiconductor memory cell and method for producing the same
The invention relates to a nonvolatile two-transistor semiconductor memory cell and an associated fabrication method, source and drain regions (2) for a...
US-7,018,893 Method for fabricating bottom electrodes of stacked capacitor memory cells
Bottom electrodes of stacked capacitor cells are formed by lining a patterned hard mask with a conductive layer. The hard mask is formed by a layered stack....
US-7,018,884 Method for a parallel production of an MOS transistor and a bipolar transistor
The present invention provides a method for parallel production of an MOS transistor in an MOS area of a substrate and a bipolar transistor in a bipolar area of...
US-7,018,784 Process for increasing the etch resistance and for reducing the hole and trench width of a photoresist...
The invention relates to a process for amplifying structured resists. The process permits a subsequent increase in the etch resistance and a change in the...
US-7,018,781 Method for fabricating a contact hole plane in a memory module
Disclosed is a method for fabricating a contract hole plane in a memory module with an arrangement of memory cells each having a selection transistor. The...
US-7,017,821 Individual configuration
An individual configuration contains at least a first structure and a second structure, which are aligned with respect to each other. A position sensing device...
US-7,017,429 Continuous test flow method and apparatus
A method for testing devices produced in front end lots involving loading a plurality of front end lots into a tester without requiring the tester to complete...
US-7,017,103 Device and method for Viterbi equalization with metric increments calculated in advance
A Viterbi equalizer for equalization of a data signal transmitted via a channel that is subject to interference has at least one add-compare-select unit (ACS),...
US-7,017,072 Protection circuit for an access-arbitrated bus system network
The invention relates to a protection circuit (12) for an access-arbitrated bus system network, comprising a fault detection device for detecting a fault status...
US-7,017,067 Method and bus system for synchronizing a data exchange between a data source and a control device
A method for synchronizing a data exchange between a data source and a control device is provided. A synchronization request signal is first transmitted via the...
US-7,017,048 Circuit configuration for generating current pulses in the supply current of integrated circuits
Differential power analysis on an integrated circuit is made more difficult by providing a circuit configuration for generating current pulses in the supply...
US-7,016,929 Method and device for calculating a result of an exponentiation
For calculating the result of an exponentiation B.sup.d, B being a base and d being an exponent which can be described by a binary number from a plurality of...
US-7,016,927 Method and apparatus for modular multiplication
In a method for modular multiplication of a multiplicand by a multiplier using a modulus, l multiplication shift values are initially determined by means of a...
US-7,016,750 Method, device, computer-readable storage medium and computer program element for monitoring of a manufacturing...
In the case of a method for monitoring of a manufacturing process of a plurality of physical objects, several rules which relate to at least one status of at...
US-7,016,683 Frequency scheme for data transmission systems
A data transmission system contains at least two stations between which data bursts are exchanged via radio. A frequency hop is provided between the first...
US-7,016,452 Delay locked loop
A delay locked loop includes a delay unit with a controllable delay time. Switching elements are provided in order to tap off output signals from the delay...
US-7,016,404 Automatic frequency correction for mobile radio receivers
A device and a method for automatic frequency correction are used in mobile radio receivers. After channel estimation has been performed, the phases of the...
US-7,016,259 Apparatus for calibrating the relative phase of two reception signals of a memory chip
A calibration apparatus is provided for adjusting the relative phase between two signals received at a memory chip, the two signals being generated such that...
US-7,016,244 Method and arrangement for testing output circuits of high speed semiconductor memory devices
For testing or for characterizing output drivers of output circuits of high-speed semiconductor memory devices under conditions close to an application, scan...
US-7,016,027 System and method for quantifying errors in an alternating phase shift mask
A method and system for detecting the quality of an alternating phase shift mask having a number of 180-degree phase shift areas alternating with a number of...
US-7,015,821 EEPROM memory matrix and method for safeguarding an EEPROM memory matrix
EEPROM memory matrix in which column lines are alternatively used as detector lines. A precharge voltage is applied to selected detector lines together with the...
US-7,015,567 Method for fabricating a semiconductor structure using a protective layer, and semiconductor structure
A method produces a semiconductor structure on a substrate. Then, a protective layer is applied to the semiconductor structure. To fabricate a further...
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