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Patent # Description
US-7,069,647 Method for populating a substrate with electronic components
A novel method and placement system are configured for populating a substrate with an electronic component. The placement system has a substrate holding device...
US-7,068,546 Integrated memory having a voltage generator circuit for generating a voltage supply for a read/write amplifier
An integrated memory contains a memory cell array, which has word lines and bit lines, and a read/write amplifier, which is connected to the bit lines for the...
US-7,068,533 Resistive memory cell configuration and method for sensing resistance values
A configuration of resistive memory cells is disclosed. In one embodiment, the configuration of resistive memory cells comprises a plurality of first current...
US-7,068,486 Half-bridge circuit and method for driving the half-bridge circuit
A half-bridge circuit has first and second semiconductor switches, which have load paths connected in series and which are driven in dependence on an input...
US-7,068,112 Phase-control circuit arrangement and method for operating said circuit arrangement
A circuit arrangement includes a phase locked loop configured to produce a controlled frequency. The phase locked loop has an actuating input and a control loop...
US-7,068,095 Amplifier circuit
The invention is directed to an amplifier circuit based on the principle of a class D amplifier. To avoid unwanted convolution effects and to improve the power...
US-7,068,079 Circuit device with clock pulse detection facility
The invention refers to a circuit device (1) with at least one connection (3b), to which a clock pulse (/CLK, /CLK.sub.T) can be applied, whereby the circuit...
US-7,068,059 Arrangement for producing an electrical connection between a BGA package and a signal source, and method for...
An arrangement for producing an electrical connection between a ball grid array (BGA) package and a signal source is disclosed. A flexible printed circuit board...
US-7,067,915 Electronic device with external contact elements and method for producing a plurality of the devices
An electronic device has external contact elements projecting from at least one external contact side of a plastic housing. The external contact elements have an...
US-7,067,840 Method and device for reducing the contact resistance in organic field-effect transistors by embedding...
A method for selectively doping an organic semiconductor 1material in the region of a contact area .1formed between a contact and the organic semiconductor...
US-7,067,372 Method for fabricating a memory cell having a trench
A memory cell has a trench, in which a trench capacitor is disposed. Furthermore a vertical transistor is formed in the trench above the trench capacitor. A...
US-7,067,234 Chemical consolidation of photoresists in the UV range
Structured resists are consolidated, that is post-exposure amplified. The amplifying agent used is a compound which contains at least one bicyclic or polycyclic...
US-7,065,687 Method for replacing defective memory cells in data processing apparatus
A method for replacing defective memory cells of a random access memory device of a data processing apparatus, in which, during the operation of the data...
US-7,065,204 Method for transmitting charging signals via a data transmission path using resonance phenomena
Method for transmitting charging signals via a data transmission path using resonance phenomena The invention provides a method for transmitting charging...
US-7,065,128 Apparatus and methods for sample selection and reuse of rake fingers in spread spectrum systems
An apparatus for reducing storage requirements and for allowing reuse of multiple rake fingers in a spread spectrum system includes a decimation circuit having...
US-7,064,999 Digital memory circuit having a plurality of memory banks
A digital memory circuit has at least two pairs of adjacent memory banks. Each of the banks has n parallel terminals for n read/write data lines. Each bank pair...
US-7,064,996 Refreshing dynamic memory cells in a memory circuit and a memory circuit
Methods and apparatus for refreshing a dynamic memory cell in a memory circuit are provided, wherein the required time between refresh operations may be...
US-7,064,809 Apparatus and method for processing wafers
An apparatus for processing semiconductor wafers includes: a wafer support with a first positioning system that can rotate the wafer support coaxially with a...
US-7,064,586 Input buffer circuit including reference voltage monitoring circuit
A buffer circuit includes a differential amplifier, a buffering inverter, and a reference voltage monitoring circuit. The differential amplifier has a reference...
US-7,064,439 Integrated electrical circuit and method for fabricating it
An integrated electrical circuit having a plurality of structure planes is described. Electrically active elements are situated on at least one element structure...
US-7,064,429 Electronic package having integrated cooling element with clearance for engaging package
An electronic component includes at least one semiconductor chip. The semiconductor chip is attached on a first side of a wiring board or a leadframe. The wiring...
US-7,064,377 Flash memory cell with buried floating gate and method for operating such a flash memory cell
A programmable read-only memory cell and method of operating the programmable read-only memory cell. In one embodiment, the programmable read-only memory cell...
US-7,064,373 Architecture and fabrication method of a vertical memory cell
A vertical memory cell comprises a storage capacitor, the inner electrode of which is formed in a deep trench, and a vertical selector transistor. The selection...
US-7,064,360 Bipolar transistor and method for fabricating it
A method is provided to fabricate a bipolar transistor with a low base connection resistance, low defect density and improved scalability. Scalability is to be...
US-7,064,176 Coating material for electronic components
The invention relates to novel polyhydroxyamide compounds that, in the form of their oxazoles, ane suited as a coating material, particularly for electronic...
US-7,063,921 Photomask, in particular alternating phase shift mask, with compensation structure
The invention relates to a method for the production of masks, in particular for the production of alternating phase shift masks (1), or of chromeless phase...
US-7,062,748 System and method of correcting mask rule violations after optical proximity correction
A method is provided for correcting rule violating areas of a photomask using a digital representation of the photomask. The method includes identifying...
US-7,062,701 Method for storing path metrics in a viterbi decoder
For a Virerbi decoder, it is proposed to combine the butterfly structures of the corresponding trellis diagram in pairs in such a way that for each butterfly...
US-7,062,690 System for testing fast synchronous digital circuits, particularly semiconductor memory chips
A system and a method for testing fast synchronous digital circuit with an additional built outside self test semiconductor chip disposed between a test device...
US-7,062,632 Method for controlling a central processing unit for addressing in relation to a memory and controller
The present invention is based on the finding that free CPU operation code identifiers of a CPU or CPU operation code identifiers useable for any reason can be...
US-7,062,606 Multi-threaded embedded processor using deterministic instruction memory to guarantee execution of pre-selected...
A multi-threaded embedded processor that includes an on-chip deterministic (e.g., scratch or locked cache) memory that persistently stores all instructions...
US-7,062,241 Signal processor and method for the system-independent digital evaluation of mobile communications reception...
Only a single, standard-independent clock rate is generated in a signal processor or a signal processing structure, and correspondingly only precisely one clock...
US-7,061,933 Multiplexer bus with local bus nodes
The invention relates to a multiplexer bus comprising local bus nodes. In order to connect a plurality of transmitting-receiving circuits, the latter are...
US-7,061,904 Integrated access device controller
A network processor (12) for a voice over Internet protocol phone integrates a universal serial bus port (56), a pair of IEEE 802.3 MACs (70a), a repeater (70b),...
US-7,061,797 Hybrid memory cell for spin-polarized electron current induced switching and writing/reading process using such...
A magnetoresistive hybrid memory cell includes first and second stacked structures. The first stacked structure includes a magnetic tunnel junction including...
US-7,061,787 Field ramp down for pinned synthetic antiferromagnet
Techniques for processing magnetic devices are provided. In one aspect, a method of processing a magnetic device including two or more anti-parallel coupled...
US-7,061,784 Semiconductor memory module
The invention relates to a semiconductor memory module having at least one memory chip and a buffer chip, which drives clock, address and command signals to the...
US-7,061,746 Semiconductor component with integrated capacitance structure having a plurality of metallization planes
A semiconductor component includes an insulating layer, which is configured on a semiconductor substrate and in which a capacitor structure is formed. The...
US-7,061,408 Concept for a secure data communication between electronic devices
An encoder for encoding a data word with a plurality of bits, wherein the data word is transmittable in parallel on a data bus, wherein one bit line is provided...
US-7,061,337 Amplitude control circuit
An amplitude control circuit comprises a first circuit configured to receive differential signals and provide a first signal based on the amplitudes of the...
US-7,061,305 Threshold voltage detector for process effect compensation
A process variation compensation circuit and method including a threshold voltage detector circuit, a comparator network, and a circuit block. The threshold...
US-7,061,296 Circuit arrangement for generating a digital clock signal
A circuit arrangement for generating a digital clock signal which manages without a crystal oscillator and has a low current consumption. The circuit arrangement...
US-7,061,272 Finite state machine circuit
A finite state machine (FSM) circuit including a random access memory (RAM) as the basic logical element and a multiplexer, which can be programmed to perform...
US-7,061,260 Calibration device for the calibration of a tester channel of a tester device and a test system
A calibration device for the calibration of a tester channel of a tester device is provided. The calibration device includes a connecting device and a planar...
US-7,061,227 Apparatus and method for calibrating a semiconductor test system
A process and device for calibrating a semiconductor component test system includes a first connection, at which a corresponding signal, in particular a...
US-7,061,098 Electronic component and method for its production
An electronic component includes a semiconductor die which exhibits on its active top side above an active surface area a self-supporting electrically conductive...
US-7,061,089 Memory module having space-saving arrangement of memory chips and memory chip therefore
A memory module has a module board having a main surface. A plurality of memory chips is arranged on the main surface of the module board. Each memory chip has...
US-7,061,046 Non-volatile semiconductor memory device
Bitline conductor tracks are arranged parallel to one another and electrically insulated from a substrate provided with a basic doping. A memory layer sequence,...
US-7,061,035 Self-aligned V0-contact for cell size reduction
An FeRAM comprising includes a ferroelectric material sandwiched between a top electrode and a bottom electrode. A V0-contact provides an electrical connection...
US-7,060,619 Reduction of the shear stress in copper via's in organic interlayer dielectric material
Interconnect layers on a semiconductor body containing logic circuits (microprocessors, Asics or others) or random access memory cells (DRAMS) are formed in a...
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