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Method for production of charge-trapping memory devices
The method aims at improving the charge confinement of the memory layer at the edges facing the regions of buried bitlines. After the deposition of the memory...
Fabrication method, varactor, and integrated circuit
A method in the fabrication of an integrated bipolar circuit for forming a p/n-junction varactor is disclosed. The method featuring the steps of providing a...
Method for preventing illegitimate use of chip cards
In order to detect attempted interventions in the vicinity of a smart card, a sensor hierarchy is used. Abnormal operating states are first detected by less...
Array of synchronized memory modules
A memory apparatus includes a memory module array having several memory modules. Each memory module has a synchronization connection for receiving a...
A random access memory with a low power mode indicator. The random access memory includes a state machine for generating a power mode output signal. A power mode...
Method of optimizing the timing between signals
A method of optimizing the timing between signals to be latched and a respective latching clock signal is suggested wherein test timings are provided according...
Circuit for electronically generating a call impedance
The present invention relates to a circuit for electronically generating a call impedance in telephone terminals, comprising a call alternating voltage that may...
Reducing the crest factor of a multicarrier signal
A method for reducing the crest factor of a multi-carrier signal includes evaluating an inverse Fourier transform of the multi-carrier signal, thereby generating...
Method and device for estimating motion in a digitized image with pixels
A method and arrangement are provided for motion estimation in a digitized picture having pixels, the pixels being grouped into picture blocks. The pixels can be...
Memory arrangement for processing data, and method
The invention relates to a memory arrangement for processing data and to a method for operating this memory arrangement. The inventive method involves a control...
Device for cooling memory modules
A device for cooling memory modules can include a plurality of elements. The elements can thermal couple at least two memory modules. The device can further...
Multi-stage ADC with shared amplifier and reference voltage selection
The invention provides a clocked analog/digital converter for successive approximation which is designed using a jointly used amplifier and a dynamic range...
Differential amplifier circuit
A differential amplifier circuit has two input transistors, a load element, and a current source. A terminal for an input voltage is connected to a control...
Voltage regulator with adjustable output impedance
The invention relates to a voltage regulator having an output terminal (AK) for the provision of an output voltage and connection of a load, an output capacitor...
DC-DC converter with stabilized output voltage
A DC-DC converter is provided with a series circuit formed by an inductor and a capacitor, an output voltage for a load being tapped off across the capacitor and...
The invention relates to an FBGA arrangement, comprising a substrate on which at least one chip is chip-bonded face-down, which has a central row of bonding pads...
Semiconductor component arrangement with a reduced oscillation tendency
The present invention relates to a circuit assembly with at least two semiconductor components, each having terminals, whereby at least one terminal of the first...
Arrangement of microstructures
A method referred to as a "cellular damascene method" utilizes a multiplicity of regularly arranged closed cavities referred to as "cells", which are produced in...
Differential transistor pair
A differential transistor pair comprises a plurality of transistor cells in a substrate. Each cell comprises first drain regions at the respective edge of the...
Protection structure for protection from electrostatic discharge and
An ESD protection structure for protecting an integrated circuit from electrostatic discharge, having a bipolar protection element, whose emitter is formed by an...
Resistive memory element
An electrically operated, resistive memory element includes a volume of resistive memory material, adapted to be switched between different detectable resistive...
Construction and electrical connection technique in textile structures
Method for electrically connecting an electrical conductor to an electronic component including the steps of providing a textile material in which at least one...
Microelectronic process and structure
The present invention relates to a process for integrating air as dielectric in semiconductor devices, comprising the steps of: a. applying a layer of a...
Method to manufacture high voltage MOS transistor by ion implantation
A method for fabrication of a high-voltage, high-frequency MOS-transistor combines a deep n-well and a p-well process and the formation of an extended drain...
Method for connecting an integrated circuit to a substrate and
An integrated circuit, in particular from a chip, a wafer or a hybrid, to a substrate. A package is provided for the integrated circuit, which has a connection...
PVD method and PVD apparatus
A PVD method and a PVD apparatus use a rotating magnetic field in order to increase the yield. The magnetic field is provided such that it essentially vanishes,...
Method for testing memory units to be tested and test device
The invention provides a method for testing a memory unit (113) to be tested in a test device (100), the memory unit (113) to be tested being introduced into the...
Device and method for associating information concerning memory cells of a
memory with an external memory
In a device and a method associating information concerning first memory cells and second memory cells of a memory element with an external memory, with each...
Method for operating a microprocessor configuration and microprocessor
A microprocessor configuration includes a central control and processing unit, a bus having a bus state line and data/address lines, and units connected to the...
A phase-locked loop is described and has a phase detector that provides at its output per clock cycle a current pulse whose pulse duration is a measure of a...
Method for operating a switching system for data packets
A method for operating a switching system for data packets includes providing a switching system having inputs and outputs, temporarily storing data packets at...
Making contact with semiconductor chips in chip cards
A chip card having a chip card body, a semiconductor chip and a carrier substrate, the carrier substrate being provided on both sides with surface contacts and...
Voltage protection circuit
A voltage protection circuit for a terminal of an electronic device, for example the TIP and RING lines of a linecard, is provided. The voltage protection...
Bi-polar PNP chopper
A switch comprises an input with two input lines and an input stage comprising four current controlled PNP-transistors and four resistors, and an output...
Methods and apparatus for active termination of high-frequency signals
An integrated circuit includes at least one main circuit 313 operable to perform one or more functions. At least one termination node DQ receives or transmits an...
Integrated, tunable capacitance device
An integrated, tunable capacitance device includes a semiconductor region, which is, preferably, N-doped, formed in a semiconductor body, having an insulating...
Arrangement for ESD protection of an integrated circuit
To protect a high-frequency integrated circuit (1) against higher voltages than normal operating voltages on an input/output terminal connected to a bonding pad...
Biosensor circuit and sensor array consisting of a plurality of said
biosensor circuits and biosensor array
Biosensor circuit arrangement including a substrate, a sensor element formed in or on a surface region of the substrate with a physical parameter, which is...
Non-volatile two transistor semiconductor memory cell and method for
producing the same
The invention relates to a nonvolatile two-transistor semiconductor memory cell and an associated fabrication method, source and drain regions (2) for a...
Method for fabricating bottom electrodes of stacked capacitor memory cells
Bottom electrodes of stacked capacitor cells are formed by lining a patterned hard mask with a conductive layer. The hard mask is formed by a layered stack....
Method for a parallel production of an MOS transistor and a bipolar
The present invention provides a method for parallel production of an MOS transistor in an MOS area of a substrate and a bipolar transistor in a bipolar area of...
Process for increasing the etch resistance and for reducing the hole and
trench width of a photoresist...
The invention relates to a process for amplifying structured resists. The process permits a subsequent increase in the etch resistance and a change in the...
Method for fabricating a contact hole plane in a memory module
Disclosed is a method for fabricating a contract hole plane in a memory module with an arrangement of memory cells each having a selection transistor. The...
An individual configuration contains at least a first structure and a second structure, which are aligned with respect to each other. A position sensing device...
Continuous test flow method and apparatus
A method for testing devices produced in front end lots involving loading a plurality of front end lots into a tester without requiring the tester to complete...
Device and method for Viterbi equalization with metric increments
calculated in advance
A Viterbi equalizer for equalization of a data signal transmitted via a channel that is subject to interference has at least one add-compare-select unit (ACS),...
Protection circuit for an access-arbitrated bus system network
The invention relates to a protection circuit (12) for an access-arbitrated bus system network, comprising a fault detection device for detecting a fault status...
Method and bus system for synchronizing a data exchange between a data
source and a control device
A method for synchronizing a data exchange between a data source and a control device is provided. A synchronization request signal is first transmitted via the...
Circuit configuration for generating current pulses in the supply current
of integrated circuits
Differential power analysis on an integrated circuit is made more difficult by providing a circuit configuration for generating current pulses in the supply...
Method and device for calculating a result of an exponentiation
For calculating the result of an exponentiation B.sup.d, B being a base and d being an exponent which can be described by a binary number from a plurality of...