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Patent # Description
US-7,084,711 Method and apparatus for scanning a data signal based on a direction of phase difference
A method and an apparatus for scanning a data signal are provided whereby a plurality of scanning signals (P0, P1, P2, P3) delayed successively by a respective...
US-7,084,706 Circuitry and method for accelerated switching of an amplifier
A circuitry comprises an amplifier with a bipolar transistor, whose base terminal is coupled to an input terminal for a signal to be amplified. A biasing means...
US-7,084,677 Line driver
The invention relates to a line driver arrangement for driving signals via at least one subscriber line, provided with: an input for injecting an input signal...
US-7,084,641 Measuring cell and measuring field comprising measuring cells of this type, use of a measuring and use of a...
A measuring cell for recording an electrical potential of an analyte situated on the measuring cell. The measuring cell has a sensor, a layer arranged above the...
US-7,084,502 Microelectromechanical device and method for producing it
A microelectromechanical device and a method for producing it having at least one layer on a substrate, in particular a thermoelectric layer on a substrate, the...
US-7,084,454 Nonvolatile integrated semiconductor memory
A nonvolatile integrated semiconductor memory has an arrangement of layers with a tunnel barrier layer and a charge-storing level. The charge-storing level has a...
US-7,084,043 Method for forming an SOI substrate, vertical transistor and memory cell with vertical transistor
A method for producing a silicon-on-insulator layer structure on a silicon surface with any desired geometry can locally produce the silicon-on-insulator...
US-7,084,029 Method for fabricating a hole trench storage capacitor in a semiconductor substrate, and hole trench storage...
To fabricate a hole trench storage capacitor having an inner electrode, which is formed in a hole trench, and an outer electrode, which is formed in an electrode...
US-7,084,027 Method for producing an integrated circuit
The invention relates to a method for producing an integrated circuit comprising the following steps: preparing a semi-conductor substrate (1) with a contacting...
US-7,083,990 Method of fabricating MRAM cells
A method of fabricating an MRAM cell including providing a workpiece having at least one magnetic tunnel junction (MTJ) formed thereon, forming an insulating...
US-7,082,513 Integrated memory and method for checking the functioning of an integrated memory
An integrated memory contains an addressing unit for addressing memory cells for a memory access on the basis of received addressing signals. An addressing...
US-7,082,049 Random access memory having fast column access
A memory comprises a column decoder and a circuit. The circuit is configured to receive a column address strobe signal, a column active signal, and a column...
US-7,081,658 Techniques for reducing Neel coupling in toggle switching semiconductor devices
The present invention provides techniques for data storage. In one aspect of the invention, a semiconductor device is provided. The semiconductor device...
US-7,081,583 Digitally controllable oscillator
A digitally controllable oscillator includes an oscillation generation means and an oscillator control, wherein the oscillator control comprises two...
US-7,081,392 Method for fabricating a gate structure of a FET and gate structure of a FET
A method for fabricating a gate structure of a FET, having: (a) deposition and patterning of a sacrificial layer sequence on a semiconductor substrate and...
US-7,081,384 Method of forming a silicon dioxide layer
The present invention refers to a method of forming a silicon dioxide layer by thermally oxidizing at least one monocrystalline silicon surface region on a...
US-7,081,383 Method for fabricating memory cells and memory cell array
A method for producing memory cells, in which an electrically conductive substrate is provided, a trench structure or cup structure with side walls and a base is...
US-7,081,381 Flash memory cell and the method of making separate sidewall oxidation
A process and product for making integrated circuits with dense logic and/or linear regions and dense memory regions is disclosed. On a common substrate, a dual...
US-7,080,988 Flexible contact-connection device
The present invention relates to an elastic contact-connecting device. An elastic elevation 3 is applied to a carrier area 2 of a carrier 1. The elastic...
US-7,080,297 Memory circuit and method for reading out data
It is possible to read out data in accordance with a read-out address from memory cells via bit lines and primary sense amplifiers. Each secondary sense...
US-7,080,184 ISDN-based bus interface
An interface unit for data transfer between a processor bus and an ISDN-based bus is disclosed. The ISDN-based bus is an IOM-2 bus. The interface unit enables...
US-7,079,572 Method for setting up a data transmission link between xDSL transceivers
The invention relates to a method for setting up a data transmission link between xDSL transceivers in which the period for setting up the data transmission link...
US-7,079,568 Frequency hopping method for a mobile radio telephone system
A frequency hopping method for a mobile radio system by which the carrier frequency of the base station (11) and of one or more mobile stations (12) of the...
US-7,079,538 High-speed router
High-speed router for transmitting data packets, containing header data and useful data, between data networks, the router including a plurality of data...
US-7,079,441 Methods and apparatus for implementing a power down in a memory device
A power down is implemented in a memory device capable of performing a read operation in which data and a data strobe signal are supplied as outputs. The power...
US-7,079,431 Arrangement with a memory for storing data
An arrangement with a memory for storing data has a first memory for storing data, switching devices which stipulate whether access to the first memory involves...
US-7,079,428 Circuit for distribution of an input signal to one or more time positions
A control circuit and memory including the control circuit are described herein. The control circuit provides for controlling the edge gradient of transmission...
US-7,079,375 Set of integrated capacitor arrangements, especially integrated grid capacitors
A set of integrated capacitor arrangements is presented, each of which has a circuitry-effective main capacitor and a connectable correction capacitor. Each...
US-7,079,069 Analog-digital converter and method for analog-digital converting
An analog-digital converter has a first register for holding a first approximation number which is variable in a first cycle and is fixed in a second cycle, as...
US-7,079,062 High-resolution digital-to-analogue converter with a small area requirement
Digital-to-analogue converter for converting a digital input signal into an analogue output signal includes a resistor string with switchable taps, a decoder...
US-7,078,961 Device and method for calibrating R/C filter circuits
A calibration unit is designed to contain an oscillator circuit whose frequency is determined by the RC time constant of a resistor, which is of the same type as...
US-7,078,793 Semiconductor memory module
A semiconductor memory module includes a wiring board in or on which at least a number of data line runs are conducted in a respective width of k bits and which...
US-7,078,748 Multi-layer gate stack structure comprising a metal layer for a FET device, and method for fabricating the same
A multi-layer gate stack structure of a field-effect transistor device is fabricated by providing a gate electrode layer stack with a polysilicon layer, a...
US-7,078,709 Apparatus and method for proof of outgassing products
Outgassing products, which are formed during the exposure of photoresist systems by laser irradiation, are adsorbed on a proof plate for further analysis.
US-7,078,325 Process for producing a doped semiconductor substrate
A process is described which allows a buried, retrograde doping profile or a delta doping to be produced in a relatively simple and inexpensive way. The process...
US-7,078,313 Method for fabricating an integrated semiconductor circuit to prevent formation of voids
Recesses between gate layer stacks are filled with a first electrically insulating material. Cavities or voids are opened up during the removal of a portion of...
US-7,078,309 Methods for producing a structured metal layer
The invention provides methods which can be used to structure even precious metal electrodes with conventional CMP steps, in particular with the aid of...
US-7,078,290 Method for forming a top oxide with nitride liner
A method for forming a top oxide for a deep trench memory device comprising a poly stud above a polysilicon fill in a deep trench and an isolation region in a...
US-7,078,135 Method for patterning a mask layer and semiconductor product
During the lithographic exposure of layers to be patterned on semiconductor products, use is made of masks whose mask pattern is imaged on a reduced scale, with...
US-7,078,134 Photolithographic mask having a structure region covered by a thin protective coating of only a few atomic...
A photolithographic mask for patterning a photosensitive material, in particular on a wafer, has at least one structure region for imaging a structure on the...
US-7,078,133 Photolithographic mask
A photolithographic mask has the advantage that a combination of dummy structures, whose pattern is imaged into the resist layer, and auxiliary structures, whose...
US-7,077,331 Chip card having a projection mirror
A chip card for generating an image projection includes a substrate, a mirror which is held movable with reference to the substrate, an actuator for moving the...
US-7,076,700 Method for reconfiguring a memory
Faulty memory cells in a plurality of memory blocks are replaced by redundant memory cells. Each block includes plurality of first and second redundant address...
US-7,076,512 Digital interpolation filter and method of operating the digital interpolation filter
A digital comb filter contains filter stages. Each filter stage has a latch disposed at a filter stage input, which latch, by outputting each input data value...
US-7,076,418 Method and device for system simulation of microcontrollers/microprocessors and corresponding peripheral modules
A method for system simulation, which is distinguished by a first sequence of steps for simulating a microcontroller/microprocessor and peripheral modules using...
US-7,075,961 Laser diode with vertical resonator and method for fabricating the diode
The invention relates to a laser diode including a vertical resonator and to a method for producing the laser diode such that at least one active layer is...
US-7,075,814 Method for homogeneously magnetizing an exchange-coupled layer system of a digital magnetic memory location device
A method and apparatus for homogeneously magnetizing an exchange-coupled layer system of a digital magnetic memory cell device comprising an AAF layer system and...
US-7,075,807 Magnetic memory with static magnetic offset field
A magnetoresistive or magnetic memory element and a magnetic random access memory having one or more magnetic memory elements. The memory element includes a...
US-7,075,148 Semiconductor memory with vertical memory transistors in a cell array arrangement with 1-2F.sup.2 cells
The invention relates to a semiconductor memory having a multiplicity of memory cells, each of the memory cells having N (e.g., four) vertical memory transistors...
US-7,075,137 Semiconductor memory having charge trapping memory cells
In a charge trapping memory architecture for virtual ground with interconnects (6) that are present parallel to the word lines (2) and STI isolations (1) that...
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