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Patent # Description
US-7,042,281 Circuit arrangement for voltage regulation
Circuit arrangement for voltage regulation having a differential amplifier having first and second inputs and first and second outputs, wherein a reference...
US-7,042,249 Method for actuating a transistor
The present invention provides a method for actuating a transistor (10) having the following steps: (a) a first predetermined positive potential is applied to a...
US-7,042,206 Integrated circuit and method for operating the integrated circuit
An integrated circuit has connecting pads for outputting digital signals, a connection for a time reference signal, and an assessment circuit to measure and...
US-7,042,094 Via structure for semiconductor chip
A multi-level via structure for a semiconductor chip in which the collective area of a vias structure is not entirely oriented directly in-line with the...
US-7,042,037 Semiconductor device
Disclosed is a semiconductor device comprising a semiconductor substrate, a capacitor provided above the semiconductor substrate and including a bottom...
US-7,041,574 Composite intermetal dielectric structure including low-k dielectric material
A method of forming a composite intermetal dielectric structure is provided. An initial intermetal dielectric structure is provided, which includes a first...
US-7,041,568 Method for the production of a self-adjusted structure on a semiconductor wafer
A structure on a layer surface of the semiconductor wafer has at least one first area region (8, 9), which is reflective for electromagnetic radiation, and at...
US-7,041,551 Device and a method for forming a capacitor device
A device and method for forming a capacitor device comprises forming a substrate, forming a first interlayer dielectric layer on the substrate and forming two or...
US-7,041,545 Method for producing semiconductor memory devices and integrated memory device
The invention provides an integration scheme for a memory cell array, especially a charge-trapping memory cell array, comprising an architecture of local...
US-7,041,426 Photoresist based on polycondensates and having an increased resolution for use in 157 nanometer lithography
A photoresist includes a polymer which has acid-cleavable groups in its main chain. The polymer can thus be cleaved by acid into short cleavage products which...
US-7,040,173 Pressure sensor and method for operating a pressure sensor
A pressure sensor having a substrate, a counter-structure applied to the substrate, a dielectric on the counter-structure, a membrane on the dielectric, wherein...
US-7,039,915 Method and apparatus for software-based allocation and scheduling of hardware resources in an electronic device
An architecture and method for dynamic resource allocation and scheduling in a communication device is disclosed herein. The method of controlling hardware...
US-7,039,907 Method of protecting entry addresses
An efficient method for protecting entry addresses in computer programs allows direct jumps to permissible entry addresses. The permissible entry addresses are...
US-7,039,838 Method for testing a circuit unit to be tested and test apparatus
The invention provides a method for testing a circuit unit (101) to be tested, in which a test time is reduced, at least one word line (102a 102N) of the circuit...
US-7,039,544 Method for testing circuit units to be tested and test apparatus
The invention provides a test apparatus for testing circuit units (101a 101k) to be tested by means of a test system (100), having a connection device (102),...
US-7,039,143 Circuit for determining the time difference between edges of a first digital signal and of a second digital signal
The circuit has a first input for supplying a first signal (S1) to a series circuit made from a plurality of basic elements. Each basic element has a memory (M)...
US-7,039,090 Method for controlling antennas of a receiving device in a radio system
A method for controlling antennas of a receiving device in a radio system, especially in a mobile radio system, in which at least one change is made using a...
US-7,038,956 Apparatus and method for reading out defect information items from an integrated chip
One embodiment of the invention provides a method for providing defect information from an integrated memory chip having dynamic memory cells arranged on word...
US-7,038,523 Voltage trimming circuit
Methods and circuits for minimizing or eliminating the effect of trimming circuits in a voltage generating circuit are provided. In general, the effects of...
US-7,038,447 Sensor circuit and method of producing it
A sensor circuit includes a sensor element, a current source for supplying an operating current for the sensor element and an amplifier circuit for amplifying a...
US-7,038,307 Semiconductor chip with FIB protection
The present disclosure is directed to a semiconductor chip having protection against focused ion beam (FIB) attack. The semiconductor chip includes a conductor...
US-7,038,272 Method for forming a channel zone of a transistor and NMOS transistor
In a method for forming a channel zone in field-effect transistors, a polysilicon layer is patterned above the channel zone to be formed. The polysilicon layer...
US-7,038,255 Integrated circuit arrangement having PNP and NPN bipolar transistors, and fabrication method
An explanation is given of, inter alia, an integrated circuit arrangement (100) containing an npn transistor (102) and a pnp transistor (104). Transistors with...
US-7,037,844 Method for manufacturing a housing for a chip having a micromechanical structure
A method for manufacturing a chip housing includes a first basis having a photolithograpically structurable layer on a main face, structured into a cover. A chip...
US-7,037,777 Process for producing an etching mask on a microstructure, in particular a semiconductor structure with trench...
Process for producing an etching mask on a microstructure, in particular a semiconductor structure with trench capacitors, and corresponding uses of the etching...
US-7,037,761 Method of producing an electronic component
An electronic component includes a semiconductor chip that has an active upper side with integrated circuits and a passive rear side. The rear side and the side...
US-7,036,216 Method and apparatus for connecting at least one chip to an external wiring configuration
An electrically conductive connection is produced between a chip and an external wiring configuration that is kept at a distance from the chip by spacers....
US-7,036,018 Integrated security circuit
An integrated security circuit, for example, a microcontroller for smart cards, includes a function unit executing a security function. A control device...
US-7,036,017 Microprocessor configuration with encryption
A microprocessor configuration includes a data bus for data transfer between functional units. On the bus side, each unit contains an encryption/decryption unit...
US-7,035,753 Method and apparatus for placing an integrated circuit into a default mode of operation
An integrated circuit having a signal bus carrying address signals includes mode selection means. The mode selection means has a default state and a non-default...
US-7,035,412 WLAN error control
A method in a wireless communications network is disclosed whereby errors due to incorrect transmission of scrambler seed values can be very greatly reduced....
US-7,035,160 Circuit
A circuit comprises a first supply line and a second supply line. A capacitor is arranged between the first supply line and the second supply line. The first...
US-7,035,150 Memory device with column select being variably delayed
A memory device (10) includes an array (12) of memory cells arranged in rows and columns. Preferably, each memory cell includes a pass transistor coupled to a...
US-7,035,116 Memory system and memory subsystem
A memory system has a circuit board provided with a first slot connector into which a first memory module is inserted. A second slot connector is provided into...
US-7,035,003 Microscope arrangement for inspecting a substrate
A microscope measuring arrangement for inspecting a substrate includes a microscope, an illuminating system, preferably a sight glass, a holder, a substrate...
US-7,034,889 Signal processing unit and method for a digital TV system with an increased frame rate video signal
A signal processing unit for a digital TV system comprises a first device which acts on a video signal with graphical picture elements and text characters. A...
US-7,034,729 Adding circuit suitable for sigma-delta modulator circuits
An adding circuit includes storage capacitors and a a switch mechanism, the storage capacitors being charged up via voltage signals to be added during a first...
US-7,034,600 Method and apparatus for EMC-optimized actuation of a semiconductor switching element
A semiconductor switching element has a control connection and a load path, with the load path connected in series with a load and a supply voltage is applied...
US-7,034,573 Level shifter without DC current flow
A level shifter has a current mirror and a set of oppositely driven NMOS switch. A voltage holding module is added to help an output of the level shifter to work...
US-7,034,559 Integrated test circuit in an integrated circuit
The invention relates to an integrated test circuit in an integrated circuit for testing a plurality of internal voltages. A switching device is provided to...
US-7,034,408 Memory device and method of manufacturing a memory device
A memory device includes a DRAM memory cell array, which is implemented as a 6 F.times.F array, and peripheral circuitry. The word lines of the memory cell array...
US-7,034,383 Electronic component and panel and method for producing the same
The invention relates to an electronic component and a panel, the electronic component having a semiconductor chip with a wiring board and a plastic package. The...
US-7,034,371 Biochip for the capacitive stimulation and/or detection of biological tissue and a method for its production
The present invention relates to a biochip for capacitive stimulation and/or detection of biological tissue. The biochip includes a support structure, at least...
US-7,034,358 Vertical transistor, and a method for producing a vertical transistor
The present invention relates to a method for producing a vertical transistor, and to a vertical transistor. A sacrificial gate oxide and a sacrificial gate...
US-7,034,352 DRAM with very shallow trench isolation
The methods and structures of the present invention involve providing a vertical dynamic random access memory (DRAM) cell device comprising a buried strap which...
US-7,034,336 Capacitorless 1-transistor DRAM cell and fabrication method
The channel region (11) and the source-drain regions (9, 10) are arranged vertically at a sidewall of a dielectric trench filling (4). On the opposite side, the...
US-7,033,926 Strip conductor arrangement and method for producing a strip conductor arrangement
An interconnect arrangement comprises a substrate made from a first insulating material with a substrate surface, at least two interconnects which are arranged...
US-7,033,853 Method for producing a vertically emitting laser
The invention is directed to a vertically emitting laser and a method of manufacturing such a laser having a current aperture and a semiconductor relief. The...
US-7,033,740 Photoresists with reaction anchors for chemical consolidation of resist structures for exposures at 157 nm
The chemically amplified resist includes a film-forming polymer, a photoacid generator, and a solvent. The film-forming polymer contains acid-labile groups which...
US-7,032,061 Multimaster bus system
A multimaster bus system includes a bus for connecting to devices connected thereto and a bus controller that controls the bus and/or the bus grant. The...
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