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Wafer probecard interface
Apparatus and method for testing a device wafer having a plurality of devices formed thereon. One embodiment of the invention provides an interface wafer...
Circuit configuration and method for measuring at least one operating
parameter for an integrated circuit
A circuit configuration for measuring at least one operating parameter for an integrated circuit includes an analysis circuit connected to at least one external...
Semiconductor component having a plastic housing and methods for its
The invention relates to a semiconductor component having a plastic housing which encloses a rewiring structure which has flat conductors embedded in plastic....
Device for inhibiting hydrogen damage in ferroelectric capacitor devices
A ferroelectric capacitor device comprises a substrate, a contact plug passing through the substrate, a first electrode formed on the substrate, the first...
Process for the plasma etching of materials not containing silicon
A process enables plasma etching of materials that do not contain silicon. The process is particularly suitable for the side wall passivation of chromium layers...
Structure and method for placement, sizing and shaping of dummy structures
A material layer on a substrate being processed, e.g. to form chips, includes one or more functional structures. In order to control pattern density during...
Polybenzoxazoles from poly-o-hydroxyamide, novel poly-o-hydroxyamides,
preparation processes therefor, and...
High-temperature-stable polybenzoxazoles are formed from novel poly-o-hydroxyamides. The novel poly-o-hydroxyamides have low dielectric constants, are suitable...
A photolithographic mask is based on a combination of a half-tone phase mask and an alternating phase mask such that when radiation passes through some of the...
Arrangement and method for conditioning a polishing pad
An in-situ measurement of thickness profiles of polishing pads (1) used in chemical mechanical polishing (CMP) is enabled by arranging sensors (7) for measuring...
Method for producing laminated smart cards
A smart card is laminated from at least two layers of paper or film as a mounting material. A first of the layers is fitted with a semiconductor chip and a...
Method for populating a substrate with electronic components
A novel method and placement system are configured for populating a substrate with an electronic component. The placement system has a substrate holding device...
Integrated memory having a voltage generator circuit for generating a
voltage supply for a read/write amplifier
An integrated memory contains a memory cell array, which has word lines and bit lines, and a read/write amplifier, which is connected to the bit lines for the...
Resistive memory cell configuration and method for sensing resistance
A configuration of resistive memory cells is disclosed. In one embodiment, the configuration of resistive memory cells comprises a plurality of first current...
Half-bridge circuit and method for driving the half-bridge circuit
A half-bridge circuit has first and second semiconductor switches, which have load paths connected in series and which are driven in dependence on an input...
Phase-control circuit arrangement and method for operating said circuit
A circuit arrangement includes a phase locked loop configured to produce a controlled frequency. The phase locked loop has an actuating input and a control loop...
The invention is directed to an amplifier circuit based on the principle of a class D amplifier. To avoid unwanted convolution effects and to improve the power...
Circuit device with clock pulse detection facility
The invention refers to a circuit device (1) with at least one connection (3b), to which a clock pulse (/CLK, /CLK.sub.T) can be applied, whereby the circuit...
Arrangement for producing an electrical connection between a BGA package
and a signal source, and method for...
An arrangement for producing an electrical connection between a ball grid array (BGA) package and a signal source is disclosed. A flexible printed circuit board...
Electronic device with external contact elements and method for producing
a plurality of the devices
An electronic device has external contact elements projecting from at least one external contact side of a plastic housing. The external contact elements have an...
Method and device for reducing the contact resistance in organic
field-effect transistors by embedding...
A method for selectively doping an organic semiconductor 1material in the region of a contact area .1formed between a contact and the organic semiconductor...
Method for fabricating a memory cell having a trench
A memory cell has a trench, in which a trench capacitor is disposed. Furthermore a vertical transistor is formed in the trench above the trench capacitor. A...
Chemical consolidation of photoresists in the UV range
Structured resists are consolidated, that is post-exposure amplified. The amplifying agent used is a compound which contains at least one bicyclic or polycyclic...
Method for replacing defective memory cells in data processing apparatus
A method for replacing defective memory cells of a random access memory device of a data processing apparatus, in which, during the operation of the data...
Method for transmitting charging signals via a data transmission path
using resonance phenomena
Method for transmitting charging signals via a data transmission path using resonance phenomena The invention provides a method for transmitting charging...
Apparatus and methods for sample selection and reuse of rake fingers in
spread spectrum systems
An apparatus for reducing storage requirements and for allowing reuse of multiple rake fingers in a spread spectrum system includes a decimation circuit having...
Digital memory circuit having a plurality of memory banks
A digital memory circuit has at least two pairs of adjacent memory banks. Each of the banks has n parallel terminals for n read/write data lines. Each bank pair...
Refreshing dynamic memory cells in a memory circuit and a memory circuit
Methods and apparatus for refreshing a dynamic memory cell in a memory circuit are provided, wherein the required time between refresh operations may be...
Apparatus and method for processing wafers
An apparatus for processing semiconductor wafers includes: a wafer support with a first positioning system that can rotate the wafer support coaxially with a...
Input buffer circuit including reference voltage monitoring circuit
A buffer circuit includes a differential amplifier, a buffering inverter, and a reference voltage monitoring circuit. The differential amplifier has a reference...
Integrated electrical circuit and method for fabricating it
An integrated electrical circuit having a plurality of structure planes is described. Electrically active elements are situated on at least one element structure...
Electronic package having integrated cooling element with clearance for
An electronic component includes at least one semiconductor chip. The semiconductor chip is attached on a first side of a wiring board or a leadframe. The wiring...
Flash memory cell with buried floating gate and method for operating such
a flash memory cell
A programmable read-only memory cell and method of operating the programmable read-only memory cell. In one embodiment, the programmable read-only memory cell...
Architecture and fabrication method of a vertical memory cell
A vertical memory cell comprises a storage capacitor, the inner electrode of which is formed in a deep trench, and a vertical selector transistor. The selection...
Bipolar transistor and method for fabricating it
A method is provided to fabricate a bipolar transistor with a low base connection resistance, low defect density and improved scalability. Scalability is to be...
Coating material for electronic components
The invention relates to novel polyhydroxyamide compounds that, in the form of their oxazoles, ane suited as a coating material, particularly for electronic...
Photomask, in particular alternating phase shift mask, with compensation
The invention relates to a method for the production of masks, in particular for the production of alternating phase shift masks (1), or of chromeless phase...
System and method of correcting mask rule violations after optical
A method is provided for correcting rule violating areas of a photomask using a digital representation of the photomask. The method includes identifying...
Method for storing path metrics in a viterbi decoder
For a Virerbi decoder, it is proposed to combine the butterfly structures of the corresponding trellis diagram in pairs in such a way that for each butterfly...
System for testing fast synchronous digital circuits, particularly
semiconductor memory chips
A system and a method for testing fast synchronous digital circuit with an additional built outside self test semiconductor chip disposed between a test device...
Method for controlling a central processing unit for addressing in
relation to a memory and controller
The present invention is based on the finding that free CPU operation code identifiers of a CPU or CPU operation code identifiers useable for any reason can be...
Multi-threaded embedded processor using deterministic instruction memory
to guarantee execution of pre-selected...
A multi-threaded embedded processor that includes an on-chip deterministic (e.g., scratch or locked cache) memory that persistently stores all instructions...
Signal processor and method for the system-independent digital evaluation
of mobile communications reception...
Only a single, standard-independent clock rate is generated in a signal processor or a signal processing structure, and correspondingly only precisely one clock...
Multiplexer bus with local bus nodes
The invention relates to a multiplexer bus comprising local bus nodes. In order to connect a plurality of transmitting-receiving circuits, the latter are...
Integrated access device controller
A network processor (12) for a voice over Internet protocol phone integrates a universal serial bus port (56), a pair of IEEE 802.3 MACs (70a), a repeater (70b),...
Hybrid memory cell for spin-polarized electron current induced switching
and writing/reading process using such...
A magnetoresistive hybrid memory cell includes first and second stacked structures. The first stacked structure includes a magnetic tunnel junction including...
Field ramp down for pinned synthetic antiferromagnet
Techniques for processing magnetic devices are provided. In one aspect, a method of processing a magnetic device including two or more anti-parallel coupled...
Semiconductor memory module
The invention relates to a semiconductor memory module having at least one memory chip and a buffer chip, which drives clock, address and command signals to the...
Semiconductor component with integrated capacitance structure having a
plurality of metallization planes
A semiconductor component includes an insulating layer, which is configured on a semiconductor substrate and in which a capacitor structure is formed. The...
Concept for a secure data communication between electronic devices
An encoder for encoding a data word with a plurality of bits, wherein the data word is transmittable in parallel on a data bus, wherein one bit line is provided...
Amplitude control circuit
An amplitude control circuit comprises a first circuit configured to receive differential signals and provide a first signal based on the amplitudes of the...