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Housing for semiconductor devices, semiconductor device pin, and method
for the manufacturing of pins
A housing, in particular for semiconductor devices, a semiconductor device pin, and a method for the manufacturing of pins wherein at least one pin is punched...
Multiple chip semiconductor arrangement having electrical components in
A semiconductor packaging arrangement, or module, includes a printed circuit board having an electrical interconnect thereon and a semiconductor package mounted...
Reflective mirror for lithographic exposure and production method
A reflective optical mirror for semiconductor fabrication includes a capping layer above a reflective multilayer sequence. A doping is provided for the capping...
Integrated circuit having capacitive elements
An integrated circuit having capacitive elements for smoothing a supply voltage is described. In this case, at least one additional metal electrode, which is...
Emulation interface system
An integrated circuit with multiple circuit cores each of which have integrated emulated circuits, and an emulation interface module, such that the integrated...
Integrated memory and method of repairing an integrated memory
A method for repairing an integrated memory having first units of memory cells and second, redundant units of memory cells for replacing first units of memory...
Method and apparatus for generating a second signal having a clock based
on a second clock from a first signal...
An apparatus for generating a second signal having a clock based on a second clock from a first signal with a first clock comprises first and second means for...
Tunable semiconductor laser and production method
A resonator structure containing an active layer is subdivided into at least two sections in which mode spacings differ from one another by 7 to 10 percent on...
Circuit and method for evaluating and controlling a refresh rate of memory
cells of a dynamic memory
A circuit for controlling a refresh rate of memory cells of a dynamic memory includes a control circuit for controlling an access to memory cells of the dynamic...
Precharging the write path of an MRAM device for fast write operation
The write path of an MRAM device is precharged before starting a write operation of a magnetic memory cell, increasing the speed of the write operation and...
LED array implementation
An LED array arrangement that reduces the number of control inputs needed to operate it is described. The reduction in the number of control pins is achieved...
Low-noise amplifying circuit
A low-noise amplifier circuit is specified which has a switchable gain ratio. For this purpose, a parallel circuit comprising a first and a second current path...
Resistor and switch-minimized variable analog gain circuit
A DSM variable high-gain circuit includes a differential amplifier and a negative feedback loop comprising low resistance poly resistors and switches configured...
An arrangement and a method in an integrated circuit for tuning and setting a value comprising a comparator circuit having a reference voltage input and a...
Apparatus for connecting an IC terminal to a reference potential
A circuit chip has an apparatus for an electrically conductive connection of a terminal thereof to an external reference potential. The apparatus has a parallel...
Combination of intrinsic and shape anisotropy for reduced switching field
A magnetic memory cell and method of manufacturing thereof, wherein the angle between the shape anisotropy axis and the intrinsic anisotropy axis of the magnetic...
Semiconductor structure with integrated shield
A semiconductor structure comprises a memory element, which comprises a floating gate, a control electrode, which is capacitively coupled to the floating gate,...
Semiconductor memory having an arrangement of memory cells
A semiconductor memory can have first lines to which memory cells are connected and that run divergently with respect to one another, and second lines to which...
Silicon particles as additives for improving charge carrier mobility in
The invention relates to a semiconductor device having a semiconductor path made from an organic semiconductor material. Semiconductor particles or semiconductor...
Integrated semiconductor memory
An integrated semiconductor memory (1) has a multiplicity of memory cells (Z) and first lines (10) and second lines (20) that can be used to actuate the memory...
Method for fabricating a trench capacitor with an insulation collar which
is electrically connected to a...
The present invention provides a method for fabricating a trench capacitor with an insulation collar (10; 10a, 10b) in a substrate (1), which is electrically...
Electronic sensor device and method for producing the electronic sensor
An electronic sensor device has at least one sensor component, which bears on a bearing base of a rewiring structure. Contact areas of the sensor component are...
Mask for projecting a structure pattern onto a semiconductor substrate
A mask is configured for projecting a structure pattern onto a semiconductor substrate in an exposure unit. The exposure unit has a minimum resolution limit for...
Spare input/output buffer
An integrated circuit ("IC") package includes an input/output ("I/O"), a spare I/O circuit, and a resident IC for processing data. The I/O circuit is coupled...
Installation for processing a semiconductor wafer and method for operating
An installation for processing a semiconductor wafer includes a semiconductor fabrication device having a load port, on which an identity code that can be read...
Passivation layer structure
A conductor layer is patterned into flat portions, for example of a fingerprint sensor that effects capacitive measurement. The conductor layer is fragmented in...
High data rate ethernet transport facility over digital subscriber lines
A facility transport system for transporting high speed Ethernet data over digital subscriber lines. The system, referred to as 100BaseS, is capable of...
An arrangement for repairing at least one faulty bit line of a memory includes three multiplexer stages. The memory has a plurality of columns, each column...
Method and circuit for adjusting a resistance in an integrated circuit
A method for adjusting a resistance in an integrated circuit, the resistance having a first conductive area and a second conductive area between which a...
Method for switching over a reference voltage potential for overvoltage
Method for supplying a circuit unit (201) which is to be supplied with different supply voltages, in which the circuit unit (201) to be supplied is protected...
Circuit configuration for identifying a fault state
To identify a fault state, for example, a break in a supply line, while maintaining operational reliability, a circuit configuration for identifying a fault...
High rate coding for media noise
An apparatus has a conversion circuit, a precoder circuit, and a selection circuit. The conversion circuit converts user data b.sub.1, b.sub.2, b.sub.3 . . ....
Voltage controlled oscillator (VCO) with output buffer
An oscillator system is disclosed and includes an oscillator circuit having a differential output producing a differential output signal thereat having a...
Multistage differential amplifier
The invention relates to a multistage differential amplifier circuit having a multistage differential amplifier which has an input stage and at least one output...
Device and method for clock generation
A clock generator includes an interface for receiving a plurality of n periodical signals of the same frequency which are phase-shifted with respect to each...
Comparator and method for amplifying an input signal
The invention is aimed at providing a novel semi-conductor component, as well as a novel process for reading test data. There is a process for reading test data...
Circuit arrangement for generating a signal having a specific waveform
with an adjustable voltage level
A circuit arrangement for generating specific waveforms includes a controllable voltage transformer circuit for generating an output signal (V.sub.OUT) with a...
Multi-level driver stage
An inventive driver stage for driving an output on one of n-levels, which are each spaced from each other by a voltage difference of .DELTA.V, includes a...
Output level responsive switching on/off of a linear regulator
A circuit configuration provides an output voltage from an input voltage. The circuit configuration has a voltage regulator with an input terminal for receiving...
Semiconductor component having at least two chips which are integrated in
a housing and with which contact is...
A semiconductor component, featuring a housing, at least two semiconductor chips arranged in the housing, which chips in each case have a front side and a rear...
Semiconductor component, method for producing the semiconductor component,
and method for producing electrical...
A fabrication method produces an integrated component on a semiconductor substrate and having a plurality of electrode connections formed to project from to the...
Charge-trapping semiconductor memory device
Memory cells are formed by preferably cylindrical recesses at the main surface of a semiconductor substrate, containing a memory layer sequence at sidewalls and...
Digital magnetic memory cell device
A digital magnetic memory cell device for read and/or write operations includes a soft-magnetic read and/or write layer system and at least one hard-magnetic...
Sealed pores in low-k material damascene conductive structures
An oxide layer is used to seal pores in porous low-dielectric constant materials, thus preventing the migration of subsequently deposited copper materials into...
Method for producing insulator structures including a main layer and a
In order to produce insulator structures (8), insulator trenches (21) with aspect ratios of greater than 4:1 are introduced into a semiconductor substrate (1)...
Use of polybenzoxazoles (PBOS) for adhesion
The present invention describes the use of polybenzoxazoles (PBOs) for adhesively bonding articles or materials, especially components used in the semiconductor...
Silicon-containing resist for photolithography
A photoresist includes a polymer having a main chain composed of alternating silicon and oxygen atoms and a polymer chain segment which linked as a side chain to...
Transmission mask with differential attenuation to improve ISO-dense
An apparatus, system and method to compensate for the proximity effects in the imaging of patterns in a photolithography process. A light exposure of a...
Bilayered metal hardmasks for use in Dual Damascene etch schemes
A metal hardmask for use with a Dual Damascene process used in the manufacturing of semiconductor devices. The metal hardmask has advantageous translucent...
Pseudo fail bit map generation for RAMS during component test and burn-in
in a manufacturing environment
According to an embodiment of the present invention, a method is provided for determining a fail string for a device. The method includes determining a test...