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Patent # Description
US-7,108,798 Defect repair method, in particular for repairing quartz defects on alternating phase shift masks
The invention relates to a defect repair method, in particular for repairing quartz defects on alternating phase shift masks, wherein, for repairing defects (5)...
US-7,107,562 Method and apparatus for the arrangement of contact-making elements of components of an integrated circuit,...
The invention relates to a method and an apparatus for the arrangement of contact-making elements of components of an integrated circuit, a computer-readable...
US-7,107,501 Test device, test system and method for testing a memory circuit
A test device has an interface for connecting a memory circuit that is to be tested and for receiving fault addresses. The test device further has a fault...
US-7,107,465 PCI bus interface circuit for supplying either a main supply voltage or an auxiliary voltage to a PCI plug-in-card
The invention relates to a PCI bus interface circuit for supplying power to a PCI plug-in card that is connected to a PCI bus. The inventive PCI bus interface...
US-7,106,812 Device for the recovery of data from a received data signal
A CDR circuit arrangement, for example for a transceiver module, features a data recovery unit (4) for the recovery of the data contained in a received signal...
US-7,106,807 Method for estimating the frequency shift of a CPFSK signal
A method for estimating the frequency shift of a CPFSK signal includes scanning the CPFSK signal. Intermediate signal values are determined for the scanned CPFSK...
US-7,106,753 Interpolated timing recovery system for communication transceivers
Interconnected master and slave transceivers provide data communication between host computers. Each transceiver receives and encodes elements of a first data...
US-7,106,654 Arrangement comprising a memory device and a program-controlled unit
An arrangement comprises a memory device for storing data, and a program-controlled unit with a memory interface for reading data out of the memory device. The...
US-7,106,614 Memory circuit and method for providing an item of information for a prescribed period of time
The invention relates to a memory circuit for providing an item of information for a prescribed period of time. The memory circuit has a memory cell with a PMC...
US-7,106,606 Voltage-current converter with adjustable quiescent current
Method for controlling an output signal (A) of a voltage-current converting device, to which a reference voltage (U.sub.REF) is fed and in which a voltage signal...
US-7,106,251 Receiver in a position-finding system and method for position-finding with increased sensitivity
The invention relates to a receiver in a position-finding system, having a calculation unit for calculating a statistical value from a received signal, and a...
US-7,106,141 Phase locked loop
The phase locked loop according to the invention has an adjustable charge pump (2) which is intended to generate a control voltage (UVCO). A voltage-controlled...
US-7,106,091 Circuit configuration and method for detecting an unwanted attack on an integrated circuit
A circuit configuration for detecting an unwanted attack on an integrated circuit has a signal line to which a clock signal is applied and at least one line pair...
US-7,105,415 Method for the production of a bipolar transistor
The invention relates to a method for producing a bipolar transistor. A semiconductor substrate is provided that encompasses a collector area of a first...
US-7,105,404 Method for fabricating a semiconductor structure
The present invention provides a method for fabricating a semiconductor structure having the steps of: providing a semiconductor substrate (1) made of silicon...
US-7,105,400 Manufacturing method of semiconductor device
There is disclosed a method of manufacturing a semiconductor device, comprising forming an underlying region including an interlevel insulating film on a...
US-7,105,279 Method for fabricating a patterned layer on a semiconductor substrate
During the patterning of a semiconductor layer, an N-free SiO.sub.x layer is produced under an acid-forming photoresist layer in order to prevent a resist...
US-RE39,283 Method for selective filtering
A method for digital clock recovery and selective filtering includes prescribing or calculating first coefficients of a prototype of a selective filter at a...
US-7,103,494 Circuit arrangement and data processing method
A circuit arrangement in which two parallel subcircuits having a same functionality have a same input signal applied to them, and their output signals are...
US-7,103,343 Receiver, in particular for mobile radio
A receiver, in particular for mobile radio, includes a receiver branch with a mixer, downstream of an analog/digital converter. A reference generator generates a...
US-7,102,940 Circuit arrangement for latency regulation
One embodiment of the invention relates to a circuit arrangement for regulating a latency that is defined as a whole number n of periods T of a reference clock...
US-7,102,933 Combined receiver and latch
A combined receiver and latch circuit is configured to receive an external clock signal, an external reference voltage and an external command signal. The...
US-7,102,912 Integrated semiconductor memory device and method for operating an integrated semiconductor memory device
An integrated semiconductor memory device includes a memory cell array (B1) with a first bit line and a second bit line (BL, /BL), a controllable resistor (SW)...
US-7,102,911 Method for improving the read signal in a memory having passive memory elements
A method for improving read signals in a memory including passive memory elements provided at crossover locations of word and bit lines, and in which stored...
US-7,102,908 Reliable ferro fuse cell
The present invention includes a ferro fuse cell comprising a ferroelectric storage capacitor electrically connected to a plate on one side and to a sense...
US-7,102,443 Temperature-stabilized amplifier circuit
A circuit for amplifying an input voltage (VIN) into an output voltage (VOUT) with an overall gain factor, which is a product of a first gain factor (S) and a...
US-7,102,435 Amplifier arrangement and control loop having the amplifier arrangement
An amplifier arrangement and also a control loop having the amplifier arrangement are specified, wherein the amplifier arrangement is based on a Gilbert...
US-7,102,418 Method and apparatus for producing a reference voltage
The invention relates to a method and an apparatus for producing a reference voltage that is applied to reference voltage inputs on receiver units in order to...
US-7,102,362 Integrated circuit for testing circuit components of a semiconductor chip
An integrated circuit includes a first circuit component, a second circuit component, and an external terminal for making contact with the circuit. The first...
US-7,101,785 Formation of a contact in a device, and the device including the contact
A method of forming a contact to an underlayer of a device includes the steps of forming a contact hole, forming a contact hole barrier layer of a barrier...
US-7,101,755 Gate conductor isolation and method for manufacturing same
A method for processing a semiconductor device includes providing the semiconductor device including a deep trench transistor in an array area and a shallow...
US-7,101,092 Module having a circuit carrier and an electro-optical transducer and method for producing the same
The invention relates to a module having a circuit carrier and having an electro-optical transducer mounted thereon for coupling in or out optical beams which...
US-7,100,836 Module for contactless chip cards or identification systems
Module for contactless chip cards or identification systems having a first antenna contact strip and a second antenna contact strip, which each have a first...
US-7,099,964 High speed processor
High speed processor having a data processing unit (13) for processing data, a data memory (20) which is connected to the data processing unit via a data bus...
US-7,099,641 Receiver circuit for mobile radio receivers with automatic gain control
A receiver circuit for a mobile radio receiver has a controllable amplifier with a variable gain level, an analog-digital converter stage, a digital filter...
US-7,099,585 Memory circuit with an optical input
A memory circuit includes a plurality of memory cells, an input/output area for addressing or writing onto the plurality of memory cells by means of electrical...
US-7,099,425 Adjustment circuit and method for tuning of a clock signal
An integrated circuit and a method for tuning an internal clock signal with respect to data that is to be emitted includes an adjustment circuit with a...
US-7,099,302 Data transmission network
Data transmission network having a least one line termination device connected via a data transmission medium to several network termination devices, each...
US-7,099,218 Differential current evaluation circuit and sense amplifier circuit for evaluating a memory state of an SRAM...
A differential current evaluation circuit has a differential amplifier and a circuit for setting an input resistance of the current evaluation circuit. The...
US-7,099,186 Double-decker MRAM cells with scissor-state angled reference layer magnetic anisotropy and method for fabricating
A double-decker MRAM cell is provided, including a stacked structure of first and second magnetic tunnel junctions. Each magnetic tunnel junction includes free...
US-7,099,018 Measurement of optical properties of radiation sensitive materials
A system and method for measuring optical properties of films deposited or formed on semiconductor wafers. Measurements of an optical property are made in a...
US-7,098,827 Integrator circuit
An integrator circuit has an integrator unit performed to generate an integrated signal from a modulated input signal. Additionally, the integrator circuit has...
US-7,098,752 Circuit arrangement for generating a reference current and oscillator circuit having the circuit arrangement
A circuit arrangement for generating a reference current and also an oscillator circuit having the circuit arrangement are disclosed the arrangement includes a...
US-7,098,741 Monolithically integrated power amplifier device
A monolithically integrated microwave amplifier device, comprises an input for receiving a microwave signal, a first power amplifier stage (11; 32) having an...
US-7,098,723 Semiconductor circuit regulator
In a circuit designed to output a varying output voltage, the substrate of the semi-conductor component is connected to a regulator, in particular a switch,...
US-7,098,142 Method of etching ferroelectric devices
A method of etching a ferroelectric device 100 having a ferroelectric layer 112 between a top and a bottom electrode 114, 108 is disclosed herein. Hardmasks 116,...
US-7,097,947 Method for correcting local loading effects in the etching of photomasks
A method for correcting local loading-effects in photomask etching includes the steps of determining the location-dependent density of structures of a mask;...
US-7,097,777 Magnetic switching device
A method of forming a magnetic switching device is provided. The method includes depositing a bilayer hardmask, which may comprise a first mask layer of titanium...
US-7,097,535 Method and configuration for conditioning a polishing pad surface
A method and a configuration for conditioning a polishing pad surface are described. The method includes measuring a rotation table current or voltage as an...
US-7,097,109 Contactless data storage medium and method for operating contactless data storage medium
A contactless data storage medium having a principal circuit component and a coupling element, with a controllable load provided for performing offloading...
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