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Device for reconstructing data from a received data signal and
In a transceiver which is configured in particular for transmitting optical data, there is provided a device for reconstructing data from a received data signal...
Semiconductor laser structure
The active layer (1) and the barrier layers (2) contain a group III component, a group V component and nitrogen, whereby the active layer is a quaternary...
System of multiplexed data lines in a dynamic random access memory
A system of multiplexed data lines in a DRAM integrated circuit includes a switching circuit having two switching states. In one switching state, the data lines...
MRAM with vertical storage element in two layer-arrangement and field
A magnetic memory element including a magnetic storage element including two magnetic layers made of magnetic material, said two magnetic layers opposing each...
MRAM with switchable ferromagnetic offset layer
A magnetoresistive memory cell includes a magnetic tunnel junction including first (fixed) and second (free) magnetic regions, where the second magnetic region...
Circuit arrangement for regulating a parameter of an electrical signal
A circuit arrangement for regulating a parameter (e.g., duty cycle) of an electrical signal, generated by a circuit component. The regulating device includes a...
A circuit module comprises a first circuit chip (102a) and a second circuit chip (102b). Each circuit chip comprises a signal input (104a, 104b) and a reference...
Test arrangement for testing semiconductor circuit chips
The invention relates to a test arrangement for testing semiconductor circuit chips, in which a test signal received via a primary test channel from a driver...
Integrated circuit arrangement
Integrated circuit arrangement, in which bearing areas of mutually opposing sides of a carrier and of a substrate layer, which carries circuit structures, are...
Metal semiconductor contact, semiconductor component, integrated circuit
arrangement and method
The present invention relates to a metal-semiconductor contact comprising a semiconductor layer and comprising a metallization applied to the semiconductor...
Area efficient stacking of antifuses in semiconductor device
A semiconductor device is provided which is formed of a wafer having on a surface thereof an area efficient arrangement of at least two antifuses in vertically...
Flash memory cell, flash memory device and manufacturing method thereof
The present invention relates to a flash memory cell comprising a silicon substrate having an active region comprising a channel region and ...
ESD protective circuit with collector-current-controlled triggering for a
monolithically integrated circuit
An ESD protective circuit protects an input or output of a monolithically integrated circuit. The ESD protective circuit has at least one bipolar transistor...
Method for detecting and compensating for positional displacements in
photolithographic mask units and...
A method for detecting and compensating for positional displacements of a photolithographic mask unit, includes providing mask production data for the writing of...
Method for fabricating connection regions of an integrated circuit, and
integrated circuit having connection...
A method for fabricating an integrated circuit connection region includes application of a dielectric to an integrated circuit with a connection region,...
Method for generating chip stacks
Disclosed is a method for generating chip stacks during the production of chips from wafers, the chips located on the wafer being separated from one another, the...
Charge trapping memory cell
A memory cell includes a channel region between source/drain regions at the top side of a semiconductor body and is provided, transversely with respect to the...
Method for fabricating transistors of different conduction types and
having different packing densities in a...
A gate electrode layer is doped in a first section of a semiconductor substrate. By means of a patterning, encapsulated gate electrodes emerge from the gate...
Method of fabricating an oxide collar for a trench capacitor
A method for fabricating patterned ceramic layers on areas of a relief structure, wherein the layers may be arranged essentially perpendicular to a top side of a...
Method for fabricating trench capacitors for integrated semiconductor
In a method for fabricating trench capacitors, in particular for memory cells having at least one selection transistor for integrated semiconductor memories, a...
Encapsulation of conductive lines of semiconductor devices
The invention relates to a method of encapsulating conductive lines of semiconductor devices and a structure thereof. An encapsulating protective material, such...
Method and device for decoding a sequence of physical signals, reliability
detection unit and viterbi decoding unit
A method and device for decoding a sequence of physical signals. A Viterbi algorithm is carried out a first time for all physical signals, resulting in a maximum...
System for testing a group of functionally independent memories and for
replacing failing memory words
System for testing a group of functionally independent memories (102) and for replacing failing memory words of the group of functionally independent memories...
Method for generating a signal pulse sequence with a predetermined stable
A method for generating a signal pulse sequence with a predetermined stable fundamental frequency from a sequence of signal pulses whose frequency fluctuates and...
Circuit and method for detecting AC voltage pulses
A detection circuit and method for detecting AC voltage pulses at a defined frequency relate to first transforming an input signal to a low-frequency signal by...
Method and device for transmitting a transmission signal via a two-core
Method and apparatus for transmitting a transmission signal via a two-core line, in particular a telephone line, in which case, with the aid of corresponding...
Simulating a floating wordline condition in a memory device, and related
A memory device and methods to exploit extra or dummy wordlines in the memory device, wherein the extra wordlines are not part of a main memory area of the...
Circuit and method for controlling an access to an integrated memory
A circuit for controlling an access to an integrated memory includes a command decoder for receiving at least one external command for an access to the memory....
Fuse blowing interface for a memory chip
A fuse blowing interface (7) for a memory chip (1) comprising a latch register for latching a calculated memory repair solution when a prefuse request signal is...
Optical measurement of device features using lenslet array illumination
The properties of features formed in a substrate are measured. Lenslet array illumination is used to illuminate regions of a substrate so that the features of...
Method for detecting positioning errors of circuit patterns during the
transfer by means of a mask into layers...
A method, suitable to photolithographie projection, for detecting the positioning errors of circuit patterns during the transfer by a mask into layers of a...
Method and device for estimating time errors in time interleaved A/D
A device estimates time errors in a time interleaved A/D converter system. To this end an output signal (y1, y2, . . . , yM) is fed to a correction device (5),...
Method and apparatus for scanning a data signal based on a direction of
A method and an apparatus for scanning a data signal are provided whereby a plurality of scanning signals (P0, P1, P2, P3) delayed successively by a respective...
Circuitry and method for accelerated switching of an amplifier
A circuitry comprises an amplifier with a bipolar transistor, whose base terminal is coupled to an input terminal for a signal to be amplified. A biasing means...
The invention relates to a line driver arrangement for driving signals via at least one subscriber line, provided with: an input for injecting an input signal...
Measuring cell and measuring field comprising measuring cells of this
type, use of a measuring and use of a...
A measuring cell for recording an electrical potential of an analyte situated on the measuring cell. The measuring cell has a sensor, a layer arranged above the...
Microelectromechanical device and method for producing it
A microelectromechanical device and a method for producing it having at least one layer on a substrate, in particular a thermoelectric layer on a substrate, the...
Nonvolatile integrated semiconductor memory
A nonvolatile integrated semiconductor memory has an arrangement of layers with a tunnel barrier layer and a charge-storing level. The charge-storing level has a...
Method for forming an SOI substrate, vertical transistor and memory cell
with vertical transistor
A method for producing a silicon-on-insulator layer structure on a silicon surface with any desired geometry can locally produce the silicon-on-insulator...
Method for fabricating a hole trench storage capacitor in a semiconductor
substrate, and hole trench storage...
To fabricate a hole trench storage capacitor having an inner electrode, which is formed in a hole trench, and an outer electrode, which is formed in an electrode...
Method for producing an integrated circuit
The invention relates to a method for producing an integrated circuit comprising the following steps: preparing a semi-conductor substrate (1) with a contacting...
Method of fabricating MRAM cells
A method of fabricating an MRAM cell including providing a workpiece having at least one magnetic tunnel junction (MTJ) formed thereon, forming an insulating...
Integrated memory and method for checking the functioning of an integrated
An integrated memory contains an addressing unit for addressing memory cells for a memory access on the basis of received addressing signals. An addressing...
Random access memory having fast column access
A memory comprises a column decoder and a circuit. The circuit is configured to receive a column address strobe signal, a column active signal, and a column...
Techniques for reducing Neel coupling in toggle switching semiconductor
The present invention provides techniques for data storage. In one aspect of the invention, a semiconductor device is provided. The semiconductor device...
Digitally controllable oscillator
A digitally controllable oscillator includes an oscillation generation means and an oscillator control, wherein the oscillator control comprises two...
Method for fabricating a gate structure of a FET and gate structure of a
A method for fabricating a gate structure of a FET, having: (a) deposition and patterning of a sacrificial layer sequence on a semiconductor substrate and...
Method of forming a silicon dioxide layer
The present invention refers to a method of forming a silicon dioxide layer by thermally oxidizing at least one monocrystalline silicon surface region on a...
Method for fabricating memory cells and memory cell array
A method for producing memory cells, in which an electrically conductive substrate is provided, a trench structure or cup structure with side walls and a base is...
Flash memory cell and the method of making separate sidewall oxidation
A process and product for making integrated circuits with dense logic and/or linear regions and dense memory regions is disclosed. On a common substrate, a dual...