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Patent # Description
US-7,087,512 Method for fabricating connection regions of an integrated circuit, and integrated circuit having connection...
A method for fabricating an integrated circuit connection region includes application of a dielectric to an integrated circuit with a connection region,...
US-7,087,502 Method for generating chip stacks
Disclosed is a method for generating chip stacks during the production of chips from wafers, the chips located on the wafer being separated from one another, the...
US-7,087,500 Charge trapping memory cell
A memory cell includes a channel region between source/drain regions at the top side of a semiconductor body and is provided, transversely with respect to the...
US-7,087,492 Method for fabricating transistors of different conduction types and having different packing densities in a...
A gate electrode layer is doped in a first section of a semiconductor substrate. By means of a patterning, encapsulated gate electrodes emerge from the gate...
US-7,087,485 Method of fabricating an oxide collar for a trench capacitor
A method for fabricating patterned ceramic layers on areas of a relief structure, wherein the layers may be arranged essentially perpendicular to a top side of a...
US-7,087,484 Method for fabricating trench capacitors for integrated semiconductor memories
In a method for fabricating trench capacitors, in particular for memory cells having at least one selection transistor for integrated semiconductor memories, a...
US-7,087,438 Encapsulation of conductive lines of semiconductor devices
The invention relates to a method of encapsulating conductive lines of semiconductor devices and a structure thereof. An encapsulating protective material, such...
US-7,085,992 Method and device for decoding a sequence of physical signals, reliability detection unit and viterbi decoding unit
A method and device for decoding a sequence of physical signals. A Viterbi algorithm is carried out a first time for all physical signals, resulting in a maximum...
US-7,085,972 System for testing a group of functionally independent memories and for replacing failing memory words
System for testing a group of functionally independent memories (102) and for replacing failing memory words of the group of functionally independent memories...
US-7,085,951 Method for generating a signal pulse sequence with a predetermined stable fundamental frequency
A method for generating a signal pulse sequence with a predetermined stable fundamental frequency from a sequence of signal pulses whose frequency fluctuates and...
US-7,085,373 Circuit and method for detecting AC voltage pulses
A detection circuit and method for detecting AC voltage pulses at a defined frequency relate to first transforming an input signal to a low-frequency signal by...
US-7,085,372 Method and device for transmitting a transmission signal via a two-core line
Method and apparatus for transmitting a transmission signal via a two-core line, in particular a telephone line, in which case, with the aid of corresponding...
US-7,085,191 Simulating a floating wordline condition in a memory device, and related techniques
A memory device and methods to exploit extra or dummy wordlines in the memory device, wherein the extra wordlines are not part of a main memory area of the...
US-7,085,185 Circuit and method for controlling an access to an integrated memory
A circuit for controlling an access to an integrated memory includes a command decoder for receiving at least one external command for an access to the memory....
US-7,085,182 Fuse blowing interface for a memory chip
A fuse blowing interface (7) for a memory chip (1) comprising a latch register for latching a calculated memory repair solution when a prefuse request signal is...
US-7,084,966 Optical measurement of device features using lenslet array illumination
The properties of features formed in a substrate are measured. Lenslet array illumination is used to illuminate regions of a substrate so that the features of...
US-7,084,962 Method for detecting positioning errors of circuit patterns during the transfer by means of a mask into layers...
A method, suitable to photolithographie projection, for detecting the positioning errors of circuit patterns during the transfer by a mask into layers of a...
US-7,084,793 Method and device for estimating time errors in time interleaved A/D converter system
A device estimates time errors in a time interleaved A/D converter system. To this end an output signal (y1, y2, . . . , yM) is fed to a correction device (5),...
US-7,084,711 Method and apparatus for scanning a data signal based on a direction of phase difference
A method and an apparatus for scanning a data signal are provided whereby a plurality of scanning signals (P0, P1, P2, P3) delayed successively by a respective...
US-7,084,706 Circuitry and method for accelerated switching of an amplifier
A circuitry comprises an amplifier with a bipolar transistor, whose base terminal is coupled to an input terminal for a signal to be amplified. A biasing means...
US-7,084,677 Line driver
The invention relates to a line driver arrangement for driving signals via at least one subscriber line, provided with: an input for injecting an input signal...
US-7,084,641 Measuring cell and measuring field comprising measuring cells of this type, use of a measuring and use of a...
A measuring cell for recording an electrical potential of an analyte situated on the measuring cell. The measuring cell has a sensor, a layer arranged above the...
US-7,084,502 Microelectromechanical device and method for producing it
A microelectromechanical device and a method for producing it having at least one layer on a substrate, in particular a thermoelectric layer on a substrate, the...
US-7,084,454 Nonvolatile integrated semiconductor memory
A nonvolatile integrated semiconductor memory has an arrangement of layers with a tunnel barrier layer and a charge-storing level. The charge-storing level has a...
US-7,084,043 Method for forming an SOI substrate, vertical transistor and memory cell with vertical transistor
A method for producing a silicon-on-insulator layer structure on a silicon surface with any desired geometry can locally produce the silicon-on-insulator...
US-7,084,029 Method for fabricating a hole trench storage capacitor in a semiconductor substrate, and hole trench storage...
To fabricate a hole trench storage capacitor having an inner electrode, which is formed in a hole trench, and an outer electrode, which is formed in an electrode...
US-7,084,027 Method for producing an integrated circuit
The invention relates to a method for producing an integrated circuit comprising the following steps: preparing a semi-conductor substrate (1) with a contacting...
US-7,083,990 Method of fabricating MRAM cells
A method of fabricating an MRAM cell including providing a workpiece having at least one magnetic tunnel junction (MTJ) formed thereon, forming an insulating...
US-7,082,513 Integrated memory and method for checking the functioning of an integrated memory
An integrated memory contains an addressing unit for addressing memory cells for a memory access on the basis of received addressing signals. An addressing...
US-7,082,049 Random access memory having fast column access
A memory comprises a column decoder and a circuit. The circuit is configured to receive a column address strobe signal, a column active signal, and a column...
US-7,081,658 Techniques for reducing Neel coupling in toggle switching semiconductor devices
The present invention provides techniques for data storage. In one aspect of the invention, a semiconductor device is provided. The semiconductor device...
US-7,081,583 Digitally controllable oscillator
A digitally controllable oscillator includes an oscillation generation means and an oscillator control, wherein the oscillator control comprises two...
US-7,081,392 Method for fabricating a gate structure of a FET and gate structure of a FET
A method for fabricating a gate structure of a FET, having: (a) deposition and patterning of a sacrificial layer sequence on a semiconductor substrate and...
US-7,081,384 Method of forming a silicon dioxide layer
The present invention refers to a method of forming a silicon dioxide layer by thermally oxidizing at least one monocrystalline silicon surface region on a...
US-7,081,383 Method for fabricating memory cells and memory cell array
A method for producing memory cells, in which an electrically conductive substrate is provided, a trench structure or cup structure with side walls and a base is...
US-7,081,381 Flash memory cell and the method of making separate sidewall oxidation
A process and product for making integrated circuits with dense logic and/or linear regions and dense memory regions is disclosed. On a common substrate, a dual...
US-7,080,988 Flexible contact-connection device
The present invention relates to an elastic contact-connecting device. An elastic elevation 3 is applied to a carrier area 2 of a carrier 1. The elastic...
US-7,080,297 Memory circuit and method for reading out data
It is possible to read out data in accordance with a read-out address from memory cells via bit lines and primary sense amplifiers. Each secondary sense...
US-7,080,184 ISDN-based bus interface
An interface unit for data transfer between a processor bus and an ISDN-based bus is disclosed. The ISDN-based bus is an IOM-2 bus. The interface unit enables...
US-7,079,572 Method for setting up a data transmission link between xDSL transceivers
The invention relates to a method for setting up a data transmission link between xDSL transceivers in which the period for setting up the data transmission link...
US-7,079,568 Frequency hopping method for a mobile radio telephone system
A frequency hopping method for a mobile radio system by which the carrier frequency of the base station (11) and of one or more mobile stations (12) of the...
US-7,079,538 High-speed router
High-speed router for transmitting data packets, containing header data and useful data, between data networks, the router including a plurality of data...
US-7,079,441 Methods and apparatus for implementing a power down in a memory device
A power down is implemented in a memory device capable of performing a read operation in which data and a data strobe signal are supplied as outputs. The power...
US-7,079,431 Arrangement with a memory for storing data
An arrangement with a memory for storing data has a first memory for storing data, switching devices which stipulate whether access to the first memory involves...
US-7,079,428 Circuit for distribution of an input signal to one or more time positions
A control circuit and memory including the control circuit are described herein. The control circuit provides for controlling the edge gradient of transmission...
US-7,079,375 Set of integrated capacitor arrangements, especially integrated grid capacitors
A set of integrated capacitor arrangements is presented, each of which has a circuitry-effective main capacitor and a connectable correction capacitor. Each...
US-7,079,069 Analog-digital converter and method for analog-digital converting
An analog-digital converter has a first register for holding a first approximation number which is variable in a first cycle and is fixed in a second cycle, as...
US-7,079,062 High-resolution digital-to-analogue converter with a small area requirement
Digital-to-analogue converter for converting a digital input signal into an analogue output signal includes a resistor string with switchable taps, a decoder...
US-7,078,961 Device and method for calibrating R/C filter circuits
A calibration unit is designed to contain an oscillator circuit whose frequency is determined by the RC time constant of a resistor, which is of the same type as...
US-7,078,793 Semiconductor memory module
A semiconductor memory module includes a wiring board in or on which at least a number of data line runs are conducted in a respective width of k bits and which...
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