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Patent # Description
US-7,115,522 Method for manufacturing semiconductor device
A method for manufacturing a semiconductor device including a substrate to be processed having a conductive layer essentially consisting of platinum includes...
US-7,115,501 Method for fabricating an integrated circuit device with through-plating elements and terminal units
A method for fabricating an integrated circuit device, an electrically conductive substrate being provided, an insulation layer being deposited on the substrate,...
US-7,115,496 Method for protecting the redistribution layer on wafers/chips
The invention relates to a method for protecting the redistribution layer on wafers/chips, which preferably comprises a structure constructed from a seed layer,...
US-7,113,574 Integrated telephone set with an xDSL-modem
Integrated telephone with an xDSL-modem (2), comprising a splitter unit (6) for separating telephone signals received via a telephone line (9) in a low-frequency...
US-7,113,561 Clock control circuit for controlling the clock phase of a transceiver
A clock phase control circuit is provided for controlling the clock phase of a transceiver, having a sampling circuit for sampling an analog received signal with...
US-7,113,428 Method for operating a memory cell array
Prior to the reprogramming of a selected flash memory cell of a memory cell array, electrons being removed from the memory layer (M) in the channel region (C) by...
US-7,113,424 Energy adjusted write pulses in phase-change memories
A memory cell device that includes a plurality of phase-change memory cells, at least one write pulse generator, and at least one temperature sensor. The...
US-7,113,417 Integrated memory circuit
In a memory circuit integrated on a semiconductor chip, an interface system is formed between the connection pads and associated internal signal lines and...
US-7,113,024 Circuit module with high-frequency input/output interfaces
The invention relates to a circuit module with high-frequency input/output interfaces, and in particular to a circuit realized on a chip, principally a...
US-7,113,015 Circuit for setting a signal propagation time for a signal on a signal line and method for ascertaining timing...
A tuning circuit for setting a signal propagation time on a signal line in an integrated circuit, particularly a DRAM circuit, has a transistor and a capacitor....
US-7,113,010 Clock distortion detector using a synchronous mirror delay circuit
The invention refers to a clock distortion detection method, and a clock distortion detector including a first input for receiving a first clock signal, a second...
US-7,113,001 Chip to chip interface
A chip to chip interface comprises a driver configured to provide a first signal in response to a change in first data at one edge of a clock signal and a second...
US-7,112,947 Bandgap reference current source
Bandgap reference current source for generating a reference current (I.sub.REF) having: at least two bipolar transistors (T.sub.1, T.sub.2), the base terminals...
US-7,112,895 Reduced power consumption in integrated circuits with fuse controlled redundant circuits
System and method for reducing power consumption in integrated circuits (IC) with fuse controlled redundant circuits. A preferred embodiment comprises detecting...
US-7,112,868 IGBT with monolithic integrated antiparallel diode
An IGBT with monolithic integrated antiparallel diode has one or more emitter short regions forming the diode cathode in the region of the high-voltage edge. The...
US-7,112,507 MIM capacitor structure and method of fabrication
A method of forming a metal-insulator-metal (MIM) capacitor wherein a plate of a MIM capacitor is formed in the entire thickness of a metallization layer of a...
US-7,112,496 Method and structure of an auxiliary transistor arrangement used for fabricating a semiconductor memory device
Method for fabricating a semiconductor memory device having auxiliary transistor structures which are required for lithography and etching processes. A...
US-7,112,487 Method for fabricating a stacked capacitor array having a regular arrangement of a plurality of stacked capacitors
The present invention provides a method for fabricating a stacked capacitor array (1), which comprises a regular arrangement of a plurality of stacked capacitors...
US-7,111,263 Process for designing and manufacturing semi-conductor memory components, in particular DRAM components
The invention relates to a process for designing semi-conductor memory components, especially DRAM components, whereby the process comprises the following steps:...
US-7,111,143 Burst mode implementation in a memory device
A memory device, such as a DRAM, includes a memory array that is accessible for writing data in and reading data out, and a command decoder that decodes input...
US-7,110,932 Method and circuit arrangement for regulating the operating voltage of a digital circuit
A method and circuit arrangement for determining performance of a digital circuit to a critical degree by the transit time of signals of the longest signal path,...
US-7,110,836 Controllable appliance arrangement
A transmission/reception device is provided merely as an embedded system, and a domestic appliance control program and/or an industrial appliance control program...
US-7,110,369 Apparatus for placing power control data in a transmission signal
A device for placing power control data in a transmission signal has: a generating device for generating power control data as a function of a received signal, a...
US-7,110,310 RAM store and control method therefor
The invention relates to a RAM store having a shared SA structure, in which sense amplifiers (SA) arranged in SA strips (10) between two respective adjacent cell...
US-7,110,232 Semiconductor circuit with protective circuit
A semiconductor circuit in a semiconductor substrate includes a first input for feeding a first supply potential, a second input for feeding a second supply...
US-7,109,907 Systems and methods of bidirectional communication across an isolation barrier
A bi-directional isolation scheme is described in which digital data, including clock information, may be communicated bi-directionally across a single isolation...
US-7,109,827 Filter arrangement for balanced and unbalanced line systems
A filter arrangement includes one first resonator circuit connected between a first node and a second node. A second resonator circuit is connected between a...
US-7,109,796 Amplifying circuit with adjustable amplification and transmitter system comprising such an amplifying circuit
The invention is directed to an amplifier circuit with adjustable gain which includes a plurality of parallel-connected differential amplifiers connected to a...
US-7,109,785 Current source for generating a constant reference current
Current source for generating a constant reference current having an amplifier circuit, which outputs a negative feedback voltage, present across a first...
US-7,109,773 Flexible blender
A blender circuit configured to receive a first signal having a first signal phase and a second signal having a second signal phase. The first and second signals...
US-7,109,772 D-type flipflop
A flipflop having a clock input for applying a clock signal, a data input for applying a data signal, a noninverting output and an inverting output, where the...
US-7,109,762 Frequency-dividing circuit arrangement and phase locked loop employing such circuit arrangement
A frequency-dividing circuit arrangement is disclosed that includes a divider chain having a plurality of frequency divider stages. The frequency dividers can be...
US-7,109,544 Architecture for vertical transistor cells and transistor-controlled memory cells
In a substrate vertical transistor cells are formed and are arranged, in a transistor cell array, row by row in an x direction and column by column in a y...
US-7,109,524 Metal carrier (leadframe) for receiving and contact-connecting electrical and/or optoelectronic components
The invention relates to a metal carrier (leadframe) for receiving and contact-connecting electrical and/or optoelectronic components. According to the...
US-7,109,091 Method for processing a substrate to form a structure
A method for processing a substrate to produce a structure, for example an insulating trench, uses a lithographic mask exposure process. Conventionally, the...
US-7,108,807 Methods for producing a dielectric, dielectric having self-generating pores, monomer for porous dielectrics,...
Poly-o-hydroxyamides include binaphthyl substituents as repeating units. The poly-o-hydroxyamides can be cyclized to give the polybenzoxazole by heating. Pore...
US-7,108,798 Defect repair method, in particular for repairing quartz defects on alternating phase shift masks
The invention relates to a defect repair method, in particular for repairing quartz defects on alternating phase shift masks, wherein, for repairing defects (5)...
US-7,107,562 Method and apparatus for the arrangement of contact-making elements of components of an integrated circuit,...
The invention relates to a method and an apparatus for the arrangement of contact-making elements of components of an integrated circuit, a computer-readable...
US-7,107,501 Test device, test system and method for testing a memory circuit
A test device has an interface for connecting a memory circuit that is to be tested and for receiving fault addresses. The test device further has a fault...
US-7,107,465 PCI bus interface circuit for supplying either a main supply voltage or an auxiliary voltage to a PCI plug-in-card
The invention relates to a PCI bus interface circuit for supplying power to a PCI plug-in card that is connected to a PCI bus. The inventive PCI bus interface...
US-7,106,812 Device for the recovery of data from a received data signal
A CDR circuit arrangement, for example for a transceiver module, features a data recovery unit (4) for the recovery of the data contained in a received signal...
US-7,106,807 Method for estimating the frequency shift of a CPFSK signal
A method for estimating the frequency shift of a CPFSK signal includes scanning the CPFSK signal. Intermediate signal values are determined for the scanned CPFSK...
US-7,106,753 Interpolated timing recovery system for communication transceivers
Interconnected master and slave transceivers provide data communication between host computers. Each transceiver receives and encodes elements of a first data...
US-7,106,654 Arrangement comprising a memory device and a program-controlled unit
An arrangement comprises a memory device for storing data, and a program-controlled unit with a memory interface for reading data out of the memory device. The...
US-7,106,614 Memory circuit and method for providing an item of information for a prescribed period of time
The invention relates to a memory circuit for providing an item of information for a prescribed period of time. The memory circuit has a memory cell with a PMC...
US-7,106,606 Voltage-current converter with adjustable quiescent current
Method for controlling an output signal (A) of a voltage-current converting device, to which a reference voltage (U.sub.REF) is fed and in which a voltage signal...
US-7,106,251 Receiver in a position-finding system and method for position-finding with increased sensitivity
The invention relates to a receiver in a position-finding system, having a calculation unit for calculating a statistical value from a received signal, and a...
US-7,106,141 Phase locked loop
The phase locked loop according to the invention has an adjustable charge pump (2) which is intended to generate a control voltage (UVCO). A voltage-controlled...
US-7,106,091 Circuit configuration and method for detecting an unwanted attack on an integrated circuit
A circuit configuration for detecting an unwanted attack on an integrated circuit has a signal line to which a clock signal is applied and at least one line pair...
US-7,105,415 Method for the production of a bipolar transistor
The invention relates to a method for producing a bipolar transistor. A semiconductor substrate is provided that encompasses a collector area of a first...
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