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Memory circuit with an optical input
A memory circuit includes a plurality of memory cells, an input/output area for addressing or writing onto the plurality of memory cells by means of electrical...
Adjustment circuit and method for tuning of a clock signal
An integrated circuit and a method for tuning an internal clock signal with respect to data that is to be emitted includes an adjustment circuit with a...
Data transmission network
Data transmission network having a least one line termination device connected via a data transmission medium to several network termination devices, each...
Differential current evaluation circuit and sense amplifier circuit for
evaluating a memory state of an SRAM...
A differential current evaluation circuit has a differential amplifier and a circuit for setting an input resistance of the current evaluation circuit. The...
Double-decker MRAM cells with scissor-state angled reference layer
magnetic anisotropy and method for fabricating
A double-decker MRAM cell is provided, including a stacked structure of first and second magnetic tunnel junctions. Each magnetic tunnel junction includes free...
Measurement of optical properties of radiation sensitive materials
A system and method for measuring optical properties of films deposited or formed on semiconductor wafers. Measurements of an optical property are made in a...
An integrator circuit has an integrator unit performed to generate an integrated signal from a modulated input signal. Additionally, the integrator circuit has...
Circuit arrangement for generating a reference current and oscillator
circuit having the circuit arrangement
A circuit arrangement for generating a reference current and also an oscillator circuit having the circuit arrangement are disclosed the arrangement includes a...
Monolithically integrated power amplifier device
A monolithically integrated microwave amplifier device, comprises an input for receiving a microwave signal, a first power amplifier stage (11; 32) having an...
Semiconductor circuit regulator
In a circuit designed to output a varying output voltage, the substrate of the semi-conductor component is connected to a regulator, in particular a switch,...
Method of etching ferroelectric devices
A method of etching a ferroelectric device 100 having a ferroelectric layer 112 between a top and a bottom electrode 114, 108 is disclosed herein. Hardmasks 116,...
Method for correcting local loading effects in the etching of photomasks
A method for correcting local loading-effects in photomask etching includes the steps of determining the location-dependent density of structures of a mask;...
Magnetic switching device
A method of forming a magnetic switching device is provided. The method includes depositing a bilayer hardmask, which may comprise a first mask layer of titanium...
Method and configuration for conditioning a polishing pad surface
A method and a configuration for conditioning a polishing pad surface are described. The method includes measuring a rotation table current or voltage as an...
Contactless data storage medium and method for operating contactless data
A contactless data storage medium having a principal circuit component and a coupling element, with a controllable load provided for performing offloading...
Method for determining the critical path of an integrated circuit
A method of determining the critical path of a circuit includes first determining the paths, their mean path transit times and their path transit time...
Circuit configuration for simulating the input or output load of an analog
In order to simulate the input or output load of an analog circuit, the output of the analog circuit is connected to the input of a driver stage. A measuring...
Measuring flare in semiconductor lithography
Systems, methods, and lithography masks for measuring flare in semiconductor lithography. A layer of photosensitive material is exposed to a first test pattern...
Method of reconstructing data transmitted over a transmission path in a
receiver and corresponding device
To reconstruct data transmitted over a transmission path, for example a cable, the corresponding signal received by the receiver is firstly amplified and...
Digital precoding filter for a transmission filter
Digital precoding filter for a transmission filter (6) for minimizing the chrest [sic] factor of the signal (y) output by the transmission filter (6), having a...
Method and device for generating a rate compatible code
A method and a device for generating a rate compatible code are described. In the method, a serial-concatenated code at a code rate that can be predetermined is...
Refresh for dynamic cells with weak retention
Methods and circuit configurations for utilizing memory cells having weak retention times are provided. For some embodiments, rows identified as having weak...
A/D converter with minimized transfer error
An A/D converter has at least one converter stage which, respectively, has a sample and hold circuit for sampling an analog input signal. The converter stage...
Differential amplifier arrangement with current regulating circuit and
method for operating a differential...
Provision is made of a differential amplifier arrangement with a current source (S1), two controllable paths (T1, T2), which are in each case coupled by one...
Method for producing a control signal which indicates a frequency error
A method which provides a very simple way of forming a control signal if the frequencies differ too greatly from one another between a useful signal and a...
RF power LDMOS transistor with multiple gate fingers
In an RF power LDMOS transistor comprising multiple pairs of parallel gate fingers (11) located on opposite side of an associated p.sup.+ sinker (23), and metal...
Charge trapping memory cell
In a charge trapping memory cell, programming occurs by trapping hot electrons from the channel region in a storage layer. The erasure occurs by Fowler-Nordheim...
Optical transmitter module
The invention relates to an optical transmitting module which has at least one first semiconductor chip which in each case has at least one vertical ...
Method for production of contacts on a wafer
The invention relates to a method for production of contacts on a wafer, preferably with the aid of a lithographic process. The preferred embodiment provides a...
Transistor with shallow germanium implantation region in channel
A method of manufacturing a transistor and a structure thereof, wherein a very shallow region having a high dopant concentration of germanium is implanted into a...
Gate electrode for FinFET device
In a method of forming a semiconductor device, a self-planarizing conductive layer is formed over a substrate that includes a topography having sharp drop-offs....
Method for fabricating an NROM memory cell array
In the method, trenches are etched and, in between, bit lines (8) are in each case arranged on doped source/drain regions (3, 4). Storage layers (5, 6, 7) are...
Method for minimizing the vapor deposition of tungsten oxide during the
selective side wall oxidation of...
During a selective oxidation of gate structures that includes a polycrystalline silicon layer and a tungsten layer, which is known per se, a vapor deposition of...
Method for determining an optimal absorber stack geometry of a
lithographic reflection mask
The present invention relates to a method for determining an optimal absorber stack geometry of a lithographic reflection mask comprising a reflection layer and...
Method and apparatus for caching short program loops within an instruction
A method and an apparatus for reading instruction codes and for forwarding the corresponding instructions to the instruction unit that are distinguished, in...
Apparatus and method for signal strength compensation of highly
time-variant mobile radio channels and...
A signal strength compensation unit for mobile radio receivers is connected upstream of the channel estimator and the channel equalizer and compensates for, in...
Bidirectional transmitting and receiving device
A bidirectional transmitting and receiving device includes a transmitting component with an emission area of a first size, and a receiving component with a...
Apparatus and method for regulating an SLIC supply voltage
Control circuit and method for regulating the supply voltage of an SLIC circuit (15), having a monitoring circuit (36) for calculating an SLIC supply voltage...
A dummy capacitor drive potential VDC is given to one electrode of a dummy capacitor, and a reference potential for determining a data value of a memory cell is...
Dynamic memory and method for testing a dynamic memory
The invention relates to a dynamic memory having a memory cell array, a test controller to test the memory cell array and an oscillator to control the refreshing...
Memory apparatus having a short word line cycle time and method for
operating a memory apparatus
Memory apparatus having a short word line cycle time and method for operating a memory apparatus. One embodiment provides a memory apparatus comprising at least...
MRAM with magnetic via for storage of information and field sensor
A magnetic memory element is disclosed. The magnetic memory element includes a magnetic via for storing information, made of a magnetic material and being...
Ferroelectric memory device
A ferroelectric memory device includes a memory cell array having memory cells arranged in a matrix form. Each of the memory cells includes a cell transistor and...
Circuit arrangement for supplying voltage to a load
A circuit arrangement supplies voltage to a load during normal operation and in a standby mode. The arrangement has the following features: input terminals for...
Circuit arrangement for voltage regulation
Circuit arrangement for voltage regulation having a voltage divider and a regulating circuit. The voltage divider is arranged between a first potential and a...
Duty distortion detector
A duty distortion detector comprises a first synchronous mirror delay configured to mirror a first signal with respect to a clock signal to provide a second...
Dual damascene structure and method
A dual damascene structure and method of fabrication thereof. An insulating layer comprises a first dielectric material and a second dielectric material, the...
Semiconductor device with semiconductor chip and rewiring layer and method
for producing the same
The invention relates to a semiconductor device with a semiconductor chip and a rewiring layer, the semiconductor chip being embedded in a housing plastics...
The power transistor has a trench cell in a semiconductor body. A lower edge of the gate electrode has a profile which is not horizontal, i.e., not planar with...
Semiconductor component with increased dielectric strength and/or reduced
The invention relates to a semiconductor component having a first semiconductor zone of a first conduction type, a second semiconductor zone of a second...