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Patent # Description
US-7,176,519 Memory cell, memory cell arrangement and method for the production of a memory cell
A memory cell, memory cell arrangement, and method for producing a memory cell arrangement is described where electric charge carriers can be introduced from a...
US-7,176,514 Method and configuration for reinforcement of a dielectric layer at defects by self-aligning and self-limiting...
A method for producing a dielectric layer on a substrate made of a conductive substrate material includes reducing a leakage current that flows through defects...
US-7,176,131 Electronic component having at least one semiconductor chip and flip-chip contacts, and method for producing...
An electronic component has a semiconductor chip and microscopically small flip-chip contacts belonging to a rewiring plate, on which macroscopically large...
US-7,176,128 Method for fabrication of a contact structure
A method for producing a contact structure on a structured surface comprising producing a first conductive layer on the structured surface, wherein the first...
US-7,176,088 Bitline structure and method for production thereof
The invention relates to a bit line structure having a surface bit line (DLx) and a buried bit line (SLx), the buried bit line (SLx) being formed in a trench...
US-7,176,059 Method of fabricating an electronic component having at least one semiconductor chip on a circuit carrier with...
An electronic component includes at least one semiconductor chip, which has an active chip top side with contact areas and has a chip rear side arranged on a...
US-7,176,057 Power module comprising at least two substrates and method for producing the same
A power module and a method for producing it. The power module has a first substrate having power semiconductor chips, and a second substrate populated with...
US-7,173,993 Method for sampling phase control
Method for sampling phase control for clock and data recovery of a data signal includes sampling a received data signal with a first sampling signal comprising...
US-7,173,982 Method and circuit for digitally correcting the frequency of a signal
A method and a circuit for the digital correction of a frequency of a signal, especially for use in a transmitter/receiver circuit include rotating a signal...
US-7,173,877 Memory system with two clock lines and a memory device
The present invention relates to a memory system having a memory device with two clock lines. One embodiment of the present invention provides a memory system...
US-7,173,557 Analog/digital converter
An A/D converter for converting an analog input into a binary-encoded word includes a bit-weight memory storing bit weights that include maximum, mimimum, and...
US-7,173,473 Level-shifting circuitry having "high" output impedance during disable mode
A level shifting circuit includes a level-shifting section responsive to an input logic signal, which varies between a first voltage level (e.g., ground) and a...
US-7,173,306 Vertical semiconductor component having a drift zone having a field electrode, and method for fabricating such...
The invention relates to a method for fabricating a drift zone of a vertical semiconductor component and to a vertical semiconductor component having the...
US-7,173,302 Integrated circuit arrangement having capacitors and having planar transistors and fabrication method
An integrated circuit arrangement and method of fabricating the integrated circuit arrangement is described. The integrated circuit arrangement contains an...
US-7,172,966 Method for fabricating metallic interconnects on electronic components
The invention, which relates to a method for fabricating metallic interconnects with copper-nickel-gold layer construction on electronic components, is based on...
US-7,172,954 Implantation process in semiconductor fabrication
A semiconductor device is formed by performing an amorphizing ion implantation to implant dopants of a first conductivity type into a semiconductor body. The...
US-7,171,849 Sensor module
The invention relates to a sensor module in a flexible housing with integrated transmission means. A possible application of such a flexible sensor module would...
US-7,171,611 Apparatus for determining the access time and/or the minimally allowable cycle time of a memory
An apparatus for determining the access time and the minimally allowable cycle time of a memory, comprising a clock for generating a signal which stimulates...
US-7,171,596 Circuit and method for testing embedded DRAM circuits through direct access mode
A circuit and method for testing an eDRAM through a test controller with direct access (DA) mode logic is provided. The circuit and method of the present...
US-7,171,327 Temperature sensor scheme
A temperature sensing circuit, and method of using the same. A temperature sensing circuit includes a comparator, a temperature reference circuit and trimmer....
US-7,170,819 Integrated semiconductor memory device for synchronizing a signal with a clock signal
A semiconductor memory includes a control circuit for generating an internal read command signal depending on an externally applied read command signal. A clock...
US-7,170,813 Memory circuit receivers activated by enable circuit
A memory circuit comprises an enable circuit and a receiver. The enable circuit is configured to receive an internal clock signal and provide an enable signal...
US-7,170,808 Power saving refresh scheme for DRAMs with segmented word line architecture
Techniques and apparatus that may be utilized to reduce current consumption during refresh cycles of DRAM devices that utilize wordline segments are provided....
US-7,170,804 Test mode for detecting a floating word line
Devices and methods that allow floating word lines in memory arrays to be detected are provided. By driving local word lines from each side with divided drive...
US-7,170,798 Controlled substrate voltage for memory switches
Active control of body contacts in memory devices can provide variable substrate voltages during device operation. The body contacts can be used to adjust the...
US-7,170,797 Test data topology write to memory using latched sense amplifier data and row address scrambling
For one or more disclosed embodiments, a test data topology may be written to memory by writing data into an initial row of memory cells. The writing of data...
US-7,170,360 Device and method for digital pulse width modulation
The present invention provides a device for digital pulse width modulation with: (a) a filter device (11) for filtering a filter input signal (10''); (b) a...
US-7,170,359 Amplitude-controlled oscillator circuit and method for operating an amplitude-controlled oscillator circuit
An amplitude-controlled oscillator circuit includes an oscillator for providing a frequency signal having a controllable signal amplitude, a divider circuit for...
US-7,170,356 Circuit with variable capacitance and method for operating a circuit with variable capacitance
A circuit with variable capacitance includes a capacitance, wherein the capacitance includes a first partial capacitance and a second partial capacitance...
US-7,170,173 Magnetically lined conductors
A conductor with improved magnetic field per current ratio is disclosed. The conductor includes a magnetic liner lining a second surface and sides thereof. The...
US-7,170,125 Capacitor with electrodes made of ruthenium and method for patterning layers made of ruthenium or ruthenium
A method for patterning layers made of ruthenium or ruthenium(IV) oxide and a capacitor comprising at least one electrode which is constructed from ruthenium or...
US-7,170,107 IC chip having a protective structure
An IC chip having a protective structure that is distributed over the semiconductor chip in such a manner that it is not possible to trigger a malfunction in the...
US-7,169,716 Photosensitive lacquer for providing a coating on a semiconductor substrate or a mask
A photosensitive resist (100) for coating on a semiconductor substrate or a mask comprises a photo acid generator (D), a solvent (E) and at least two different...
US-7,169,677 Method for producing a spacer structure
A method for fabricating a spacer structure includes: forming a gate insulation layer having a gate deposition-inhibiting layer, a gate layer and a covering...
US-7,169,658 Method for formation of an ultra-thin film and semiconductor device containing such a film
A method of manufacturing an ultra-thin PZT pyrochlore film comprises providing a structure comprising a base layer, and forming on the base layer, a titanium...
US-7,169,647 Connection between a semiconductor chip and an external conductor structure and method for producing it
A conductive connection is made between a semiconductor chip and an external conductor structure. An elevation element is applied on the surface of the...
US-7,169,531 Photoresist suitable for use in 157 nm photolithography and including a polymer based on fluorinated norbornene...
A photoresist that is suitable for use in 157 nm photolithography includes a polymer based on fluorinated norbornene derivatives.
US-7,167,936 Circuit board having an integrated circuit for high-speed data processing
Circuit board having a plurality of bus lines (6), which run on the circuit board (1) essentially parallel to a preferred direction of the circuit board (1), and...
US-7,167,911 Deactivation of transceivers to a standby state with a hot start capability
In a data transmission a system controller generates a deactivation signal when a data stream between a subscriber transceiver and an exchange transceiver has no...
US-7,167,492 Optoelectronic arrangement having at least one laser component, and a method for operating a laser component
An optoelectronic arrangement includes at least one laser component. A heating device for heating the laser component up to a constant temperature is provided in...
US-7,167,395 Non-volatile semiconductor memory
A method for determining a reading voltage for reading data out of a non-volatile semiconductor memory, wherein the semiconductor memory comprises a plurality of...
US-7,167,388 Integrated circuit and method for operating an integrated circuit
An integrated circuit having at least one line pair to which a dual-rail signal is applied, a switching device, which is connected to the at least one line pair,...
US-7,166,900 Semiconductor memory device
A semiconductor memory device comprises a temperature dependent voltage source for outputting a voltage at its output in dependence on a temperature measured in...
US-7,166,533 Phase change memory cell defined by a pattern shrink material process
One embodiment of the present invention provides a memory cell device. The memory cell device includes a first electrode, a phase-change material adjacent the...
US-7,166,393 Reflection mask for projecting a structure onto a semiconductor wafer and method for producing the mask
A reflection mask for projecting a structure onto a semiconductor wafer contains a carrier material, a layer stack for reflecting obliquely incident light and...
US-7,165,198 System for testing an integrated circuit using multiple test modes
A system for testing an integrated circuit at a plurality of locations with a plurality of test modes includes a sequence of test-mode storage devices, each of...
US-7,165,002 Test device for dynamic memory modules
A test device for dynamic memory modules is described and has an electronic test unit for generating test signals. Accordingly, the electronic test unit has at...
US-7,165,000 Method and apparatus for calibrating data-dependent noise prediction
Disclosed herein is an apparatus and method of calibrating the parameters of a Viterbi detector 138 in which each branch metric is calculated based on noise...
US-7,164,708 Line termination device for a telephone subscriber line
In the line terminating device, which is provided for transmitting and receiving narrowband low-frequency voice signals and broadband data signals at a higher...
US-7,164,613 Flexible internal address counting method and apparatus
A method of controlling an internal address counter which provides a count used in accessing a storage cell array to provide increased flexibility in the...
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