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Patent # Description
US-7,142,478 Clock stop detector
A clock stop detector for a memory comprises a first switch that closes in response to a first logic level of a clock signal to charge a capacitor, a second...
US-7,142,473 Semiconductor device having semiconductor memory with sense amplifier
A semiconductor device comprises a memory cell array, bit line, /bit line complementary to the bit line, reference voltage generating circuit and sense...
US-7,142,143 Time-continuous sigma/delta analog-to-digital converter
Time-continuous sigma/delta analog-to-digital converter for converting an analog input signal into a digital output signal (D), having at least one analog filter...
US-7,142,070 Two-point modulator arrangement
A two-point modulator arrangement is specified, said arrangement being developed with respect to conventional two-point modulators to the effect that the...
US-7,142,069 Method and circuit arrangement for amplitude regulation of an oscillator signal
A circuit arrangement for controlling an amplitude of an oscillator signal is accomplished by comparing the oscillator signal to reference signals. The amplitude...
US-7,142,063 Two-point modulator comprising a PLL circuit and a simplified digital pre-filtering system
A two-point modulator includes a PLL circuit and a simplified digital pre-filtering system. The two-point modulator includes a first circuit path for impressing...
US-7,142,059 Amplifier arrangement
The invention provides an amplifier arrangement which is of multistage design. The output transistor in the output stage has a coupling path between its control...
US-7,142,038 Selection circuit
A selection circuit having a comparator with comparator inputs connected to first and second voltage inputs), respectively, and a comparator output connected to...
US-7,141,845 DRAM cell array and memory cell arrangement having vertical memory cells and methods for fabricating the same
Memory cells each having a cell capacitor and a cell transistor, which are arranged in a vertical cell structure, are provided in the cell array of a DRAM. By...
US-7,141,507 Method for production of a semiconductor structure
A method for producing a semiconductor structure including preparing a semiconductor substrate, and generating a lower first, a middle second and an upper third...
US-7,141,479 Bipolar transistor and method for producing the same
A method for producing a bipolar transistor is described, which comprises providing a layer sequence, which comprises a substrate, a first oxide layer and a SOI...
US-7,141,338 Sub-resolution sized assist features
Corner rounding and image shortening is substantially reduced in an image printed on a substrate by illuminating a photolithographic mask and projecting light...
US-7,140,547 Data storage configuration having a display device
A portable data storage configuration has a card base and a display device, the display device being fixed to the card base. The display device is only partially...
US-7,139,943 Method and apparatus for providing adjustable latency for test mode compression
An integrated circuit includes a core memory array and a test mode compression circuit. The test mode compression circuit receives test mode data from the core...
US-7,139,341 Receiver circuit for a communications terminal and method for processing signals in a receiver circuit
A receiver circuit for a communications terminal includes a signal pre-processing circuit having: an analog/digital converter device with K analog/digital...
US-7,139,310 Method for transmitting data streams, and warm start sequence for S(H)DSL transmission/reception devices
The invention relates to a method for transmitting data streams where transmission/reception devices (LTU, NTU) deactivated to a standby state are activated by...
US-7,139,305 Configurable terminal engine
A configurable cellular terminal engine (CTE) in accordance with an exemplary embodiment of this invention is configurable by an external agent (e.g.,...
US-7,139,290 Transmitting data into a memory cell array
A method for transmitting a data stream from a circuit unit to a memory cell array includes receiving the data stream and demultiplexing it in response to a...
US-7,139,245 Priority handling of voice over data in a voice-over-internet protocol processor
An apparatus for processing packets in a multimedia terminal has a media access controller to send and receive packets from a network. A digital signal processor...
US-7,139,206 Memory component with improved noise insensitivity
A memory component comprises a memory cell array, signal inputs, input amplifiers connected to respective ones of the signal inputs, for receiving, amplifying...
US-7,139,184 Memory cell array
A memory cell array includes memory cells, bit lines running along a first direction, word lines running along a second direction perpendicular to the first...
US-7,138,857 Signal processing device for mobile radio
A signal processing device includes a conversion device configured to output a differential current signal at two taps on the basis of an input signal and an...
US-7,138,680 Memory device with floating gate stack
A memory device comprises a substrate including isolation regions and active regions, and a floating gate stack proximate the substrate. The floating gate stack...
US-7,138,677 Capacitor arrangement with capacitors arranged one in the other
Arrangement of capacitors which, without taking up an additional area in the semiconductor substrate, have an increased capacitance compared with conventional...
US-7,138,661 Optoelectronic component and optoelectronic arrangement with an optoelectronic component
An optoelectronic component with an optoelectronic transducer device and an electrical circuit electrically connected to the transducer device mounted on a...
US-7,138,333 Process for sealing plasma-damaged, porous low-k materials
The invention relates to a process for sealing plasma-damaged, porous low-k materials on Si substrates, in which self-aligning molecules (SAMs) are applied to...
US-7,137,061 Method and device for signaling a transmission fault on a data line
A method and a configuration produce a fault signal that is suitable for identifying transmission faults when using differential signaling. A first mid-level...
US-7,137,056 Low error propagation rate 32/34 trellis code
The present invention relates to a coding system characterized by various combinations of the following properties: 1) Even parity at the output of d of the...
US-7,137,049 Method and apparatus for masking known fails during memory tests readouts
Embodiments of the present invention generally provide methods and apparatus for testing memory devices having normal memory elements and redundant memory...
US-7,136,411 Method for transmitting an analog data stream with prevention of secondary minima, and circuit arrangement
The invention creates a method for transmitting an analog data stream in which secondary minima are prevented during an equalization of the analog data stream at...
US-7,136,320 Method and regulating circuit for refreshing dynamic memory cells
A method and circuit for refreshing dynamic memory cells arranged along word lines and bit lines are provided, the memory cells being refreshed in a manner...
US-7,136,295 Semiconductor arrangement
A semiconductor arrangement on a semiconductor chip includes a number of lines of a first type that extend outwardly from an inner region toward an outer region...
US-7,136,292 Power supply and method for regulating supply voltage
In a preferred embodiment, there is provided a switched mode power supply operable in start-up mode, normal mode and standby mode. The power supply may comprise...
US-7,135,999 Circuit arrangement for compensation for nonlinearities from analog/digital converters operating with different...
A circuit arrangement (10) for compensating for nonlinearities (NL1, NL2) from analog/digital converters (15, 16) operating with different timing, having at...
US-7,135,936 Output buffer with inductive voltage divider
An output buffer is disclosed and includes a differential output buffer input configured for coupling to a differential output of an input circuit. The output...
US-7,135,845 Drive circuit for a switch in a switching converter and method for driving a switch in a switching converter
The present invention relates to a drive circuit for a switch (T) connected to a rectifier arrangement in a switching converter which provides an output voltage...
US-7,135,757 Bipolar transistor
A bipolar transistor includes a first layer with a collector. A second layer has a base cutout for a base. A third layer includes a lead for the base. The third...
US-7,135,723 Integrated circuit with a test circuit
An integrated circuit with a test circuit having a measurement converter circuit and an activation unit. The measurement converter circuit converts one or more...
US-7,135,255 Layout impact reduction with angled phase shapes
A phase shift mask shape that reduces line-end shortening at the critical feature without changing layout size increases required of requisite phase shift rules....
US-7,134,605 Chip card module
A chip card module is provided for insertion into a card body. The chip card module has at least one component, for example a keypad, fitted on an intermediate...
US-7,134,102 Automated layout transformation system and method
A system, an automatic machine-implemented method, and a machine-readable medium recording a set of instructions to perform such method are provided for...
US-7,133,979 Method of transferring data between a first device and a second device while manipulating at least one quantity...
A method for transferring data between a first device and a second device is provided. In the method an address identifying the second device is output by the...
US-7,133,953 Data transmission device used to forward data received at a first device for a second device to the second device
A data transmission device is used to forward data that have been received from a first device, and are intended for a second device, to the second device. The...
US-7,133,541 Method for analyzing fingerprint images
A method for analyzing fingerprint images includes picking up a sequence of images at very short time intervals, while a finger is being placed onto an...
US-7,133,470 Receiver with offset compensation
Receiver for receiving a received signal with a carrier frequency loop (18) which generates a carrier frequency deviation detection signal (TF) for detecting a...
US-7,133,438 Acquisition method and apparatus for carrying out the method
Communications acquisition method for correlating an incoming binary-coded spread sequence having m bits and arriving at a frequency f with a locally generated...
US-7,133,433 Method and apparatus for enhancing data rates in spread spectrum communication systems
A high data transmitter and a high data receiver that uses both Walsh codes and quasi orthogonal functions in spreading and despreading transmitted and received...
US-7,133,424 Method and device for synchronizing a mobile radio receiver with a time slot structure of a received radio signal
In a method for synchronizing a mobile radio receiver with a radio signal time slot structure a first portion, detected during a first time slot period, and a...
US-7,132,858 Logic circuit
A logic circuit includes an input for one or several input operands, an output for a result and an inverted result, a first circuit branch with a first logic...
US-7,132,843 Method and apparatus for positioning a test head on a printed circuit board
A method and apparatus for positioning a test head with respect to a printed circuit board. Adjusting marks having two parts, a frame and a mark positioned...
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