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Signal processing device for mobile radio
A signal processing device includes a conversion device configured to output a differential current signal at two taps on the basis of an input signal and an...
Memory device with floating gate stack
A memory device comprises a substrate including isolation regions and active regions, and a floating gate stack proximate the substrate. The floating gate stack...
Capacitor arrangement with capacitors arranged one in the other
Arrangement of capacitors which, without taking up an additional area in the semiconductor substrate, have an increased capacitance compared with conventional...
Optoelectronic component and optoelectronic arrangement with an
An optoelectronic component with an optoelectronic transducer device and an electrical circuit electrically connected to the transducer device mounted on a...
Process for sealing plasma-damaged, porous low-k materials
The invention relates to a process for sealing plasma-damaged, porous low-k materials on Si substrates, in which self-aligning molecules (SAMs) are applied to...
Method and device for signaling a transmission fault on a data line
A method and a configuration produce a fault signal that is suitable for identifying transmission faults when using differential signaling. A first mid-level...
Low error propagation rate 32/34 trellis code
The present invention relates to a coding system characterized by various combinations of the following properties: 1) Even parity at the output of d of the...
Method and apparatus for masking known fails during memory tests readouts
Embodiments of the present invention generally provide methods and apparatus for testing memory devices having normal memory elements and redundant memory...
Method for transmitting an analog data stream with prevention of secondary
minima, and circuit arrangement
The invention creates a method for transmitting an analog data stream in which secondary minima are prevented during an equalization of the analog data stream at...
Method and regulating circuit for refreshing dynamic memory cells
A method and circuit for refreshing dynamic memory cells arranged along word lines and bit lines are provided, the memory cells being refreshed in a manner...
A semiconductor arrangement on a semiconductor chip includes a number of lines of a first type that extend outwardly from an inner region toward an outer region...
Power supply and method for regulating supply voltage
In a preferred embodiment, there is provided a switched mode power supply operable in start-up mode, normal mode and standby mode. The power supply may comprise...
Circuit arrangement for compensation for nonlinearities from
analog/digital converters operating with different...
A circuit arrangement (10) for compensating for nonlinearities (NL1, NL2) from analog/digital converters (15, 16) operating with different timing, having at...
Output buffer with inductive voltage divider
An output buffer is disclosed and includes a differential output buffer input configured for coupling to a differential output of an input circuit. The output...
Drive circuit for a switch in a switching converter and method for driving
a switch in a switching converter
The present invention relates to a drive circuit for a switch (T) connected to a rectifier arrangement in a switching converter which provides an output voltage...
A bipolar transistor includes a first layer with a collector. A second layer has a base cutout for a base. A third layer includes a lead for the base. The third...
Integrated circuit with a test circuit
An integrated circuit with a test circuit having a measurement converter circuit and an activation unit. The measurement converter circuit converts one or more...
Layout impact reduction with angled phase shapes
A phase shift mask shape that reduces line-end shortening at the critical feature without changing layout size increases required of requisite phase shift rules....
Chip card module
A chip card module is provided for insertion into a card body. The chip card module has at least one component, for example a keypad, fitted on an intermediate...
Automated layout transformation system and method
A system, an automatic machine-implemented method, and a machine-readable medium recording a set of instructions to perform such method are provided for...
Method of transferring data between a first device and a second device
while manipulating at least one quantity...
A method for transferring data between a first device and a second device is provided. In the method an address identifying the second device is output by the...
Data transmission device used to forward data received at a first device
for a second device to the second device
A data transmission device is used to forward data that have been received from a first device, and are intended for a second device, to the second device. The...
Method for analyzing fingerprint images
A method for analyzing fingerprint images includes picking up a sequence of images at very short time intervals, while a finger is being placed onto an...
Receiver with offset compensation
Receiver for receiving a received signal with a carrier frequency loop (18) which generates a carrier frequency deviation detection signal (TF) for detecting a...
Acquisition method and apparatus for carrying out the method
Communications acquisition method for correlating an incoming binary-coded spread sequence having m bits and arriving at a frequency f with a locally generated...
Method and apparatus for enhancing data rates in spread spectrum
A high data transmitter and a high data receiver that uses both Walsh codes and quasi orthogonal functions in spreading and despreading transmitted and received...
Method and device for synchronizing a mobile radio receiver with a time
slot structure of a received radio signal
In a method for synchronizing a mobile radio receiver with a radio signal time slot structure a first portion, detected during a first time slot period, and a...
A logic circuit includes an input for one or several input operands, an output for a result and an inverted result, a first circuit branch with a first logic...
Method and apparatus for positioning a test head on a printed circuit
A method and apparatus for positioning a test head with respect to a printed circuit board. Adjusting marks having two parts, a frame and a mark positioned...
Integrated semiconductor circuit having a logic and power metallization
without intermetal dielectric
An integrated semiconductor circuit having a first and a second portion of a substrate, in which a power semiconductor circuit structure and a logic circuit...
Charge-trapping memory device and method of production
Charge-trapping regions are arranged beneath lower edges of the gate electrode separate from one another. Source/drain regions are formed in self-aligned manner...
Transistor, memory cell array and method of manufacturing a transistor
A transistor, memory cell array and method of manufacturing a transistor are disclosed. In one embodiment, the invention refers to a transistor, which is formed...
Coding method for coding control commands for actuators and actuator
control unit for controlling actuators
A coding method for coding control commands for actuators includes a system that is sensitive to data transmission errors and determines a degree of danger for...
Configuration and method having a first device and a second device
connected to the first device through a...
A configuration and method for operating the configuration includes first and second devices connected to one another through a cross bar and accessing one...
Method for timing the output of data packets from network nodes, a network
node, and a network
A method for timing the output of data packets from network nodes, in which the current fill level of the buffer memory of a queue of the network node is first...
Content addressable memory cell including resistive memory elements
A content addressable memory cell is described. In one embodiment, the content addressable memory cell includes first and second resistive memory elements being...
Chip to chip interface
A chip to chip interface comprising a signal line configured to receive a first signal and a receiver. The receiver is configured to provide a first output...
Method for avoiding transients during switching processes in integrated
circuits, and an integrated circuit
In a method for avoiding transients during switching processes in integrated circuits, a module of the integrated circuit is switched from a first operating...
Voltage regulator with a current mirror for partial current decoupling
A voltage regulator having a current mirror for decoupling a partial current icluding a first NMOS transistor as a series transistor. In addition, the voltage...
Electronic component having at least one semiconductor chip on a circuit
carrier and method for producing the same
An electronic component includes at least one semiconductor chip, which has an active chip top side with contact areas and has a chip rear side arranged on a...
Semiconductor circuit arrangement with trench isolation and fabrication
An explanation is given of, inter alia, a circuit arrangement containing a trench which penetrates through a charge-storing layer (18) and a doped semiconductor...
Process for producing and removing a mask layer
A semiconductor substrate is provided, on which there is arranged a first layer, a second layer and a third layer. The third layer is, for example, a resist mask...
Method for fabricating an integrated circuit
In an integrated circuit having a first circuit part and at least one second circuit part, which is assigned to a specific functionality of the first circuit...
Process for producing a plurality of gate stacks which are approximately
the same height and equidistant on a...
Process for producing a plurality of gate stacks approximately the same height and equidistant on a semiconductor substrate. The process includes providing a...
Method for fabricating a short channel field-effect transistor
A method for fabricating a short channel field-effect transistor is presented. A sublithographic gate sacrificial layer is formed, as are spacers at the side...
Device and method to carry out a viterbi-algorithm
An apparatus and method for executing a Viterbi algorithm includes initial state registers, at least one transition register, and an adder/subtracter network....
Test method and test device for electronic memories
A test method for electronic memories includes reading out a previously defined test pattern sequentially as a time-dependent signal from the memory, determining...
Power analysis resistant coding device
A coding device for implementing a cryptographic encryption and/or access authorization includes a data processing unit, a decoupling unit, a power supply...
Semiconductor device comprising transition detecting circuit and method of
activating the same
A semiconductor device includes an internal power supply, at least one semiconductor circuit block, a delay circuit, and a detecting circuit. The internal power...
Method for determining the optimum access strategy
A configuration for executing data processing processes has an operating system and various system resources that are accessed by the operating system using an...