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Circuit with variable capacitance and method for operating a circuit with
A circuit with variable capacitance includes a capacitance, wherein the capacitance includes a first partial capacitance and a second partial capacitance...
Magnetically lined conductors
A conductor with improved magnetic field per current ratio is disclosed. The conductor includes a magnetic liner lining a second surface and sides thereof. The...
Capacitor with electrodes made of ruthenium and method for patterning
layers made of ruthenium or ruthenium
A method for patterning layers made of ruthenium or ruthenium(IV) oxide and a capacitor comprising at least one electrode which is constructed from ruthenium or...
IC chip having a protective structure
An IC chip having a protective structure that is distributed over the semiconductor chip in such a manner that it is not possible to trigger a malfunction in the...
Photosensitive lacquer for providing a coating on a semiconductor
substrate or a mask
A photosensitive resist (100) for coating on a semiconductor substrate or a mask comprises a photo acid generator (D), a solvent (E) and at least two different...
Method for producing a spacer structure
A method for fabricating a spacer structure includes: forming a gate insulation layer having a gate deposition-inhibiting layer, a gate layer and a covering...
Method for formation of an ultra-thin film and semiconductor device
containing such a film
A method of manufacturing an ultra-thin PZT pyrochlore film comprises providing a structure comprising a base layer, and forming on the base layer, a titanium...
Connection between a semiconductor chip and an external conductor
structure and method for producing it
A conductive connection is made between a semiconductor chip and an external conductor structure. An elevation element is applied on the surface of the...
Photoresist suitable for use in 157 nm photolithography and including a
polymer based on fluorinated norbornene...
A photoresist that is suitable for use in 157 nm photolithography includes a polymer based on fluorinated norbornene derivatives.
Circuit board having an integrated circuit for high-speed data processing
Circuit board having a plurality of bus lines (6), which run on the circuit board (1) essentially parallel to a preferred direction of the circuit board (1), and...
Deactivation of transceivers to a standby state with a hot start
In a data transmission a system controller generates a deactivation signal when a data stream between a subscriber transceiver and an exchange transceiver has no...
Optoelectronic arrangement having at least one laser component, and a
method for operating a laser component
An optoelectronic arrangement includes at least one laser component. A heating device for heating the laser component up to a constant temperature is provided in...
Non-volatile semiconductor memory
A method for determining a reading voltage for reading data out of a non-volatile semiconductor memory, wherein the semiconductor memory comprises a plurality of...
Integrated circuit and method for operating an integrated circuit
An integrated circuit having at least one line pair to which a dual-rail signal is applied, a switching device, which is connected to the at least one line pair,...
Semiconductor memory device
A semiconductor memory device comprises a temperature dependent voltage source for outputting a voltage at its output in dependence on a temperature measured in...
Phase change memory cell defined by a pattern shrink material process
One embodiment of the present invention provides a memory cell device. The memory cell device includes a first electrode, a phase-change material adjacent the...
Reflection mask for projecting a structure onto a semiconductor wafer and
method for producing the mask
A reflection mask for projecting a structure onto a semiconductor wafer contains a carrier material, a layer stack for reflecting obliquely incident light and...
System for testing an integrated circuit using multiple test modes
A system for testing an integrated circuit at a plurality of locations with a plurality of test modes includes a sequence of test-mode storage devices, each of...
Test device for dynamic memory modules
A test device for dynamic memory modules is described and has an electronic test unit for generating test signals. Accordingly, the electronic test unit has at...
Method and apparatus for calibrating data-dependent noise prediction
Disclosed herein is an apparatus and method of calibrating the parameters of a Viterbi detector 138 in which each branch metric is calculated based on noise...
Line termination device for a telephone subscriber line
In the line terminating device, which is provided for transmitting and receiving narrowband low-frequency voice signals and broadband data signals at a higher...
Flexible internal address counting method and apparatus
A method of controlling an internal address counter which provides a count used in accessing a storage cell array to provide increased flexibility in the...
Device for ESD protection of an integrated circuit
A device for ESD protection of a high frequency circuit (1) of a semiconductor device comprises first (3) and second (4) p-type and first (6) and second (5)...
Direct digital amplitude modulator
Various embodiments of a direct digital amplitude modulator (DDAM) for modulating radio frequency (RF) or intermediate frequency (IF) or baseband signal with the...
Compensation of the IQ phase asymmetry in quadrature modulation and
A simplified compensation matrix is set up for the compensation of phase errors between the I and the Q component in data transmission systems with quadrature...
Using polydentate ligands for sealing pores in low-k dielectrics
In preferred embodiments, a polydentate pore-sealing ligand is used to seal or repair pores damaged by plasma processing. The polydentate ligand includes...
High density DRAM with reduced peripheral device area and method of
A dynamic random access memory (DRAM) structure having a distance less than 0.14 um between the contacts to silicon and the gate conductor is disclosed. In...
Buried strap contact for a storage capacitor and method for fabricating it
A buried strap contact between a trench capacitor of a memory cell and the subsequently formed selection transistor of the memory cell is fabricated such that...
Semiconductor component of semiconductor chip size with flip-chip-like
external contacts, and method of...
A semiconductor component and a method for its production in semiconductor chip size, can have a semiconductor chip, which has external contacts of the...
Arrangement for taking up liquid analytes
Apparatus for taking up liquid analytes having a microtitre plate with a plurality of wells and a plurality of pipettes, as well as a pump, which is coupled to...
Method of error control coding and decoding of messages in a packet-based
data transmission system
Initially the message frame comprising a header with length information, a data portion and a check sequence is expanded with gaps inserted to the data portion...
Test system and method for testing memory circuits
A first and a second memory circuit are tested in parallel. It is possible to activate the memory circuits depending on a circuit select signal, and it is...
Apparatus and method for calibrating signals
The invention is directed to a device for calibrating signals, whereby at least two signal circuits are provided for generating signals. In order to calibrate...
Decision feedback equalizing device
A decision feedback equalizer device includes a linear equalizer stage, which has at least one first digital filter with an adjustable first set of coefficients....
According to one embodiment a network switch is disclosed. The switch includes a first media access controller (MAC) coupled to a plurality of ports and a memory...
A transmission device has a device for generating a signal pair and a device for generating a recovered data signal. The device for generating the signal pair is...
Sense amplifier bitline boost circuit
A current sense amplifier including clamping devices and a current mirror is configured to sense the resistance of an MTJ memory cell utilizing a bitline boost...
Method for programming a memory arrangement and programmed memory
A read-only memory arrangement and method for programming the memory arrangement are provided. The memory arrangement includes memory cells, which each have a...
In-operation test of a signal path
A device for generating a sensor signal suitable for an in-operation test of a signal path from a sensor cell to an evaluation location. The sensor cell provides...
Amplifier arrangement and method for calibrating an amplifier arrangement
An amplifier arrangement is disclosed that includes at least two series-connected, programmable amplifiers. The amplifiers each have a different amplifier step...
Semiconductor component with internal heating
The invention involves a process for heating a semi-conductor component, as well as a semi-conductor component, whereby a device for heating the semi-conductor...
Apparatus and method for making ground connection
An apparatus for enabling connection to a ground plane of a test board during the testing of contacts on the board, comprising a conductive ground plate...
Semiconductor component and production method suitable therefor
A semiconductor component has a lower semiconductor element and an upper semiconductor element. A contact-making region is provided between the lower and the...
Transistor device and methods of manufacture thereof
Methods of forming transistor devices and structures thereof are disclosed. A first dielectric material is formed over a workpiece, and a second dielectric...
Resist for forming a structure for aligning an electron or ion beam and
technique for forming the structure
A scintillating structure for aligning an electron or ion beam using a detector while exposing a wafer, which may be a wafer or mask, is described. The structure...
Data carrier card
Data carrier card having a card body of a flat form and having a recess, a carrier, a chip arranged on the carrier and inserted in the recess of the card body,...
Apparatus and method for testing a device for storing data
The present invention provides an apparatus for testing a device (102) for storing data, which has a device for comparing actual data with set point data for...
Memory chip with test logic taking into consideration the address of a
redundant word line and method for...
A memory chip includes an on-chip data generator, a scrambler unit for checking the correct operability of the memory cells, a repair unit, and redundant word...
System with a monitoring device that monitors the proper functioning of
the system, and method of operating...
A system and a method are distinguished by the fact that, if it is determined that the system is not operating properly, a control device is stopped and it is...
Built-in self test system and method
External test equipment is used to simulate an internal BIST test, thus enabling the capture or generation of detailed test results. By simulating the BIST test...