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Patent # Description
US-7,227,396 Clock signal input/output device for correcting clock signals
The invention relates to a clock signal correction method, and to a clock signal input/output device into which a clock signal or a signal obtained therefrom is...
US-7,227,219 Charge trapping memory cell and fabrication method
A memory cell patterned as a trench transistor is provided with a first gate electrode (4) as auxiliary gate for source-side injection and a second gate...
US-7,226,216 Optoelectronic transmission and/or reception arrangement
An optoelectronic transmission and/or reception arrangement with an optical unit having a transmission component and/or a reception component, an electrical...
US-7,225,678 Housing structure of a pressure sensor apparatus and method of producing the same
A pressure sensor apparatus includes a reception container for receiving a pressure sensor, the reception container having an opening on one side. Furthermore,...
US-7,225,348 Electrical circuit having cooperating components
An electrical circuit including components which cooperate with each other, in which a component of the electrical circuit which is waiting for an action to be...
US-7,225,213 Interpolation filter and method for digitally interpolating a digital signal
The invention relates to an interpolation filter and to a method for filtering a digital input signal. The interpolation filter has an amplitude characteristic...
US-7,224,751 Device and method for checking whether a signal with a predetermined frequency is being received
A device and method are disclosed, whereby the normally complicated and difficult frequency determination is achieved by simply arranged and executed measures,...
US-7,224,709 Electrical circuit for a directly modulated semiconductor radiation source
The invention relates to an electrical circuit for a directly modulated semiconductor radiation source having a semiconductor radiation source, to which a...
US-7,224,636 Semiconductor memory module
The invention relates to a semiconductor memory module having a plurality of memory chips arranged next to one another in a row. The memory module has a...
US-7,224,627 Integrated semiconductor circuit and method for testing the same
Integrated semiconductor circuits, in particular, dynamic random access memories include a multiplicity of generator circuits for generating internal voltage...
US-7,224,626 Redundancy circuits for semiconductor memory
A semiconductor random access memory device has an array of normal memory and an array of dummy memory cells. The array of the dummy memory cells are controlled...
US-7,224,625 Method and circuit arrangement for controlling write access to a semiconductor memory
The invention relates to a method for controlling write access to a semiconductor memory, particularly a DDR graphics memory, in which a multiplicity of data...
US-7,224,623 Memory device having off-chip driver enable circuit and method for reducing delays during read operations
A memory device capable of performing a read operation includes: a memory array that stores data; and off-chip drivers that supply as an output of the memory...
US-7,224,439 Method and imaging apparatus for imaging a structure onto a semiconductor wafer by means of immersion lithography
The hydrodynamic effects--which occur during immersion lithography as a result of the movement of the semiconductor wafer--in a liquid preferably provided...
US-7,224,214 Integrated circuit
An integrated circuit includes a first and a second amplifier circuit each driven by an input signal. The first and second amplifier circuits generate a first...
US-7,224,201 Level converter
The invention relates to a level converter for converting a signal (in) comprising a first voltage level (Vint) and supplied to the level converter, to a signal...
US-7,224,058 Integrated circuit package employing a heat-spreader member
An integrated circuit package is proposed in which a laminar substrate 41 is provided with an aperture 43. A heat-spreader member 1 is mounted to cover this...
US-7,224,043 Semiconductor element with improved adhesion characteristics of the non-metallic surfaces
The invention relates to a semiconductor element with metallic and non-metallic surfaces, with the non-metallic surfaces of the semiconductor being provided with...
US-7,224,030 Method and apparatus for producing rectangular contact holes utilizing side lobe formation
An array of small square contact holes, on the order of magnitude of the exposing light wavelength, are formed by selecting the partial coherence and numerical...
US-7,224,017 Device with integrated capacitance structure
The present invention relates to a device with integrated capacitance structure has at least one first and an adjacent second rewiring plane, each of which...
US-7,223,704 Repair of carbon depletion in low-k dielectric films
A method of repairing damaged low-k dielectric materials is disclosed. Plasma-based processes, which are commonly used in semiconductor device manufacturing,...
US-7,223,651 Dram memory cell with a trench capacitor and method for production thereof
A memory cell includes a selection transistor and a trench capacitor. The trench capacitor is filled with a conductive trench filling on which an insulating...
US-7,223,639 Method of producing an electronic component and a panel with a plurality of electronic components
The electronic component has a semiconductor chip embedded in a plastic compound. The electronic component is produced by first producing a number of electronic...
US-7,223,612 Alignment of MTJ stack to conductive lines in the absence of topography
A scheme for aligning opaque material layers of a semiconductor device. Alignment marks are formed in a via level of the semiconductor device. The alignment...
US-7,223,525 Process for generating a hard mask for the patterning of a layer
A process for generating a hard mask for the patterning of a first layer includes applying a second layer, which includes carbon, to the first layer that is to...
US-7,223,023 Optoelectronic transmission and/or reception arrangements
Optoelectronic transmission and/or reception arrangements having a surface-mounted optoelectronic component and a circuit board provided with electrical lines,...
US-7,222,271 Method for repairing hardware faults in memory chips
Method for repairing hardware faults in memory chips. According to one embodiment, a method is provided for repairing bit errors in memory chips having a...
US-7,222,263 Program-controlled unit with on-chip debug resources able to control watchdog timers
A program-controlled unit includes a core for executing the program to be executed by the program-controlled unit, and debug resources for tracking and...
US-7,222,251 Microprocessor idle mode management system
An idle mode system has a clock gating circuit, a bus interface unit, memory interfaces and an interrupt and idle control unit. The clock gating circuit receives...
US-7,221,788 Method of inspecting a mask or reticle for detecting a defect, and mask or reticle inspection system
A method of inspecting a mask or reticle, the mask or reticle being provided with a pattern to be transferred onto a semiconductor wafer, the pattern having a...
US-7,221,713 Method and apparatus for transmitting a digital data word
A method for transmitting a digital data word, and an apparatus for carrying out the method, include the following processing steps: First, the data word is...
US-7,221,702 Transmitter/receiver for bidirectional communications
In a transmitter/receiver for bidirectional communication with a transmission medium, the transmitter comprises an amplifier having an input terminal for signals...
US-7,221,617 Backwards-compatible memory module
A backwards-compatible memory module is disclosed. According to one aspect, a memory module comprises addressable memory cells organized in organization units...
US-7,221,615 Semiconductor memory chip
A semiconductor memory chip includes: a reception interface section for receiving external data, command, and address signals in form of serial signal frames; an...
US-7,221,292 Circuit for producing a data bit inversion flag
A circuit for producing a data bit inversion flag comprises a first summed-current production unit for producing a first summed current, whose amplitude is...
US-7,221,204 Duty cycle corrector
A duty cycle corrector comprising a first circuit and a second circuit. The first circuit is configured to receive a clock signal and an inverted clock signal...
US-7,221,180 Device and method for testing electronic components
A test device includes first and second testers each having at least one testing contact for making contact with at least one external contact of an electronic...
US-7,221,053 Integrated device and electronic system
The present invention relates to an integrated device comprising an electronic circuit chip, a solder contact structure to provide contact to the electronic...
US-7,221,048 Multilayer circuit carrier, panel, electronic device, and method for producing a multilayer circuit carrier
A multilayer circuit carrier, electronic devices and panel, and a method for producing a multilayer circuit carrier include at least one semiconductor chip, at...
US-7,221,034 Semiconductor structure including vias
A semiconductor device may comprise a semiconductor substrate having a top and a bottom surface, first and second insulating layer deposited on the top surface...
US-7,220,666 Interconnection element for BGA housings and method for producing the same
An electronic component includes an interposer substrate and at least one semiconductor chip mounted on the interposer substrate. A plurality of electrical...
US-7,220,664 Fabrication method for semiconductor structure in a substrate, the semiconductor structure having at least two...
The present invention provides a fabrication method for a semiconductor structure in a substrate, the semiconductor structure having at least two regions that...
US-7,220,531 Resist for electron beam lithography and a process for producing photomasks using electron beam lithography
The invention relates to a resist for electron beam lithography and to a process for producing photomasks for optical lithography. The inventive resist includes...
US-7,219,286 Built off self test (BOST) in the kerf
A semiconductor device includes an integrated main circuit and an auxiliary circuit on a semiconductor substrate. The auxiliary circuit is configured to output...
US-7,219,029 Method for testing a memory device and memory device for carrying out the method
A memory device for data storage has a memory module with at least one memory bank in which data are stored and from which the stored data are read out, and a...
US-7,218,569 Memory circuit, and method for reading out data contained in the memory circuit using shared command signals
The present invention relates to a memory circuit having a memory cell array for storing data, and having a command decoding circuit for receiving command...
US-7,218,533 Resonance converter with voltage regulation and method of driving variable loads
In a resonance converter for driving variable loads at first an input signal provided by a switch controlled by control means is converted to an output signal by...
US-7,218,163 Radio-frequency mixer arrangement
The present invention relates to a radio-frequency mixer arrangement in which a differential amplifier is connected to an input on a multiplier. The differential...
US-7,217,646 Method for connecting an integrated circuit to a substrate and corresponding circuit arrangement
Method for connecting an integrated circuit to a substrate and corresponding circuit arrangementThe present invention provides a method for connecting an...
US-7,217,619 Method for fabricating memory components
The top of the semiconductor body (1) has a sacrificial layer (4) made of nitride applied to it on a region, which is provided for the actuation circuit. A...
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