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Patent # Description
US-7,242,251 Controllable amplifier circuit with a variable discrete-value gain, use of the amplifier circuit and method for...
An amplifier circuit is disclosed in which a first amplifier stage and at least one second amplifier stage are each arranged between a signal input and a signal...
US-7,242,236 Mixer circuit with phase-shifted radio frequency signal
A mixer includes two transistor circuits, two control inputs, two RF inputs and two IF outputs, wherein, for switch-support, there are provided positive feedback...
US-7,242,228 Method and device for generating an output signal having a predetermined phase shift with respect to an input...
An output signal is generated with a predetermined phase shift with respect to an input signal using a closed loop control. The input and output signal of the...
US-7,242,208 System and method for testing one or more dies on a semiconductor wafer
A testing system or method compares read data from one or more dies in a semiconductor wafer with the original data written onto the one or more dies. The...
US-7,241,701 Method and furnace for the vapor phase deposition of components onto semiconductor substrates with a variable...
A method and a furnace are provided for the vapor phase deposition of components onto semiconductor substrates. The main flow direction of the process gases can...
US-7,241,696 Method for depositing a metal layer on a semiconductor interconnect structure having a capping layer
Disclosed is a method for depositing a metal layer on an interconnect structure for a semiconductor wafer. In the method, a metal conductor is covered by a...
US-7,241,681 Bilayered metal hardmasks for use in dual damascene etch schemes
A metal hardmask for use with a Dual Damascene process used in the manufacturing of semiconductor devices. The metal hardmask has advantageous translucent...
US-7,241,657 Integrated semiconductor storage with at least a storage cell and procedure
The invention relates to an integrated semiconductor memory with at least one memory cell having at least one transistor which forms an inversion channel in the...
US-7,240,847 Chip card
A contactless chip card and a method for producing a contactless chip card in which a plastic carrier having clearances is provided, on which an antenna coil is...
US-7,240,134 Circuit with processing prevention unit
Circuit having a bus, a first receiver circuit part coupled to the bus for processing a signal on the bus, a second receiver circuit part coupled to the bus for...
US-7,239,854 Frequency-doubling circuit arrangement, and mobile radio having that circuit arrangement
One or more aspects of the present invention are directed to a frequency-doubling circuit arrangement that doubles the frequency of a signal applied to its...
US-7,239,172 Impedance matching
There is provided apparatus for connecting between a data source or a data receiver and a data line. The apparatus comprises an impedance and an impedance...
US-7,239,162 Device for measurement and analysis of electrical signals of an integrated circuit component
According to the invention, one or more external test connection contact points (pads; pins; balls), are provided in an integrated circuit component (chip) (1),...
US-7,238,974 Semiconductor device and method of producing a semiconductor device
A semiconductor device comprises a memory cell (160) including a transistor body (150) having a top surface (111) and including a first doping area (10a) and a...
US-7,238,964 Memory cell, method for the production thereof and use of a composition therefor
A memory cell is provided which comprises two electrodes and a layer arranged in between and comprising an active material comprising (a) a compound selected...
US-7,237,216 Clock gating approach to accommodate infrequent additional processing latencies
A processor system has a first device, a clock control circuit and a processor. The first device receives a clock signal, runs a plurality of operations...
US-7,237,213 Process and device for timing analysis of a circuit
Circuit elements are operated as a function of a state of at least one change-over signal, in each case with a particular respective clock mode. Timing analysis...
US-7,237,211 Method for reducing the evaluation outlay in the monitoring of layout changes for semiconductor chips
In a method for monitoring layout changes for semiconductor chips, a first group of error data is generated by comparing a first layout with wiring and layout...
US-7,237,153 Integrated memory and method for testing an integrated memory
An integrated memory and method for testing an integrated memory is provided herein. In order to test an integrated memory having a main data memory with a...
US-7,237,092 Microprocessor circuit for portable data carriers and method for operating the circuit
A microprocessor circuit includes a control unit, a memory for free programming with at least one program having functions, a stack for buffer-storing data, a...
US-7,236,752 Circuit arrangement for increasing a supply voltage
A circuit for increasing a supply voltage comprises a transmitter for transmitting a radio signal, with an amplifying device having a supply input for a first...
US-7,236,412 Integrated semiconductor memory with redundant memory cells replaceable for either true or complementary...
An integrated semiconductor memory including memory cells which can be driven via first and second word lines and can be replaced by redundant memory cells. In...
US-7,236,403 Precharge arrangement for read access for integrated nonvolatile memories
Precharge arrangement for read access for integrated nonvolatile memories having at least one memory cell (2), at least one source line (8), at least one bit...
US-7,236,378 Signal distribution to a plurality of circuit units
A device for distributing a signal, in particular a clock signal or a command/address signal from a signal source to a plurality of circuit units, includes a...
US-7,236,029 Flip-flop circuit arrangement and method for processing a signal
A flip-flop circuit arrangement and an associated method are disclosed, wherein a changeover between a master and a slave block is not effected by switching on...
US-7,235,873 Protective device for subassemblies and method for producing a protective device
A protective device for subassemblies having a substrate and at least one component to be protected which is disposed on the substrate includes at least one...
US-7,235,859 Arrangement and process for protecting fuses/anti-fuses
An arrangement for protecting fuses/anti-fuses on chips which serve to activate redundant circuits or chip functions includes a passivation layer (e.g., hard...
US-7,235,822 Transistor with silicon and carbon layer in the channel region
A transistor and method of manufacturing thereof having stressed material layers formed in the channel to increase the speed and improve performance of the...
US-7,235,485 Method of manufacturing semiconductor device
Provided is a method of manufacturing a semiconductor device with enhanced electrical characteristics. The method includes disposing a substrate on a substrate...
US-7,235,472 Method of making fully silicided gate electrode
A method of making a semiconductor device for an integrated circuit chip. An interim gate electrode stack formed includes a top silicon portion patterned from a...
US-7,235,454 MIM capacitor structure and method of fabrication
A method of forming a metal-insulator-metal (MIM) capacitor wherein a plate of a MIM capacitor is formed in the entire thickness of a metallization layer of a...
US-7,235,447 Fabrication method for a semiconductor structure and corresponding semiconductor structure
The present invention provides a fabrication method for a semiconductor structure and a corresponding semiconductor structure. The fabrication method comprises...
US-7,234,360 TMR sensor
A sensor for measuring mechanical changes in length, in particular a compressive and/or tensile stress sensor, includes a sandwich system with two flat and...
US-7,234,237 Method for producing a protective cover for a device
In a method for producing a protective cover for a device formed in a substrate, at first a sacrificial structure is produced on the substrate, wherein the...
US-7,234,048 Method for initializing or configuring an electrical circuit
A method for initializing or configuring an electrical circuit, is described. The method includes reading data units stored in a memory device, using data...
US-7,233,810 Dynamically reconfigurable universal transmitter system
A dynamically reconfigurable universal transmitter system is disclosed herein. The electronic device includes multiple transmitter resources for generating...
US-7,233,618 Circuit configuration and method for transmitting digital signals
To transmit digital signals, binary signals are transformed into a series of pulses, the pulses being modulated in their pulse length as a function of an...
US-7,233,515 Integrated memory arrangement based on resistive memory cells and production method
An integrated memory arrangement based on resistive memory cells that can be changed over between a first state of high electrical resistance and a second state...
US-7,233,514 Non-volatile semiconductor memory and method for reading a memory cell
A method for reading a memory cell, wherein the memory cell comprises two source/drain regions and a gate, wherein the source/drain regions are each connected to...
US-7,233,288 Receiver for a position-finding system with improved sensitivity
A receiver (1) of a position-finding system comprises a calculation unit (6, 7, 8) for calculation of a statistical value (.LAMBDA.) on the basis of a received...
US-7,233,224 Component arrangement with a planar transformer
The invention relates to a component arrangement which has the following features: a semiconductor body (10), a dielectric layer (20) which is applied to one...
US-7,233,161 Integrated circuit and associated packaged integrated circuit having an integrated marking apparatus
An integrated circuit and an associated packaged integrated circuit are provided which improve testability and reduce the test costs. The integrated circuit...
US-7,233,059 Semiconductor arrangement
The invention relates to a vertical arrangement of at least two semiconductor components which are electrically insulated from one another by at least one...
US-7,233,053 Integrated semiconductor product with metal-insulator-metal capacitor
To fabricate an integrated semiconductor product with integrated metal-insulator-metal capacitor, first of all a dielectric auxiliary layer (6) is deposited on a...
US-7,233,031 Vertical power semiconductor component
A vertical power semiconductor component, e.g. a diode or an IGBT, in which there are formed, on the rear side of a substrate, a rear side emitter or a cathode...
US-7,232,722 Method of making a multibit non-volatile memory
The present invention relates to a method of making a multibit non-volatile memory and especially to a method of making a flash memory such as a...
US-7,232,264 Optoelectronic arrangement having a laser component, and a method for controlling the emitted wavelength of a...
The invention relates to an optoelectronic arrangement having a laser component. There are provided: a cooling device of small design for cooling the laser...
US-7,231,562 Memory module, test system and method for testing one or a plurality of memory modules
The invention relates to an integrated memory module having a memory unit and a self-test circuit, the self-test circuit being embodied in such a way as to make...
US-7,231,488 Self-refresh system and method for dynamic random access memory
A system and method are provided for reducing a rate for refreshing a portion of a dynamic random access memory (DRAM). The method includes storing a information...
US-7,231,352 Method for computer-supported speech recognition, speech recognition system and control device for controlling...
The speech recognition rate which is necessary is determined for a selected speech recognition application. The information content of the feature vector...
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