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Radio-frequency mixer arrangement
The present invention relates to a radio-frequency mixer arrangement in which a differential amplifier is connected to an input on a multiplier. The differential...
Method for connecting an integrated circuit to a substrate and
corresponding circuit arrangement
Method for connecting an integrated circuit to a substrate and corresponding circuit arrangementThe present invention provides a method for connecting an...
Method for fabricating memory components
The top of the semiconductor body (1) has a sacrificial layer (4) made of nitride applied to it on a region, which is provided for the actuation circuit. A...
Method for fabricating a semiconductor product with a memory area and a
A method for the integration of field-effect transistors for memory and logic applications in a semiconductor substrate is disclosed. The gate dielectric and a...
Semiconductor fabrication process, lateral PNP transistor, and integrated
A method in the fabrication of an integrated bipolar circuit comprises the steps of: providing a p-type substrate; forming in the substrate a buried n+-type...
An opto-electronic transceiver having: a transmitting component for converting electrical signals into optical signals; a first circuitry module for the...
Method for forgery recognition in fingerprint recognition by using a
texture classification of gray scale...
In a method for forgery recognition in the fingerprint recognition, at first an image sequence is captured, which comprises a plurality of images of the...
Memory device having components for transmitting and receiving signals
One embodiment of the present invention provides a memory device comprising an array of memory cells, a control logic for writing data to and reading data from...
Memory device and method using a sense amplifier as a cache
A memory device includes a pair of complementary bitlines including a first bitline and a second bitline. A bitline precharge block is coupled between the first...
Resistive memory arrangement
Provided is a resistive memory arrangement having a cell array structured in rows and columns and having resistive memory cells connected to a drive element for...
Semiconductor memory component in cross-point architecture
A programmable metallization memory cell with a storage region (3) formed from a chalcogenide glass and an electrode (4) which is preferably silver is located at...
The invention relates to a parallel-serial converter for converting parallel data into serial data, in particular for or in a DDR semiconductor memory, having at...
Power amplifier arrangement and method for processing a radiofrequency
A power amplifier arrangement comprises a power amplifier in a semiconductor body. At least one first input terminal on the surface of the semiconductor body is...
Method and device for frequency division and demultiplexing
A device and method is described for the frequency division of an input clock signal, in which from the input clock signal at least two output clock signals are...
Device for packing electronic components using injection molding
A device for and method of packaging electronic components (1) using injection-molding. For this purpose, a multiplicity of components (1) are arranged in...
Phase change memory cell with high read margin at low power operation
A memory cell device includes a first electrode, phase-change material adjacent the first electrode, a second electrode adjacent the phase-change material, a...
Process for producing aluminum-filled contact holes
A process for producing aluminum-filled contact holes in a wafer is disclosed. The process uses a coating installation that includes a plurality of...
Method for fabricating a semiconductor memory cell
Semiconductor memory cell and also a corresponding fabrication method are described, in which a first or bottom electrode device of the memory element of the...
Semiconductor substrate and semiconductor circuit formed therein and
A semiconductor substrate and a semiconductor circuit formed therein and associated fabrication methods are provided. A multiplicity of depressions with a...
Eliminating systematic process yield loss via precision wafer placement
A method for a semiconductor process includes correlating yield loss for the performance of a processing step in a semiconductor manufacturing process with the...
A smart card having a support element, at least one electrically conductive contact-making element in a surface area of the support element, and at least one...
The invention is directed to an integrated circuit that includes a plurality of functional circuit blocks. Respective associated multiplexers are used to change...
Adaptive equalizer with integrated alignment of the output level
The transfer function of a filter processing unit is defined by a set of filter coefficients that are continually updated in a coefficient-updating unit. The...
Semiconductor device and method of operating a semiconductor device
The invention considers a non-volatile semiconductor memory device comprising a first and second floating gate transistor, which are coupled in series. Each...
Resistive memory cell random access memory device and method of
A resistive memory cell random access memory device and method for fabrication. In one embodiment, the invention relates to a resistive memory cell random access...
Line driver for transmitting data
A line driver (3) for transmitting data with high bit rates, in particular for wire-bound data transmission in the full-duplex process, comprises a differential...
Probe needle for testing semiconductor chips and method for producing said
A probe needle for testing semiconductor chips includes one end that is fixed in a holding element and a free end that includes a contact tip. The probe needle...
Monolithic integrated circuit arrangement
A monolithic integrated circuit arrangement containing a substrate, a functional unit formed in and/or on the substrate, and an energy supply unit, which is...
Semiconductor component including plural trench transistors with
intermediate mesa regions
In the case of the semiconductor component (1) according to the invention, the source regions (S), the body regions (B) and, if appropriate, the body contact...
Resistive memory for low-voltage applications
Memory cells having two electrodes and a layer arranged in between and including an active material which contains hexakisbenzylthiobenzene, ...
Transistor having compensation zones enabling a low on-resistance and a
high reverse voltage
A semiconductor component includes a semiconductor body having a substrate of a first conduction type and a first layer of a second conduction type that is...
Method for fabricating a field effect transistor
A method for fabricating a field effect transistor, in which, after the etching of the gate electrode, the removal of the etching mask is omitted since the...
Process and arrangement for the selective metallization of 3D structures
A process is provided for the selective metallization of 3D structures, particularly for the selective gold-plating of 3D contact structures on wafers, such as...
Method for producing a multichip module and multichip module
A method for producing a multi-chip module having application of at least one contact elevation onto a substrate, application and patterning of a rewiring device...
Process for producing a component module
A process for producing a component module comprising a module carrier and a plurality of components with which contact is made on the latter, comprising the...
Method of patterning a magnetic tunnel junction stack for a
magneto-resistive random access memory
A method of patterning a magnetic tunnel junction (MTJ) stack is provided. According to such method, an MTJ stack is formed having a free layer, a pinned layer...
Method for producing phase shifter masks
The invention relates to a method for producing phase shifter masks for 157 nm lithography. A coating has an organic material and is at least partially...
Long running test method for a circuit design analysis
The invention relates to a design analysis technique for a test pattern analysis of chips via automatic test equipment (ATE) or a circuit simulation to detect...
Program controlled unit and method for debugging programs executed by a
program controlled unit
The described program controlled unit has first supply voltage connections for applying a first supply voltage to the program controlled unit and second supply...
Drive circuit for a firing cap of a vehicle restraint system
A drive circuit for a firing cap, triggerable by an electric direct current firing pulse, of a vehicle restraint system, has a firing circuit which forms a...
Fractional divider system and method
The present invention relates to a fractional divider system for a low-power timer with reduced timing error at wake-up. The fractional divider system includes a...
ADSL system with improved data rate
An improved ADSL system with improved data rate is disclosed. In one embodiment, the upstream data bit rate is increased by extending the upstream transmission...
Data strobe synchronization for DRAM devices
Methods and apparatus that determine, at a device (e.g., a DRAM device), a phase difference between two externally supplied timing signals such as a clock signal...
DB-linear variable gain amplifier (VGA) stage with a high broad band
The invention relates to a VGA stage having a novel circuit configuration for amplifying/attenuating a differential input signal which is transmitted via a...
Test system for testing integrated chips and an adapter element for a test
Test system for testing integrated chips and an adapter element for a test system. One embodiment provides a test system for testing integrated chips in a...
Method for determining the angular position of a rotating object and
A method for determining the angular position of a rotating object and rotary encoder is disclosed. In one embodiment, the method includes a method for...
Encasing arrangement for a semiconductor component
A semiconductor component package configuration includes a semiconductor chip mounted to a printed circuit board, and a substrate arranged between the...
Semiconductor arrangement comprising transistors based on organic
semiconductors and non-volatile read-write...
A semiconductor arrangement is disclosed, having transistors based on organic semiconductors and non-volatile read/write memory cells. The invention relates to a...
Resistive device and method for its production
A resistive device includes a resistive region of a semiconductor material that includes a first region and a second region, wherein the first region has a...
Semiconductor memory having memory cells, each including first and second conductively-doped contact regions and a channel region arranged between the latter,...