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Patent # Description
US-7,259,579 Method and apparatus for semiconductor testing utilizing dies with integrated circuit
A method and apparatus for testing semiconductor wafers in which certain contact areas of dies not used in the testing and required to be at a predetermined...
US-7,259,441 Hollow structure in an integrated circuit and method for producing such a hollow structure in an integrated circuit
A pattern of voids in an integrated circuit having a first layer, a first layer surface and adjacent lands on the first layer surface, the adjacent lands...
US-7,259,107 Method of forming isolated features of semiconductor devices
A method of forming isolated features of semiconductor devices is disclosed. A first hard mask is deposited over a material layer to be patterned, and a second...
US-7,259,088 Apparatus for singulating and bonding semiconductor chips, and method for the same
An apparatus for singulating and bonding semiconductor chips includes a singulating station and a mounting station. In the singulating station, a semiconductor...
US-7,259,061 Method for forming a capacitor for an integrated circuit and integrated circuit
Integrated circuits can include an integrated capacitor with a metal alloy layer. Methods for forming such integrated circuits can include providing a substrate,...
US-7,259,060 Method for fabricating a semiconductor structure
A method fabricates a semiconductor structure having a plurality of memory cells that are provided in a semiconductor substrate of a first conductivity type and...
US-7,259,025 Ferromagnetic liner for conductive lines of magnetic memory cells
A method of forming a ferromagnetic liner on conductive lines of magnetic memory devices and a structure thereof. The ferromagnetic liner increases the flux...
US-7,259,024 Method of treating a substrate in manufacturing a magnetoresistive memory cell
A method of treating a substrate in manufacturing a magnetoresistive memory cell includes performing a cleaning operation on the substrate using a mask layer as...
US-7,257,222 Ring voltage generation circuit and method for generating a ring voltage
The present invention relates to a ring voltage generation circuit for generating a ring voltage (VTR) between a TIP lead (9) and a RING lead (10) with minimized...
US-7,257,038 Test mode for IPP current measurement for wordline defect detection
A semiconductor integrated circuit memory device, and test method for a memory device are provided in which an external wordline voltage is applied to a wordline...
US-7,257,031 Circuit arrangement and method for switching high-voltage signals by means of low-voltage signals
The invention relates to a circuit arrangement for switching high-voltage signals with low-voltage signals, particularly for driving a semiconductor memory...
US-7,257,014 PMC memory circuit and method for storing a datum in a PMC memory circuit
The invention relates to a PMC memory circuit comprising a PMC memory cell having a PMC component, the PMC component having a solid electrolyte with permanently...
US-7,257,013 Method for writing data into a memory cell of a conductive bridging random access memory, memory circuit and...
The present invention refers to a method for writing data into a memory cell of a conductive bridging random access memory and to a memory circuit comprising...
US-7,256,602 Electrical circuit and method for testing integrated circuits
An electrical circuit including a test circuit and a method of testing electrical circuits is disclosed. In one embodiment, the circuit includes a electrical...
US-7,256,493 Ball grid array housing having a cooling foil
A ball grid array housing, a semiconductor device having a ball grid array housing and an electronic circuit are disclosed. In one embodiment, a ball grid array...
US-7,256,472 Bipolar transistor
A bipolar transistor and method of making a bipolar transistor is disclosed. In one embodiment, the bipolar transistor includes a polysilicon layer into which...
US-7,256,441 Partially recessed DRAM cell structure
A dynamic random access memory (DRAM) cell structure (and method for making a DRAM cell structure) that is more suitable than current DRAM structures for...
US-7,256,440 Semiconductor memory cell having a trench and a planar selection transistor and method for producing the same
A trench (12) of a semiconductor memory cell (1) has an insulation collar (44), which is open toward the substrate (42) on just one side (50). On the other side...
US-7,256,098 Method of manufacturing a memory device
A method of making a memory device and a memory device is described. In one embodiment, a method of manufacturing a memory device is described. The method...
US-7,256,070 Substrate-based housing component with a semiconductor chip
The invention, which relates to an electronic component with a semiconductor chip, which is connected to a carrier substrate and surrounded by a housing, is...
US-7,255,010 Integrated circuitry and method for manufacturing the same
The integrated circuitry on a semiconductor substrate includes an integrated circuit arranged in a circuit area of the semiconductor substrate and a...
US-7,254,883 Method for manufacturing a packaging material in the form of a laminate with an electrically conductive layer...
A laminate is formed from a carrier layer and an electrically conductive layer. In one section, the conductive layer is formed into an antenna structure. The...
US-7,254,758 Method and apparatus for testing circuit units to be tested with different test mode data sets
The invention provides a test apparatus for testing a circuit unit to be tested. In one embodiment, a circuit unit incorporating aspects of the invention...
US-7,254,679 Computer system for data processing and method for the transfer of an array segment of an affine-indexed...
Computer system for electronic data processing having programmable data transfer units used for transferring data from a first memory in which data is stored in...
US-7,254,649 Wireless spread spectrum communication platform using dynamically reconfigurable logic
A wireless spread spectrum communication platform for processing a communication signal is disclosed herein. The wireless communication platform includes a first...
US-7,254,502 Method and device for detecting period length fluctuations of periodic signals
To determine the period length of a first signal, the length is measured by counting the periods of a second signal with a shorter period length. To measure the...
US-7,254,475 Detection systems and methods
One embodiment of the invention provides a detection system. The detection system includes an analog to digital converter that converts one or more analog...
US-7,254,194 Automatic gain control for communication receivers
A communication receiver amplifies a pulse-amplitude-modulated (PAM) signal representing an integer-valued sequence of first data elements (D1) with an...
US-7,254,089 Memory with selectable single cell or twin cell configuration
A memory circuit comprises a memory including a memory array, a twin cell mode predecoder, and a row address predecoder. The memory array comprises word lines....
US-7,254,073 Memory device having an array of resistive memory cells
A memory device including an array of resistive memory cells, which are arranged in columns and rows, and wherein each resistive memory cell each is connected to...
US-7,254,052 Memory circuit and method for reading out a memory datum from such a memory circuit
The present invention relates to a memory circuit comprising a CBRAM resistance memory cell, which is connected to a bit line and a word line and has a CBRAM...
US-7,253,757 Sigma-delta modulator having a clocked delay line
A sigma-delta modulator is provided with a filter for noise shaping, with the filter having at least one delay line (DL). The delay line (DL) is a clocked line.
US-7,253,656 Calibration circuit for a driver control circuit, and driver control circuit
A calibration circuit of a driver control circuit which controls a plurality of input/output drivers of an integrated circuit comprises first and second...
US-7,253,592 DC voltage converter and method for converting a DC voltage
A DC voltage converter having a plurality of outputs and a method for converting a DC voltage into a plurality of output-side DC voltages is disclosed. A control...
US-7,253,530 Method for producing chip stacks
A plurality of interconnect layers are produced on a top side of one or two semiconductor chips, and are mutually isolated from one another in each case by...
US-7,253,514 Self-supporting connecting element for a semiconductor chip
A connecting element for electrically connecting a semiconductor chip and a superordinate circuit board includes an elastic metal strip that is bent forming two...
US-7,253,492 Semiconductor structure with via structure
A semiconductor device may comprise a semiconductor substrate having a top and a bottom surface, first and second insulating layer deposited on the top surface...
US-7,253,475 Power transistor cell and power transistor component with fusible link
Transistor cells (2) of a power transistor component are in each case provided with a gate conductor structure that forms a gate electrode (52) in sections and...
US-7,253,474 Quasi-vertical semiconductor component
A quasi-vertical semiconductor component in which, by variation of the layout, the process or the wiring of inner cells, a compensation for a voltage drop along...
US-7,253,471 Semiconductor structure having thick stabilization layer
A semiconductor structure has a semiconductor substrate (3, 4), on/in whose top side a structure comprising semiconductor layers, metal layers and insulator...
US-7,253,456 Diode structure and integral power switching arrangement
A diode structure having high ESD stability is described. Other embodiments provide an integral power switching arrangement having an integrated low leakage diode.
US-7,253,050 Transistor device and method of manufacture thereof
Methods of forming CMOS devices and structures thereof. A workpiece is provided having a first region and a second region. A high k gate dielectric material is...
US-7,253,016 Micromechanical capacitive transducer and method for producing the same
A micromechanical capacitive converter and a method for manufacturing a micromechanical converter comprise a movable membrane and an electrically conductive face...
US-7,253,009 Method of producing an integrated circuit arrangement with field-shaping electrical conductor
An integrated circuit arrangement includes at least one electrical conductor that, when a current flows through it, produces a magnetic field that acts on at...
US-7,252,913 Method for projection of a circuit pattern, which is arranged on a mask, onto a semiconductor wafer
A simulation is carried out of a projection based on an electronically stored circuit pattern and adjustable projection parameters and optical parameters which...
US-7,251,772 Circuit arrangement having a number of integrated circuit components on a carrier substrate and method for...
A circuit arrangement can have a number of integrated circuit components, which are arranged on a carrier substrate. A reception circuit for receiving a control...
US-7,251,758 Semiconductor device testing apparatus, system, and method for testing the contacting with semiconductor...
A semiconductor device testing apparatus, system, and method, in particular for testing the contacting with semiconductor devices positioned one upon the other,...
US-7,251,497 Signal-to-interference ratio estimation for CDMA
Calculating of signal-to-interference ratio (SIR) of a mobile device in a wireless communication system. A communication signal transmitted by the mobile device...
US-7,251,284 QAM receiver
A QAM receiver is disclosed. According to one aspect, a QAM receiver includes a signal input for receiving an analog input signal. Further, the QAM receiver...
US-7,251,269 Apparatus and method for fine synchronization when sampling spread-coded received signals
In order to determine the optimal sampling point for a series of spread-coded data, received by a radio, a correlation data series is used that is produced by...
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